Of Individual Circuit Component Or Element Patents (Class 324/537)
  • Patent number: 11567121
    Abstract: An integrated circuit, comprising a plurality of pins, including a signal output pin. The integrated circuit also comprises a plurality of signal nodes. Each node in the plurality of signal nodes is operable to store a respective internal data signal. The integrated circuit also comprises a plurality of testing circuits. Each testing circuit in the plurality of testing circuits configured to sample a respective internal data state and in response to concurrently couple a unique output signal to a same pin in the plurality of pins, other than the signal output pin.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: January 31, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: George Earl Fleming, Adrian Poh Siang Chan
  • Patent number: 11561255
    Abstract: An integrated circuit includes an input/output (I/O) circuit configured to receive a first signal and a second signal and a fault detection circuit. The I/O circuit includes an I/O terminal, an I/O buffer, and a pull resistor having a first terminal coupled to the I/O terminal. The fault detection circuit is configured to determine whether a predetermined number of toggles of the first signal occurs while the second signal is held at a constant logic state, assert a fault indicator when the predetermined number of toggles occurs, and negate the fault indicator when the predetermined number of toggles does not occur.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: January 24, 2023
    Assignee: NXP USA, Inc.
    Inventors: Kumar Abhishek, Xiankun Jin, Srikanth Jagannathan
  • Patent number: 11552230
    Abstract: A pixel array substrate includes a base, pixel structures, first bonding pads, first wirings, and a first testing element. The pixel structures are disposed on an active area of a first surface of the base. The first bonding pads are disposed on a peripheral region of the first surface. Each of the first wirings is disposed on a corresponding first bonding pad, a first sidewall of the base, and a corresponding second bonding pad. The first testing element is disposed on the active area of the first surface and has a first testing line. The first testing line is electrically connected to at least one of the first bonding pads, and an end of the first testing line is substantially aligned with an edge of the base.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: January 10, 2023
    Assignee: Au Optronics Corporation
    Inventors: Shang-Jie Wu, Hao-An Chuang, Yu-Chieh Kuo, He-Yi Cheng, Che-Chia Chang, Yi-Jung Chen, Yi-Fan Chen, Yu-Hsun Chiu, Mei-Yi Li, Yu-Chin Wu
  • Patent number: 11532998
    Abstract: A power supply circuit for measuring transient thermal resistances includes an inverter circuit provided on a primary side of a transformer and controlled by a PWM signal, a rectifier circuit provided on a secondary side of the transformer and including a DC reactor, and a control circuit controlling the PWM signal so as to output a pulsed output current from the rectifier circuit to a semiconductor device to be measured. The control circuit sets a first PWM frequency at rising timing of the output current, and sets a second PWM frequency when a predetermined time t1 elapses from the rising timing of the output current. The control circuit sets the first PWM frequency higher than the second PWM frequency.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: December 20, 2022
    Assignee: Sansha Electric Manufacturing Co., Ltd.
    Inventors: Naoki Nishimura, Masashi Fukai
  • Patent number: 11506726
    Abstract: A system and method for detecting the location of coil open and coil short faults. The method includes obtaining an instantaneous admittance signature of each solenoid coil, sending out a periodic test signal to each valve, obtaining a new admittance signature; and calculating the coil-open and coil-short faults.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: November 22, 2022
    Assignee: DANFOSS POWER SOLUTIONS II TECHNOLOGY A/S
    Inventors: Mayura Arun Madane, Nilesh Surase, Arjun Tr, Amogh Kank
  • Patent number: 11500012
    Abstract: A semiconductor component burn-in test module includes a burn-in board and an external power transmission component. The burn-in board includes a plurality of burn-in seats, wherein a plurality of chips are disposed on the burn-in seats. The external power transmission component is arranged at opposite two sides of the burn-in board, where the external power transmission component includes a plurality of conductive members and a plurality of terminal seats. The burn-in board is provided with a plurality of wirings corresponding to the external power transmission component. As such, electric power can be conveyed to the plural burn-in seats of the burn-in board, through the plural terminal seats and the plural conductive strips. This decreases the length and the number of copper foil wirings in the burn-in boards for power transmission, so as to lower the cost of the burn-in boards.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: November 15, 2022
    Assignee: KING YUAN ELECTRONICS CO., LTD.
    Inventors: Chia-Hung Tsai, Kuo-Jung Wu, Hsing-Yueh Liang, Po-Wei Liao, Yi-Ting Wang
  • Patent number: 11491738
    Abstract: Provided among other things is a method of affixing a small, single chip to a plastic item, the chip having a top surface having length and width dimensions, and having a height, the method comprising: (1) vacuum adhering a top-oriented surface of the chip to a probe of outer dimensions comparable to or smaller than those of the length and width; (2) conveying heat to the chip via the probe such that a bottom-oriented surface of the chip is sufficiently hot to melt the plastic; (3) applying via the probe the chip to the plastic such that the chip embeds in the plastic; and (4) releasing the chip from the probe, wherein the largest of the length and width is about 500 microns or less, and height is no more than about the smallest of length and width.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: November 8, 2022
    Assignee: P-CHIP IP HOLDINGS INC.
    Inventors: Ziye “Jay” Qian, Wlodek Mandecki
  • Patent number: 11448681
    Abstract: An insulation monitoring electric circuit of an electric-motor controller, includes: a first voltage sampling circuit and a second voltage sampling circuit; the first voltage sampling circuit is connected to an input anode (+VBUS) of a busbar, an input cathode (PGND) of the busbar and a busbar-voltage sampled-signal (HV_VDC) line, and a busbar-voltage sampled-signal (HV_VDC) line is connected to the electric-motor controller; the second voltage sampling circuit is connected to the input anode (+VBUS) of the busbar, the input cathode (PGND) of the busbar and an insulation-voltage sampled signal (HV_VDC) line, and an insulation-voltage sampled signal (HV_VISO) line is connected to the electric-motor controller; and the electric-motor controller is configured to compare a busbar-voltage value gathered by the first voltage sampling circuit and an insulation-voltage value gathered by the second voltage sampling circuit, and when the busbar-voltage value and the insulation-voltage value are different, emit an insul
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: September 20, 2022
    Assignee: Jing-Jin Electric Technologies Co., Ltd.
    Inventors: Yuxia Qu, Fuxiang Wan, Lingling Tan
  • Patent number: 11444566
    Abstract: An overcurrent protection circuit and a controller are provided. The overcurrent protection circuit includes a sampling circuit, a comparator circuit, a D flip-flop, and an output signal control circuit. The sampling circuit samples a current of a controlled circuit to obtain a sample signal. The comparator circuit compares the sample signal with a reference signal, and generates an overcurrent signal if the sample signal is greater than the reference signal. The D flip-flop generates a first level signal in response to the overcurrent signal. The output signal control circuit outputs, in response to the first level signal, a control signal for reducing the current of the controlled circuit. The controller includes a controlled circuit and the overcurrent protection circuit.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: September 13, 2022
    Assignee: Hangzhou Leaderway Electronics Co., Ltd.
    Inventors: Yongsong Lv, Qi Wang
  • Patent number: 11428711
    Abstract: A testing apparatus includes a chip carrying device and a pressing device. The chip carrying device includes a circuit board and a plurality of electrically connecting units that are disposed on the circuit board and each can receive a chip. The pressing device includes a cover and an abutting member disposed between the cover and the electrically connecting units. The cover is disposed on the circuit board to jointly define an accommodating space that accommodates the abutting member and the electrically connecting units. The cover can be connected to an air suction apparatus for expelling air in the accommodating space. When the air suction apparatus performs a suction operation to expel the air in the accommodating space, the abutting member is abutted against the electrically connecting units and the chips so as to connect each of the electrically connecting units and the corresponding chip.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: August 30, 2022
    Assignee: ONE TEST SYSTEMS
    Inventors: Chen-Lung Tsai, Gene Rosenthal
  • Patent number: 11413864
    Abstract: A die for a printhead is described herein. The die includes a number of fluid feed holes disposed in a line parallel to a longitudinal axis of the die, wherein the fluid feed holes are formed through a substrate of the die. A number of fluidic actuators are proximate to the fluid feed holes to eject fluid received from the plurality of fluid feed holes. The die includes logic circuitry to operate the fluidic actuators, wherein the logic circuitry is disposed on a first side of the plurality of fluid feed holes. Power circuitry to power the plurality of fluidic actuators is disposed on an opposite side of the fluid feed holes from the logic circuitry. Activation traces are disposed between each of the fluid feed holes to couple the logic circuitry to the power circuitry.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: August 16, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James Michael Gardner, Anthony M. Fuller, Michael W. Cumbie, Scott A. Linn
  • Patent number: 11383514
    Abstract: A die for a printhead is described herein. The die includes a number of fluid feed holes disposed in a line parallel to a longitudinal axis of the die. A number of fluidic actuators are disposed in a line parallel to the fluid feed holes. A crack detector trace is routed between each of the plurality of fluid feed holes.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: July 12, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James Michael Gardner, Anthony M. Fuller, Scott A. Linn
  • Patent number: 11385079
    Abstract: A method and apparatus for obtaining a valid peak from an output signal of a resolver sensor are provided. The method includes inputting an excitation signal to a resolver sensor, receiving a resolver signal from the resolver sensor, receiving a high peak and a low peak from the received resolver signal, determining whether the high peak or the low peak falls within an effective range, and defining the high peak or the low peak as a valid peak when the high peak or the low peak falls within the effective range.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: July 12, 2022
    Assignee: HYUNDAI MOBIS CO., LTD.
    Inventor: Sung-Hoon Bang
  • Patent number: 11384675
    Abstract: The control section of a control apparatus executes a first control for operating a voltage application section such as to cause a current to flow in a first direction through a gas sensor in a first period, and a second control for operating the voltage application section such as to cause a current to flow in a second direction, opposite to the first direction, through the gas sensor in a second period. The control apparatus changes the length of at least one of the first period and the second period based on a comparison between a first measurement value, which is the absolute value of a value measured by a sweep measurement section during execution of the first control, and a second measurement value, which is the absolute value of a value measured by the sweep measurement section during execution of the second control.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: July 12, 2022
    Assignees: DENSO CORPORATION, MAZDA MOTOR CORPORATION
    Inventors: Tooru Matsumoto, Katsuhide Akimoto, Takahito Masuko, Keita Takagi, Tatsuhiro Ito, Yuki Sato, Ryo Teramoto, Takafumi Nishio
  • Patent number: 11387777
    Abstract: An active bypass control device and an active bypass control method for a photovoltaic module are provided. The device includes a power source, a sampling unit, a controller, N first driving circuits, and N first controllable switches. Each first controllable switch is connected between one pair of bypass ports and includes a first switch and a first diode that are antiparallel. The first diode is reversely connected between the pair of bypass ports, and a control end of the first switch is connected to the controller via the corresponding first driving circuit. Based on a sampling signal provided by the sampling unit, the controller determines whether analog quantity information of the first controllable switch meets a predetermined bypass condition. If the predetermined bypass condition is met, the first switch is controlled to be turned on by using the first driving circuit.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: July 12, 2022
    Assignee: SUNGROW POWER SUPPLY CO., LTD.
    Inventors: Zongjun Yang, Yanfei Yu, Hua Ni
  • Patent number: 11385098
    Abstract: A system for determining a characteristic of a laser includes a collection housing receiving a laser beam comprising a first pulse, a second pulse and a time period between the first pulse and the second pulse. A photon counting detector receives photons from the laser beam disposed to generate photon signals from the laser beam and generating a start signal. A fast diode generates a stop signal to provide a time reference of counted photons ns. A controller is coupled to the photon counting detector and the fast diode. The controller counts photons from the photon counting detector occurring during the time period between the first and second pulse and generates a first output signal corresponding to a power during the time period between the first pulse and the second pulse.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: July 12, 2022
    Assignee: Board of Trustees of Michigan State University
    Inventor: Marcos Dantus
  • Patent number: 11353494
    Abstract: A testing system includes: a substrate having a probe pad and having a supply input; driver circuitry having a driver output; a transistor having a gate, a source, and a drain; and a field effect transistor (FET) engager. The gate of the transistor is coupled to the driver output, and the drain of the transistor is coupled to the supply input. The FET engager is configured to couple the probe pad to the gate of the transistor and provide test instrument measurement of gate current of the transistor without test instrument probe capacitance impacting operation of the transistor.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: June 7, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sigfredo E. Gonzalez Diaz, Benjamin Lee Amey, Patrick Michael Teterud, Hung Nguyen
  • Patent number: 11347948
    Abstract: A payment reader is provided for use in a payment system. The payment reader includes a housing, a non-conductive cover covering the housing and forming an internal compartment, electronic circuitry within the internal compartment and surrounded by the cover, and a mesh of conductive traces provided on the cover and in communication with the electronic circuitry. The cover has an upper wall and interconnected side walls depending downwardly from the upper wall. The lower surface of the upper wall which faces the internal compartment has its entire surface area which is formed of at least one three-dimensional shape which extends outwardly from an x-y plane in the z-direction.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: May 31, 2022
    Assignee: Molex, LLC
    Inventors: Tsuey Choo Lily Chang, Yan Pan, Steven Zeilinger
  • Patent number: 11342389
    Abstract: A display panel, a display device comprising the display panel, and a method for detecting a defect thereof are provided. The method can include preparing the display panel including a first sensing pattern connected to a touch sensor and a second sensing pattern extended from a light emitting device in an active area of the display panel to a non-active area of the display panel, wherein at least one of the first sensing pattern and the second sensing pattern protrudes farther than an end of an encapsulation stack, and the encapsulation stack covers a second electrode of the light emitting device in the active area; detecting a parasitic capacitance between the touch sensor and the second electrode in the active area; comparing the parasitic capacitance with a designated value; and determining that the display panel is defective based on a result of the comparing.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: May 24, 2022
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Eun-Ah Song
  • Patent number: 11327476
    Abstract: A computer implemented method includes turning off a sensor, receiving fall curve data from the sensor, and comparing the received fall curve data to a set of fall curve signatures to identify the sensor or a sensor fault.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: May 10, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Tusher Chakraborty, Akshay Uttama Nambi Srirangam Narashiman, Ranveer Chandra, Rahul Anand Sharma, Manohar Swaminathan, Zerina Kapetanovic, Jonathan Appavoo
  • Patent number: 11329675
    Abstract: A radio frequency module includes a transmit filter of Band A and Band B, a transmit amplifier, and a switch circuit and can perform CA using a transmit signal of Band A and a receive signal of Band B, a transmit band of Band B including a receive band of Band C. The switch circuit includes a switch switching connection between a common terminal and a first selection terminal, a switch switching connection between the common terminal and a second selection terminal, and a switch switching connection between the second selection terminal and a third selection terminal. The common terminal is connected to the transmit amplifier. The first selection terminal is connected to the transmit filter of Band A. The second selection terminal is connected to the transmit filter of Band B. The third selection terminal is connected to a receive path of Band C.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: May 10, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kenji Tahara
  • Patent number: 11315841
    Abstract: A pattern design for defect inspection, the pattern design including a first floating conductive line; a second floating conductive line; and a grounded conductive line disposed between the first floating conductive line and the second floating conductive line. The first floating conductive line, the second floating conductive line, and the grounded conductive line are divided into a main pad region, a plurality of subregions, a plurality of sub-pad regions, and a ground region. The main pad region is positioned at a first end portion of the pattern design. The ground region is positioned at a second end portion of the pattern design. The plurality of subregions and the plurality of sub-pad regions are positioned between the main pad region and the ground region.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: April 26, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Soo Baek, Jin Myoung Lee, Min Soo Kang, Hyun Ah Roh, Bo Young Lee
  • Patent number: 11315453
    Abstract: An electronic device includes a substrate having a top surface, a bottom surface and a side surface between the top surface and the bottom surface, and a test circuit disposed on the substrate. The test circuit extends from the top surface to the bottom surface through the side surface of the substrate and has a current terminal for an ammeter and a voltage terminal for a voltmeter, both of which are disposed on the bottom surface.
    Type: Grant
    Filed: November 8, 2020
    Date of Patent: April 26, 2022
    Assignee: InnoLux Corporation
    Inventor: Shuhei Hosaka
  • Patent number: 11287858
    Abstract: A display device may include a display panel including a signal pad and a circuit board including a connection pad having a first connection pad portion and a second connection pad portion. The second connection pad portion may be thicker than the first connection pad portion and may not be overlapped with the first connection pad portion in a plan view. The connection pad may be in contact with the signal pad. A first surface roughness between the first connection pad portion and the signal pad may be greater than a second surface roughness between the second connection pad portion and the signal pad.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: March 29, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Byoungyong Kim, Seongtaek Lee, Young-Min Park
  • Patent number: 11243242
    Abstract: A system for testing a traction block, such as a railway traction block, includes two zones that are physically separated from one another, an operational zone located in a container and divided into at least two parts. One part is a command part accessible by an operator during testing, and the other part is a high-voltage part inaccessible during testing. The system also includes a test zone located outside the container, and configured to receive the traction block to be tested. The test zone is able to be supplied with electricity during the test by the operational zone using dedicated connections.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: February 8, 2022
    Assignee: ALSTOM Transport Technologies
    Inventor: Laurent Collongues
  • Patent number: 11238301
    Abstract: A computer-implemented method of detecting a foreign object on a background object in an image is provided. The computer-implemented method includes extracting image features of the image based on image characteristics of the background object and a suspected foreign object; detecting a salient region in the image based on a human visual attention model; generating a salient region mask based on detection of the salient region; obtaining the image features in a region surrounded by the salient region mask; perforating feature combination and feature vector length normalization on the image features of the region surrounded by the salient region mask to generate normalized feature vectors; and identifying the suspected foreign object using an image classifier, wherein the image classifier uses the normalized feature vectors as input for identifying the suspected foreign object.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: February 1, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Huanhuan Zhang, Jingtao Xu, Xiaojun Tang, Hui Li
  • Patent number: 11221361
    Abstract: An example test system includes an output stage to source at least one of voltage or current to a channel of a test instrument; a tracking circuit to detect a channel voltage following the output stage and to control a supply voltage to the output stage based on the channel voltage; and a controller to determine a power dissipation of the output stage based on the supply voltage and the channel voltage, and to control the output stage based on the power dissipation in the output stage.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: January 11, 2022
    Assignee: TERADYNE, INC.
    Inventors: Jason A. Messier, Bryce M. Wynn, William Bowhers
  • Patent number: 11215676
    Abstract: The present invention relates to a power circuit, which comprises a detection circuit. The detection circuit includes an abnormality detection circuit. The abnormality detection circuit is coupled to an input terminal or/and an output terminal of the power circuit. An input power is provided to the input terminal, and an output power is provided to the output terminal. The abnormality detection circuit controls the paths from a plurality of energy storage elements to the input terminal and the output terminal of the power circuit. The energy storage elements store the energy of the input power to generate the output power. The abnormality detection circuit detects the state of the input power or/and the output power, and cuts off the paths from a portion of the energy storage elements to the input terminal and the output terminal.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: January 4, 2022
    Assignee: Forcelead Technology Corp.
    Inventors: Ta-Hung Chiu, Mao-Hsiang Yeh
  • Patent number: 11215640
    Abstract: There is provided a prober provided with a plurality of inspection chambers. Each inspection chambers includes: a probe card having a plurality of probes; a probe card holder configured to hold the probe card; a chuck top configured to place a cleaning wafer thereon; an aligner configured to drive the chuck top in a vertical direction when the probe card is cleaned using the cleaning wafer; a seal mechanism configured to allow a sealed space to be provided between the probe card holder and the chuck top; a pressure sensor configured to detect an internal pressure of the sealed space, which fluctuates with an operation of the chuck top driven by the aligner; and an electro-pneumatic regulator configured to control the internal pressure of the sealed space by performing an intake or exhaust operation with respect to the sealed space based on the internal pressure detected by the pressure sensor.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: January 4, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Jun Fujihara
  • Patent number: 11204368
    Abstract: A first signal line pattern has one end electrically connected to a first connector. A second signal line pattern has one end electrically connected to a second connector. The second signal line pattern has the other end facing the other end of the first signal line pattern. A conductive block has a convex portion. The convex portion of the conductive block is electrically connected to a third portion of the conductive pattern positioned between the other end of the first signal line pattern and the other end of the second signal line pattern of the wiring board.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: December 21, 2021
    Assignee: Yokowo Co., Ltd.
    Inventors: Masaki Noguchi, Takahiro Nagata, Tsuyoshi Yamato
  • Patent number: 11184015
    Abstract: In some examples, a device comprises a first driver coupled to a first node, the first node to couple to a first load external to the device. The device comprises a second driver coupled to a second node, the second node coupled to a second load internal to the device. The device comprises a comparison circuit having an inverting input coupled to the first node and a non-inverting input coupled to the second node. Sizes of the second driver and the second load are configured proportionately to sizes of the first driver and the first load, respectively.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: November 23, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ankur Chauhan, Abhrarup Barman Roy
  • Patent number: 11181566
    Abstract: A detection circuit of electromagnetic fault injection includes: a shielding layer configured to shield interference; at least one group of metal-oxide semiconductor MOS transistors, where a source end of the at least one group of MOS transistors is connected to the shielding layer; at least one latch, where a drain end of the at least one group of MOS transistors is connected to an input end of the at least one latch; and a signal output module, where an input end of the signal output module is connected to an output end of the at least one latch. The detection circuit could detect in real time and alarm electromagnetic fault injection in time to ensure robustness and safety of a chip.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: November 23, 2021
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Jianfeng Xue, Jiang Yang
  • Patent number: 11156709
    Abstract: A radar system includes a first radar chip with a first RF contact, a second radar chip with a second RF contact, an RF signal path connecting the first RF contact to the second RF contact, and a local oscillator arranged in the first radar chip and configured to generate an RF oscillator signal, and which is coupled to the first RF contact to transmit the RF oscillator signal to the second radar chip. A feedback circuit arranged in the second radar chip is switchably connected to the second RF contact and is configured to reflect at least part of the RF oscillator signal arriving over the RFRF signal path as an RF feedback signal. A measurement circuit, arranged in the first radar chip, coupled to the first RF contact via a coupler receives the RF feedback signal and is configured to determine a signal that represents a phase shift.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: October 26, 2021
    Inventors: Alexander Melzer, Bernhard Gstoettenbauer, Alexander Onic, Clemens Pfeffer, Christian Schmid
  • Patent number: 11146201
    Abstract: A current value determination device provided with: a capacitor current computation unit for computing the capacitor current of a capacitor included in a high-voltage circuit that drives a motor, on the basis of the input voltage of an inverter included in the high-voltage circuit and the revolution speed of the motor; and a capacitor current determination unit for determining the value of capacitor current on the basis of the input voltage of the inverter, the revolution speed of the motor, the capacitor current computed by the capacitor current computation unit, and a prescribed model for determination.
    Type: Grant
    Filed: August 15, 2018
    Date of Patent: October 12, 2021
    Assignee: MITSUBISHI HEAVY INDUSTRIES THERMAL SYSTEMS, LTD.
    Inventors: Makoto Hattori, Takayuki Takashige, Kyohei Watanabe
  • Patent number: 11137417
    Abstract: A sensor device is provided for testing electrical connections in a DUT using contactless fault detection. The sensor device includes main traces for conducting an RF signal supplied by a signal source; at least one inductor connected to at least one of the main traces; and a slit formed between opposing conductor portions at a tip of the sensor device for sensing open circuits and/or short circuits in portions of the DUT located in a sensing region below the slit, the tip being at an end of the sensor device opposite ends of the main traces connected to the signal source. An electric field, generated by the sensor device in response to the RF signal, substantially concentrates in the slit, enhancing the sensing of the open and/or the short circuits during the contactless fault detection.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: October 5, 2021
    Assignee: Keysight Technologies, Inc.
    Inventors: Tie Qiu, Andrew Choon Kait Tek, Huang Shaoying
  • Patent number: 11115650
    Abstract: A system and a method for monitoring a video communication device configured to monitor an activation state of a video capturing module are provided. A detection circuit is configured to detect an operation current input to the video capturing module. A control circuit is electrically connected to the detection circuit and determines whether the video capturing module is activated according to a magnitude of the operation current.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: September 7, 2021
    Assignee: Acer Incorporated
    Inventors: Ming-Feng Hsieh, Sheng-Yu Weng, Chun-Chih Kuo, Chih-Cheng Chen
  • Patent number: 11102921
    Abstract: A method of assessing a cleanliness of an assembly in a panel during a manufacturing process is provided, wherein an electrical signal of at least one of a predetermined voltage, current or frequency is applied across a first subset and a second subset of nonconnected electrical contacts in a test coupon associated with the assembly, such that the first subset and the second subset have different pitches. In one configuration, the test coupon is tested at higher voltages, currents or frequencies to a point of failure or above a predetermined threshold.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: August 24, 2021
    Assignee: IEC Electronics Corp.
    Inventor: Mark Northrup
  • Patent number: 11094237
    Abstract: A display device includes a display panel including first to fourth panel pads and a connection board including first to fourth connection board pads coupled to the first to fourth pads, respectively. The first and second panel pads are electrically connected to each other, and the third and fourth panel pads are electrically connected to each other. The connection board includes a driving circuit which generates a first test result signal based on a first panel test signal transmitted to the first connection board pad and a first panel feedback signal received from the second connection board pad, generates a second test result signal based on a second panel test signal transmitted to the third connection board pad and a second panel feedback signal received from the fourth connection board pad, and sequentially outputs the first and second test result signals as a test result signal.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: August 17, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sung-Jun Kim, Myung-Seok Kwon, Deok-Hwan Kim, Yun-Tae Kim, Jeong-Hyun Kim, Hasook Kim, Bongchun Park
  • Patent number: 11005642
    Abstract: A circuit includes a source device coupled to an output circuit. The source device is configured to produce a sequence of digital values at a rate defined by a data period. The output circuit is configured to receive the sequence of digital values from the source device, generate a copy of each digital value at a predetermined point during the respective data period, and responsive to initiation of a data transaction during a given data period but before the predetermined point, output the digital value from the source device, whereas responsive to initiation of a data transaction during the given data period but after the predetermined point, output the copy of the digital value.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: May 11, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shawn Xianggang Yu, Venkata Krishnan Kidambi Srinivasan
  • Patent number: 10989766
    Abstract: A test system for checking electrical connections, especially solder connections, between electronic components with a circuit board to be checked, characterized in that the test system includes a communication interface with at least three electrically-conductive contact tips, which by contact with a contacting arrangement on the circuit board having a number of contacting locations enable a data exchange with a data memory and/or a communication module of a circuit board, wherein the data exchange occurs according to a communication protocol.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: April 27, 2021
    Assignee: Endress+Hauser Flowtec AG
    Inventors: Thomas Böhler, Matthias Brudermann, Christoph Werle, Markus Wucher, Daniel Kollmer, Ludovic Adam
  • Patent number: 10983164
    Abstract: A test apparatus may include transceivers and a global de-skew circuit. In a training mode, the transceivers provide first timing information obtained by delaying a first data signal in the range of up to a preset unit interval based on a clock signal and receive second timing information corresponding to timing differences between a slowest transceiver and the remaining transceivers. In an operation mode, the transceivers provide compensation data to a plurality of DUTs (Devices Under Test) substantially simultaneously. The compensation data may be obtained by delaying a second data signal by multiples of the preset unit interval in response to the second timing information. In the training mode, the global de-skew circuit receives the first timing information, calculates, using the first timing information, the timing differences between the slowest transceiver and the remaining transceivers, and provides the second timing information corresponding to the timing differences to the transceivers.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: April 20, 2021
    Assignees: SK hynix Inc., Korea University Research and Business Foundation
    Inventors: Chul Woo Kim, Dong Yoon Kim, In Hwa Jung, Yong Ju Kim
  • Patent number: 10985696
    Abstract: A method, an apparatus, and a device for identifying a cell string fault in an optoelectronic system, where the method includes obtaining at least two groups of current-voltage (I-V) values of a first cell string in the optoelectronic system, performing fitting processing according to the at least two groups of I-V values using a predetermined physical string model to obtain at least one characteristic parameter of the first cell string, and comparing the at least one characteristic parameter with a pre-obtained standard characteristic parameter to determine whether the first cell string is faulty, or performing curve fitting processing on collected data using the physical string model. Therefore, identifying the cell string fault in the optoelectronic system is not affected by inconsistency of environments, and processing efficiency and accuracy of string fault identification are effectively improved.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: April 20, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Guangping Yang, Yongbing Gao
  • Patent number: 10978259
    Abstract: A circuit breaker includes: a live line between a live supply connecting terminal and a live load connecting terminal; a neutral line between a neutral supply connecting terminal and a neutral load connecting terminal; a processing unit; a mechanical switch located in the live line, which mechanical switch is controllable by the processing unit; a trigger for interrupting the live line and/or the neutral line; and an auxiliary line connecting the neutral line with the live line between the mechanical switch and the live load connecting terminal, the auxiliary line including serially a current limiting resistor and a control switch controllable by the processing unit. The processing unit controls the control switch and to open and close at least the mechanical switch for a removal of oxidation layers of mechanical contacts of at least the mechanical switch by controlled arcing.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: April 13, 2021
    Assignee: EATON INTELLIGENT POWER LIMITED
    Inventor: Kenan Askan
  • Patent number: 10979041
    Abstract: A system is provided. The system includes a semi-conductor device and a gate drive board. The gate drive board provides a voltage to the semi-conductor device. The system also includes a controller and a monitoring circuit. The controller drives the voltage provided by the gate drive board. The monitoring circuit is coupled to the gate drive board to monitor operations of the controller and the semi-conductor device.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: April 13, 2021
    Assignee: HAMILTON SUNSTRAND CORPORATION
    Inventors: Christopher J. Courtney, Gary L. Miles
  • Patent number: 10955465
    Abstract: Disclosed herein are testing apparatus and methods to identify latent defects in IC devices based on capacitive coupling between bond wires. Bond wires may have latent defects that do not appear as hard shorts or hard opens at the time of testing, but may pose a high risk of developing into hard shorts or hard opens over time. A latent defect may form when two adjacent bond wires are disturbed to become close to each other. According to some embodiments, capacitive coupling between a pair of pins may be used to provide an indication of a near-short latent defect between bond wires connected to the pair of pins.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: March 23, 2021
    Assignee: Teradyne, Inc.
    Inventors: Anthony J. Suto, John Joseph Arena, Joseph Francis Wrinn
  • Patent number: 10944276
    Abstract: The device housing includes a roller cradle. The device can include a device support roller rotationally located in the roller cradle, the device support roller being removably couplable with the roller cradle. Also, a release mechanism can be include, where the release mechanism includes a push button operably coupled to a coupler mechanism that is operably coupled to the device support roller. The release mechanism and/or coupler mechanism are biased. When the release mechanism is not activated, the device support roller is engaged, and when the release mechanism is active, the device support roller is disengaged. The system can include a plurality of device support rollers, each device support roller having a device-receiving slot, each device-receiving slot being of a different shape and/or dimension from the other device-receiving slots of the other device support rollers.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: March 9, 2021
    Assignee: REMVO Inc.
    Inventor: John S. Smith
  • Patent number: 10931101
    Abstract: The present invention discloses an electrostatic discharge (ESD) protection circuit, including: a first terminal configured to receive a first voltage; a second terminal configured to receive a second voltage; a detection voltage generating circuit configured to provide a detection voltage according to the first voltage and the second voltage; a warning circuit configured to generate a control signal according to the detection voltage, in which the control signal indicates a normal condition when the detection voltage satisfies predetermined voltage setting, and the control signal indicates an abnormal condition when the detection voltage does not satisfy the predetermined voltage setting; and a protected circuit configured to carry out a self-protection operation when receiving the control signal indicating the abnormal condition.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: February 23, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chien-Ming Wu, Jian-Ru Lin, Liang-Huan Lei, Cheng-Pang Chan
  • Patent number: 10928461
    Abstract: Battery management systems and methods for operation of same are provided. A first switchable resistance may be connected between a cell stack positive end and ground. A second switchable resistance may be connected between a cell stack negative end and ground. The switches for each resistance may be alternately opened and closed, with comparison of the resulting currents through each resistance being indicative of a location of isolation leakage current within a battery system cell stack, and/or the magnitude of isolation leakage current. Currents through the first and/or second switchable resistances may also be indicative of Y capacitance. The first and second switchable resistances may further be used to reduce energy stored by Y capacitance.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: February 23, 2021
    Inventor: Erik Stafl
  • Patent number: 10921202
    Abstract: A tamper detection system includes a detector that measures a value of a parameter for each connection of multiple breakable remakeable connections between first and second components. The system includes an analyzer that compares the measured parameter value for each connection or a representative value derived from measured parameter values of the connections to an expected value. Based on the comparisons, the analyzer determines whether the multiple breakable remakeable connections between the first and second components have been broken and remade.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: February 16, 2021
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Warren B. Jackson, Eugene M. Chow
  • Patent number: RE48963
    Abstract: A connection device for computing devices is described. In one or more implementations, a connection device comprises a plurality of connection portions that are physically and communicatively coupled, one to another. Each of the plurality of connection portions has at least one communication contact configured to form a communicative coupling with a respective one of a plurality of computing devices and with at least one other communication contact of another one of the connections portions to support communication between the plurality of computing devices. Each of the plurality of connection portions also includes a magnetic coupling device to form a removable magnetic attachment to the respective one of the plurality of computing devices.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: March 8, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Steven Nabil Bathiche, Flavio Protasio Ribeiro, Nigel Stuart Keam, Bernard K. Rihn, Panos C. Panay, David W. Voth