By Electrical Contact Means Patents (Class 324/750.24)
  • Patent number: 11169206
    Abstract: The present disclosure is provided with a probe card and a transfer stage for transferring an inspection target toward the probe card. The transfer stage is provided with a chuck top on which the inspection target is mounted, an aligner configured to be contacted to or separated from the chuck top, and an aligning mechanism for aligning the chuck top with the aligner. The aligning mechanism has radially-expandable positioning pins at a plurality of positions on the upper surface of the aligner, and pin insertion members at positions on the lower surface of the chuck top corresponding to the positioning pins, the pin insertion members having pin insertion holes of which diameters are larger than those of the positioning pins that are not radially expanded. The chuck top is aligned with the aligner by inserting the positioning pins into the pin insertion holes and radially expanding the positioning pins.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: November 9, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Jun Fujihara, Masanori Ueda, Kentaro Konishi
  • Patent number: 10701461
    Abstract: A video processing method, a terminal, and a server, where the method includes receiving a media presentation description (MPD) file sent by the server, where the MPD file includes region information of a region that can be independently decoded in the video, determining, according to the region information, a region used for playback on a terminal from the region that can be independently decoded, determining a to-be-acquired media segment according to the MPD file, acquiring a location in which data content is stored in the media segment, acquiring, according to the location in which the data content is stored in the media segment, the data content from the media segment stored in the server, and playing a picture of the region for the playback on the terminal. Therefore, it is not required to independently store a partial video on the server, thereby saving a storage resource of the server.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: June 30, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiaofeng Yang, Yuanyuan Zhang, Teng Shi
  • Patent number: 10171888
    Abstract: A video processing method, a terminal, and a server, where the method includes receiving a media presentation description (MPD) file sent by the server, where the MPD file includes region information of a region that can be independently decoded in the video, determining, according to the region information, a region used for playback on a terminal from the region that can be independently decoded, determining a to-be-acquired media segment according to the MPD file, acquiring a location in which data content is stored in the media segment, acquiring, according to the location in which the data content is stored in the media segment, the data content from the media segment stored in the server, and playing a picture of the region for the playback on the terminal. Therefore, it is not required to independently store a partial video on the server, thereby saving a storage resource of the server.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: January 1, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiaofeng Yang, Yuanyuan Zhang, Teng Shi
  • Patent number: 9134367
    Abstract: A sensing structure for use in testing integrated circuits on a substrate. The sensing structure includes at least two sensing regions connectable to a probe and at least one first sensing element. Each of the at least one first sensing elements is directly connected to two sensing regions such that for each sensing region a different value of an electrical parameter is measurable between the sensing region and a first reference potential so as to reliably determine a drift direction of a probe.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: September 15, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Patent number: 9007082
    Abstract: The terminals of a device under test are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane that includes a top contact plate facing the device under test, a bottom contact plate facing the load board including a rocker base protrusion, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The top and bottom pins contact each other at an interface that is inclined with respect to the membrane surface normal. When compressed longitudinally, the pins translate toward each other by sliding along the interface. The sliding is largely longitudinal, with a small and desirable lateral component determined by the inclination of the interface.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: April 14, 2015
    Assignee: Johnstech International Corporation
    Inventors: John E. Nelson, Jeffrey C. Sherry, Patrick J. Alladio, Russell F. Oberg, Brian Warwick, Gary W. Michalko
  • Publication number: 20150091595
    Abstract: A prober system comprises a chuck, sensor and processing circuit. The chuck is configured to horizontally move a semiconductor wafer having a plurality of dies to position a selected group of the dies for parallel testing and vertically move the wafer to press the selected group of dies in contact with probes of a tester probe card. The sensor is configured to measure the vertical movement of the chuck when the wafer is on the chuck. The processing circuit is configured to control the horizontal and vertical movement of the chuck to test different groups of the dies, determine a total number of touchdowns between the wafer and the probes based on the vertical movement of the chuck measured by the sensor and associate each of the touchdowns with a location of the wafer contacted by the probes during that touchdown. A corresponding test data analysis system is also provided.
    Type: Application
    Filed: October 1, 2013
    Publication date: April 2, 2015
    Inventors: Stefan Pesl, Robert Schütz
  • Publication number: 20150084658
    Abstract: The present invention relates to a test socket which allows for ease of alignment, and more particularly, to a test socket that is interposed between a device to be inspected and an inspection apparatus so as to electrically connect terminals of the device to be inspected and pads of the inspection apparatus, the test socket including: an alignment member that has a plurality of through-holes formed at points corresponding to the terminals of the device to be inspected or the pads of the inspection apparatus and is attached to the inspection apparatus such that the through-holes are located at the pads of the inspection apparatus; and an elastic conductive sheet including conductive parts that are disposed at the points corresponding to the terminals of the device to be inspected and include a plurality of conductive particles that are distributed in an insulating elastic material, insulating support parts that support the conductive parts and disconnect an electrical connection between adjacent conductive pa
    Type: Application
    Filed: April 29, 2013
    Publication date: March 26, 2015
    Inventor: Jae Hak Lee
  • Patent number: 8981809
    Abstract: A compliant printed circuit semiconductor tester interface that provides a temporary interconnect between terminals on integrated circuit (IC) devices being tested. The compliant printed circuit semiconductor tester interface includes at least one dielectric layer printed with recesses corresponding to a target circuit geometry. A conductive material is deposited in at least a portion of the recesses comprising a circuit geometry and a plurality of first contact pads accessible along a first surface of the compliant printed circuit. At least one dielectric covering layer is preferably applied over the circuit geometry. A plurality of openings in the dielectric covering layer are provided to permit electrical coupling of terminals on the IC device and the first contact pads. Testing electronics that to test electrical functions of the IC device are electrically coupled to the circuit geometry.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: March 17, 2015
    Assignee: Hsio Technologies, LLC
    Inventor: James Rathburn
  • Patent number: 8970242
    Abstract: Provided is a method for manufacturing a probe card which inspects electrical characteristics of a plurality of semiconductor devices in batch. The method includes: a step of forming a plurality of probes, which are to be brought into contact with external terminals of the semiconductor devices, on one side of a board which forms the base body of the probe card; a step of forming on the board, by photolithography and etching, a plurality of through-holes which reach the probes from the other side of the board; a step of forming, in the through-holes, through electrodes to be conductively connected with the probes, respectively; and a step of forming wiring, which is conductively connected with the through electrodes, on the other side of the board.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: March 3, 2015
    Assignee: Rohm Co, Ltd.
    Inventors: Goro Nakatani, Masahiro Sakuragi, Koichi Niino
  • Patent number: 8947108
    Abstract: A method for determining and retrieving positional information includes forming a grid by locating a plurality of first conductive elements on a surface and a plurality of second conductive elements on the surface. A second grid is coupled to the surface and electrically isolated from the grid. The surface is penetrated with a projectile and a first location of a first penetration of the surface is electronically determined based on a first change in a first electrical measurement. A plurality of third and fourth electrical measurements are performed in a second plurality of locations of the second grid and the location impact is electronically determined.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: February 3, 2015
    Inventor: Bruce Hodge
  • Publication number: 20140354316
    Abstract: There is provided a circuit board inspection tool configured to electrically connect a circuit board with a built-in electronic component and a circuit board inspection apparatus configured to inspect a plurality of wiring patterns formed on the circuit board. The circuit board inspection tool includes a plurality of contactors, an electrode body on which the respective contactors abut at the other end and which are electrically connected to the circuit board inspection apparatus, and a holding body having an inspection-side holding unit configured to guide one ends of the contactors to the inspection points and an electrode-side holding unit configured to guide the other ends thereof to the electrode units, wherein an amount of projection of a contactor which abuts on an inspection point of a wiring pattern conductively connected to the electronic component is formed to be greater than that of the other contactors.
    Type: Application
    Filed: June 3, 2014
    Publication date: December 4, 2014
    Applicant: NIDEC-READ CORPORATION
    Inventor: Shinji Matsuoka
  • Publication number: 20140320156
    Abstract: An apparatus for detecting misalignment of a test pad and a probe card includes: a test pad unit; a guard unit configured to surround the test pad unit, and formed to maintain a predetermined interval with the test pad unit; and a power supply unit configured to supply a predetermined voltage to the guard unit.
    Type: Application
    Filed: September 5, 2013
    Publication date: October 30, 2014
    Applicant: SK hynix Inc.
    Inventor: Jong Su KIM
  • Patent number: 8870818
    Abstract: Systems and methods for alignment and detection of a consumable component are disclosed herein. For example, a method for determining if a consumable component is coupled to a durable component to enable dispersion of a medicine is provided. The method includes determining if a signal from an electrical contact coupled to a durable component has changed an electrical state, and comparing the signal to a reference signal from a second electrical component coupled to the durable component. The method includes sampling a sensor coupled to the durable component to acquire sensor data indicative of a magnetic field observed by the sensor, and outputting data that a consumable component is coupled to the durable component if the signal is different than the reference signal, and the sensor data is within an acceptable range.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: October 28, 2014
    Assignee: Medtronic MiniMed, Inc.
    Inventors: Juan M. Alderete, Jr., R. Marie Tieck
  • Patent number: 8841918
    Abstract: Provided is a switching apparatus comprising a contact point section that includes a first contact point; an actuator that includes a second contact point and moves the second contact point to contact or move away from the first contact point; and a control section that controls a first drive voltage. The actuator includes a first piezoelectric film that expands and contracts according to the first drive voltage and a support layer disposed on the first piezoelectric film. The control section causes the first piezoelectric film to contract by causing a change from a voltage that applies an electric field that is less than a first coercive electric field to a voltage that applies an electric field that exceeds the first coercive electric field, and causes the first piezoelectric film to expand by outputting a voltage that applies an electric field that is less than a second coercive electric field.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: September 23, 2014
    Assignee: Advantest Corporation
    Inventors: Hisao Hori, Yoshikazu Abe, Yoshihiro Sato
  • Publication number: 20140266273
    Abstract: A testing apparatus with reduced warping of the probe card and a method of reducing warping of a probe card of a testing apparatus are disclosed. The testing apparatus can include a testing head and a platform opposite the testing head, where the testing head and platform move relative to one another to bring a sample into contact with probing tips of the testing apparatus. The testing head can include a probe card printed circuit board, a stiffener, a discontinuous backer and a plurality of probing tips. The stiffener can be coupled to and reinforcing the probe card. The discontinuous backer can extend from the probe card to the stiffener, and can include at least one unfilled void extending from the stiffener to the probe card. The plurality of probing tips can extend from a distal end of the testing head.
    Type: Application
    Filed: April 18, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mill-Jer WANG, Ching-Nen PENG, Hung-Chih LIN, Wei-Hsun LIN, Sen-Kuei HSU, De-Jian LIU
  • Patent number: 8829918
    Abstract: A system for monitoring a die connection includes a die bonded to a substrate and a connection indicator circuit coupled to a monitor pad of the die. The connection indicator circuit is configured to detect a connection failure of the monitor pad. A signal corresponding to the monitor pad of the die is monitored, and an indication of a pad connection failure associated with the monitor pad is provided in response to a change in the monitored signal.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: September 9, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffry S. Sylvester, Richard H. Hodge
  • Patent number: 8816708
    Abstract: Electronic test system and associated method, including a first and a second connection terminals respectively coupled to two pins of a chip under test, a signal source terminal coupled to a signal generator, a first and a second measurement terminals coupled to a tester, a fifth switch, a seventh switch and a switch circuit which has a first and a fourth front terminals coupled to the signal source terminal, has a first and a fourth back terminals coupled to the first and second connection terminals, and controls conduction between the first front terminal and the first back terminal, as well as conduction between the fourth front terminal and the fourth back terminal. The fifth switch is coupled between the fourth back terminal and the first measurement terminal, and the seventh switch is coupled between the first connection terminal and the second measurement terminal.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: August 26, 2014
    Assignees: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Shin-Cheng Chu, Ching-Tsung Chen, Teng-Hui Lee, Chia-Jen Kao
  • Publication number: 20140232424
    Abstract: An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.
    Type: Application
    Filed: April 28, 2014
    Publication date: August 21, 2014
    Applicant: Aehr Test Systems
    Inventors: Donald P. Richmond, II, Kenneth W. Deboe, Frank O. Uher, Jovan Jovanovic, Scott E. Lindsey, Thomas T. Maenner, Patrick M. Shepherd, Jeffrey L. Tyson, Mark C. Carbone, Paul W. Burke, Doan D. Cao, James F. Tomic, Long V. Vu
  • Publication number: 20140225636
    Abstract: A probe apparatus has probe wires with a contact pattern on one side. The contact pattern is for contacting a respective contact pattern on another test equipment or component, such as a circuit board. The probe wires have tips that probe a device desired for testing. Signals are transmitted through the probe wires from the probe card, for example, through a circuit board to other diagnostic equipment. The contact of the probe card with the circuit board allows signals to be transferred through the probe wires to the other diagnostic equipment. On another side of the probe card is a connector structure. The connector structure includes a retainer that can allow the probe card to be replaced from a test system, such as allowing it to be connected and disconnected from a holder.
    Type: Application
    Filed: July 6, 2012
    Publication date: August 14, 2014
    Applicant: CELADON SYSTEMS, INC.
    Inventors: Bryan J. Root, William A. Funk, John L. Dunklee
  • Publication number: 20140208279
    Abstract: A method includes contacting a first group of through-silicon vias (TSVs) contacts with a multi-contact probe and applying a first voltage value to each of the first group of TSV contacts via the multi-contact probe, where the first group of TSV contacts corresponds to a first group of TSVs. The method also includes determining, based on a second voltage value detected at a particular TSV of the first group of TSVs, whether the particular TSV corresponds to a TSV test result.
    Type: Application
    Filed: January 21, 2013
    Publication date: July 24, 2014
    Applicant: QUALCOMM INCORPORATED
    Inventor: Sudipta Bhawmik
  • Patent number: 8779789
    Abstract: Translators coupleable to opposing surfaces of microelectronic substrates for testing, and associated systems and methods are disclosed. An arrangement in accordance with one embodiment includes a microelectronic substrate having a first major surface, a second major face facing opposite from the first major surface, and electrically conductive through-substrate vias extending through the substrate and electrically accessible from both the first and second surfaces.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 15, 2014
    Assignee: Advanced Inquiry Systems, Inc.
    Inventor: Morgan T. Johnson
  • Publication number: 20140184257
    Abstract: An example test system includes: a pin electronics board for exchanging signals with a device under test (DUT), where the pin electronics board includes first electrical contacts; an interposer between the pin electronics board and a paddle board, where the paddle board includes second electrical contacts, and where the interposer includes electrical connectors for use in establishing electrical pathways between the first electrical contacts and the second electrical contacts; and an actuator configured to force the paddle board and the interposer to make contact so as to cause the electrical connectors to contact the second electrical contacts and thereby establish the electrical pathways.
    Type: Application
    Filed: December 27, 2012
    Publication date: July 3, 2014
    Applicant: Teradyne, Inc.
    Inventors: Michael Caradonna, Jacob Fern, Stephen Wilkinson
  • Publication number: 20140167800
    Abstract: A semiconductor chip panel includes a plurality of semiconductor chips embedded in an encapsulation material. At least part of the semiconductor chips comprise a first electrical contact element on a first main face and a second electrical contact element on a second main opposite to the first main face, respectively. One of the plurality of semiconductor chips is tested by establishing an electrical contact between a test contact device and the first electrical contact element and between an electrically conductive holder and the second contact element.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 19, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Edward Fuergut, Horst Groeninger
  • Publication number: 20140139247
    Abstract: Embodiments of the present disclosure describe interposer apparatus and methods for their fabrication and use. In some embodiments, an interposer includes a first frame having a first opening, a second frame having a second opening, and a body frame, disposed between the first frame and the second frame. A first end portion of a pin is disposed in the first opening, a second end portion of the pin is disposed in the second opening, and a body portion of the pin is disposed in the body opening between the first and second frames. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: November 21, 2012
    Publication date: May 22, 2014
    Inventors: Youngseok Oh, Joe F. Walczyk
  • Patent number: 8706289
    Abstract: Methods and systems, in one embodiment, for receiving a warped flexible wafer to be transferred between a first mechanism and a second mechanism are described. The method and system senses a first vacuum suction between the warped flexible wafer and the first mechanism. The warped flexible wafer is positioned to define a gap between the warped flexible wafer and the second mechanism. Methods and systems for closing the gap incrementally between the warped flexible wafer and the second mechanism are described. At each increment, the methods and systems detect whether a second vacuum suction is created between the warped flexible wafer and the second mechanism. When a second vacuum suction is detected between the warped flexible wafer and the second mechanism, the first vacuum suction between the warped flexible wafer and the first mechanism is released.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: April 22, 2014
    Assignee: FormFactor, Inc.
    Inventors: Bjorn Monteen, Gustaaf Ponder
  • Patent number: 8692558
    Abstract: A display panel and a testing method of the display panel are provided. The display panel has a display region and a non-display region and includes a first substrate, a second substrate, and a display medium. The display panel further includes scan lines, data lines, pixel units, at least one testing line, and at least one testing pad. The scan lines and the data lines are located on the first substrate within the display region. The pixel units are located on the first substrate within the display region. Each pixel unit electrically connects one of the scan lines and one of the data lines. The testing line is located on the first substrate within the non-display region, crosses over the scan lines, and is insulated from the scan lines. The testing pad is located on the first substrate within the non-display region and electrically connected to the testing line.
    Type: Grant
    Filed: July 24, 2011
    Date of Patent: April 8, 2014
    Assignee: Au Optronics Corporation
    Inventor: Chung-Ming Shen
  • Patent number: 8655350
    Abstract: A pn junction type solar cell is formed in a predetermined region on a substrate made of glass. Light emitted from a light emitting unit reaches an n-type semiconductor layer after it passed through substrate. The solar cell generates electromotive force corresponding to a quantity of the emitted light. A control circuit, a mask ROM, a transmitting circuit and an antenna are formed on an upper side of the solar cell. A surface of a semiconductor storage device is entirely covered with an insulating film to block entry of outside air. The insulating film is typically formed of physicochemically stable glass or silicon dioxide.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: February 18, 2014
    Assignees: Sharp Kabushiki Kaisha, Kyoto University, Keio University
    Inventors: Shigeki Imai, Yukihiro Nakamura, Hiroyuki Ochi, Naohisa Ohta, Sadayasu Ono
  • Patent number: 8642925
    Abstract: A heating device for testing integrated components is disclosed. In one embodiment, an inner casing is arranged in the heating device surrounding a holding chamber. The inner casing contains at least one recess in which an electrically conductive contact device is moveably arranged. This permits contact to be reliably made with a circuit to be tested. If the inner casing is of compact design, there is a very homogeneous temperature distribution in the heating device.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: February 4, 2014
    Assignee: Infineon Technologies AG
    Inventor: Robert Keller
  • Publication number: 20140021975
    Abstract: An automatic aligning apparatus for aligning aligning components of a first object with aligning components of a second object includes first and second aligning mechanisms. The first aligning mechanism carries the first object and has a guiding groove. The second aligning mechanism has a carrying component that carries the second object, two rear holding plates, and two connecting components, each extending through a through hole in a corresponding rear holding plate and having two clamping parts that clamp a corresponding rear holding plate. The carrying component is movable between an initial position and an aligning position where a guiding stud of the carrying component extends into the guiding groove.
    Type: Application
    Filed: February 13, 2013
    Publication date: January 23, 2014
    Applicant: WISTRON CORPORATION
    Inventor: Jan Hong Guo
  • Publication number: 20140002122
    Abstract: A semiconductor device includes a first wafer having i) a plurality of semiconductor dies, ii) a plurality of scribe lines adjacent one or more of the semiconductor dies, iii) a test access interface positioned in one or more of the scribe lines, wherein the test access interface has a first plurality of through-substrate conductors with a standardized physical layout, and iv) electrical couplings between at least some of the through-substrate conductors and at least one of the semiconductor dies. Methods, apparatus and systems for testing this and other types of semiconductor devices are also disclosed.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 2, 2014
    Applicant: ADVANTEST (SINGAPORE) PTE. LTD.
    Inventors: Larry John Dibattista, Duncan Packard Gurley
  • Publication number: 20130342230
    Abstract: Measuring current-voltage (I-V) characteristics of a solar cell using a lamp that emits light, a substrate that includes a plurality of solar cells, a positive electrode attached to the solar cells, and a negative electrode peripherally deposited around each of the solar cells and connected to a common ground, an articulation platform coupled to the substrate, a multi-probe switching matrix or a Z-stage device, a programmable switch box coupled to the multi-probe switching matrix or Z-stage device and selectively articulating the probes by raising the probes until in contact with at least one of the positive electrode and the negative electrode and lowering the probes until contact is lost with at least one of the positive electrode and the negative electrode, a source meter coupled to the programmable switch box and measuring the I-V characteristics of the substrate.
    Type: Application
    Filed: August 20, 2013
    Publication date: December 26, 2013
    Applicant: Intermolecular, Inc
    Inventors: Yun Wang, Tony P. Chiang, Chi-I Lang
  • Publication number: 20130265071
    Abstract: Translators coupleable to opposing surfaces of microelectronic substrates for testing, and associated systems and methods are disclosed. An arrangement in accordance with one embodiment includes a microelectronic substrate having a first major surface, a second major face facing opposite from the first major surface, and electrically conductive through-substrate vias extending through the substrate and electrically accessible from both the first and second surfaces.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 10, 2013
    Applicant: ADVANCED INQUIRY SYSTEMS, INC.
    Inventor: Morgan Johnson
  • Publication number: 20130249581
    Abstract: A probe apparatus is provided, comprising a card clamp mechanism configured to detachably clamp a probe card equipped with a plurality of probes; a wafer chuck configured to mount a semiconductor wafer thereon and configured to provide contact between electrodes formed in the semiconductor wafer with the probes of the probe card clamped by the card clamp mechanism with an operation of a drive mechanism; and a card movement mechanism configured to move the card clamp mechanism and the probe card clamped by the card clamp mechanism to at least two positions spaced at a predetermined distance.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 26, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Mitsuyoshi MIYAZONO
  • Publication number: 20130241588
    Abstract: An inspection chamber 14 of a wafer inspection apparatus includes a probe card 20 having probes 25 on a surface facing a wafer W; a pogo frame 40 contacted with a surface of the probe card 20 opposite to the surface facing the wafer W; a chuck member 23 disposed to face the probe card 20; positioning pins 61 provided on the chuck member 23. Further, a transfer device 13 includes a transfer arm 13A having recesses 62 to be fitted to the positioning pins 61. The probe card 20 loaded into the inspection chamber 14 by the transfer arm 13A is aligned with the positioning pins 61, and the wafer W loaded into the inspection chamber 14 is aligned with the positioning pins 61. Accordingly, the probe card 20 and the wafer W are located at electrical characteristic inspection positions where electrical characteristics of semiconductor devices are inspected.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 19, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Hiroshi Yamada
  • Publication number: 20130234744
    Abstract: A method performs a diagnosis of a lambda sensor of a “UEGO” type of an exhaust system for an internal-combustion engine. The lambda sensor includes a series of pins. The diagnosis method comprises steps of: heating the lambda sensor to cause the lambda sensor to reach an inner temperature that is higher than about 600° C.; polarizing a first one of the pins by connecting the first pin to a supply voltage through a first limiting resistance; measuring a voltage of all of the pins while the first pin is connected to the supply voltage; and diagnosing a presence of a short circuit to an electrical ground if the voltage of at least one of the pins is lower than a predetermined threshold. A control unit performs the diagnosis.
    Type: Application
    Filed: November 28, 2012
    Publication date: September 12, 2013
    Applicant: MAGNETI MARELLI S.P.A.
    Inventors: Piero Maria Carbonaro, Marco Ceroni
  • Publication number: 20130214808
    Abstract: Measuring current-voltage (I-V) characteristics of a solar cell using a lamp that emits light, a substrate that includes a plurality of solar cells, a positive electrode attached to the solar cells, and a negative electrode peripherally deposited around each of the solar cells and connected to a common ground, an articulation platform coupled to the substrate, a multi-probe switching matrix or a Z-stage device, a programmable switch box coupled to the multi-probe switching matrix or Z-stage device and selectively articulating the probes by raising the probes until in contact with at least one of the positive electrode and the negative electrode and lowering the probes until contact is lost with at least one of the positive electrode and the negative electrode, a source meter coupled to the programmable switch box and measuring the I-V characteristics of the substrate.
    Type: Application
    Filed: March 25, 2013
    Publication date: August 22, 2013
    Applicant: Intermolecular, Inc.
    Inventor: Intermolecular, Inc.
  • Publication number: 20130169301
    Abstract: The elongated body of an electrically conductive contact probe can be disposed in a guide hole and can include a patterned region for engaging and riding on a contact region of an inner sidewall of the guide hole as the elongated body moves in the guide hole in response to a force on a tip of the probe. As the patterned region rides the contact region, the tip moves in a lateral pattern that is a function of the surface(s) of the patterned region.
    Type: Application
    Filed: January 2, 2013
    Publication date: July 4, 2013
    Applicant: FORMFACTOR, INC.
    Inventor: FormFactor, Inc.
  • Publication number: 20130154678
    Abstract: The terminals of a device under test are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane that includes a top contact plate facing the device under test, a bottom contact plate facing the load board including a rocker base protrusion, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The top and bottom pins contact each other at an interface that is inclined with respect to the membrane surface normal. When compressed longitudinally, the pins translate toward each other by sliding along the interface. The sliding is largely longitudinal, with a small and desirable lateral component determined by the inclination of the interface.
    Type: Application
    Filed: June 20, 2012
    Publication date: June 20, 2013
    Applicant: Johnstech International Corporation
    Inventors: John E. Nelson, Jeffrey C. Sherry, Patrick J. Alladio, Russell F. Oberg, Brian Warwick, Gary W. Michalko
  • Publication number: 20130102091
    Abstract: Techniques for configuring a test system that enable simple specification of a degree of concurrency in testing separate functional portions of a semiconductor device. For a test flow with multiple sub-flows; the pins accessed in connection with each sub-flow may define a flow domain. Site regions, each associated with a flow domain, may be defined. Tester sites may be associated with each of these flow domain specific site regions and independently operating resources may be assigned to these tester sites. A second portion of the defined site regions may be associated with tester sites, but resources assigned to these site regions may be accessed from multiple flow domains. Test blocks, even if not developed for concurrent execution, may be executed concurrently using resources in the flow domain specific site regions. Flexibility is provided to share resources through the use of the second portion of the site regions.
    Type: Application
    Filed: October 25, 2011
    Publication date: April 25, 2013
    Applicant: Teradyne, Inc.
    Inventors: Jason D. King, Richard Pye, Randall B. Stimson, Steven R. Shirk
  • Publication number: 20130093446
    Abstract: A support body for a plurality of contact terminals included in a probe card for inspecting semiconductor devices formed in a semiconductor substrate is provided. The support body includes a main body formed by stacking a plurality of plate-shaped members, a plurality of contact terminal holes formed through the main body in a thickness direction of the plate-shaped members, and one or more coolant paths provided in the main body. Further, the contact terminals respectively are inserted into the contact terminal holes.
    Type: Application
    Filed: October 16, 2012
    Publication date: April 18, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: TOKYO ELECTRON LIMITED
  • Patent number: 8354854
    Abstract: In a first slot of a plurality of adjacent slots in alignment with traces on a load board of a tester, first and second conductor layers, each to make electrical contact with both a load board trace and a DUT lead. Each of the first and second contacts receives force from a resilient element extending across the slots and that urges a contact point on the contact against at least one trace and a DUT lead. Insulation between said first and second contacts in the first slot electrically insulates the first and second contacts from each other within the first slot.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: January 15, 2013
    Assignee: Johnstech International Corporation
    Inventor: Jeffrey C. Sherry
  • Patent number: 8289042
    Abstract: A test apparatus features an upper RF impermeable hood and lower RF impermeable hood, wherein each of the hoods have internal dividers. When in a closed position, the hoods and dividers create two or more RF impermeable chambers. The hoods are configured to enclose or sandwich a pallet supporting two or more printed circuit boards. One of the printed circuit boards is disposed in each chamber formed by the hoods and dividers.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: October 16, 2012
    Assignee: Research In Motion Limited
    Inventors: Marc Adam Kennedy, Arkady Ivannikov, Michael Andrew Carney
  • Patent number: 8240650
    Abstract: A chuck with triaxial construction comprises a receiving surface for a test substrate and arranged below the receiving surface: an electrically conductive first surface element, an electrically conductive second surface element electrically insulated therefrom, and an electrically conductive third surface element electrically insulated therefrom, and, between the first and the second surface element, a first insulation element and, between the second and the third surface element, a second insulation element.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: August 14, 2012
    Assignee: Cascade Microtech, Inc.
    Inventors: Michael Teich, Karsten Stoll, Axel Schmidt, Stojan Kanev, Jörg Kiesewetter
  • Publication number: 20120169365
    Abstract: A substrate inspecting apparatus includes an inspecting apparatus main body for electrically inspecting a substrate on which an electronic circuit and electrode pads are formed, and a contactor electrically connected to the inspecting apparatus main body. The contactor includes contact portions made of conductive material. In the substrate inspecting apparatus, the contact portions are electrically connected to the electrode pads of the substrate via conductive liquid to inspect the electronic circuit formed on the substrate.
    Type: Application
    Filed: September 9, 2010
    Publication date: July 5, 2012
    Applicant: Tokyo Electron Limited
    Inventor: Haruo Iwatsu
  • Publication number: 20120126230
    Abstract: A method for manufacturing a semiconductor chip stack device is provided. The method includes forming a first connecting element array on a surface of a first semiconductor chip; forming a second connecting element array on a surface of a second semiconductor chip, the second array comprising more connecting elements than the first array and the pitch of the first array being a multiple of the pitch of the second array; applying the first chip against the second chip; and setting up test signals between the first and second chips to determine the matching between the connecting elements of the first array and the connecting elements of the second array.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 24, 2012
    Applicant: STMicroelectronics SA
    Inventors: Richard Fournel, Pierre Dautriche
  • Patent number: 8178840
    Abstract: An object of the present invention is to obtain a clear absorbed current image without involving the difference in gain of amplifier between inputs, from absorbed currents detected by using a plurality of probes and to improve measurement efficiency. In the present invention, a plurality of probes are brought in contact with a specimen. While irradiating the specimen with an electron beam, currents flowing in the probes are measured. Signals from at least two probes are input to a differential amplifier. An output of the differential amplifier is amplified. On the basis of the amplified output and scanning information of the electron beam, an absorbed current image is generated. According to the invention, a clear absorbed current image can be obtained without involving the difference in gain of amplifier between inputs. Thus, measurement efficiency in a failure analysis of a semiconductor device can be improved.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: May 15, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Tomoharu Obuki, Hiroshi Toyama, Yasuhiro Mitsui, Munetoshi Fukui, Yasuhiko Nara, Tohru Ando, Katsuo Ooki, Tsutomu Saito, Masaaki Komori
  • Patent number: 8089292
    Abstract: A system and method allow accurate calculation of probe float through optical free-hanging and electrical planarity measurement techniques. In accordance with an examplary embodiment, probe float may be determined by acquiring a free-hanging planarity measurement, obtaining a first electrical contact planarity measurement, and calculating probe float using results of the acquiring and the obtaining operations.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: January 3, 2012
    Assignee: Rudolph Technologies, Inc.
    Inventors: John T. Strom, Raymond H. Kraft
  • Patent number: 7999564
    Abstract: A probe apparatus is provided with a plurality of probe tiles, an interchangeable plate for receiving the probe tiles, a floating plate being disposed between the respective probe tile and a receiving hole on the interchangeable plate, and a control mechanism providing multi-dimensional freedom of motions to control a position of the probe tile relative to the respective receiving hole of the interchangeable plate. A method of controlling the floating plate is also provided by inserting a pair of joysticks into two respective adjustment holes disposed on the floating plate and moving the pair of joysticks to provide translational motions (X-Y) and rotational (theta) motion of the floating plate, and turning the pair of jack screws clockwise and counter-clockwise to provide a translational motion (Z) and two rotational (pitch and roll) motions of the floating plate.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: August 16, 2011
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 7982484
    Abstract: A system for making electrical contact between a transmit/receive module and a testing device for the transmission of high-frequency signals includes a mechanically guided, frame-shaped contacting unit having a plurality of contact elements for contacting the TR module. The contacting unit surrounds the T/R module and is positioned relative to the T/R module such that the contact with the T/R module is established in one operation via the contact elements. A line substrate, which is arranged on the contacting unit and electrically connected with it, is constructed as a shielded triplate line by which the high-frequency signals can be conducted to the testing device.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: July 19, 2011
    Assignee: EADS Deutschland GmbH
    Inventors: Karl-Ernst Schmegner, Thomas Johannes Mueller, Georg Hoefer, Rainer Rittmeyer
  • Patent number: 7977956
    Abstract: Embodiments of methods and apparatus for aligning a probe card assembly in a test system are provided herein. In some embodiments, an apparatus for testing devices may include a probe card assembly having a plurality of probes, each probe having a tip for contacting a device to be tested, and having an identified set of one or more features that are preselected in accordance with selected criteria for aligning the probe card assembly within a prober after installation therein. In some embodiments, the identity of the identified set of one or more features may be communicated to the prober to facilitate a global alignment of the probe card assembly that minimizes an aggregate misalignment of all of the tips in the probe card assembly.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: July 12, 2011
    Assignee: FormFactor, Inc.
    Inventors: Keith J. Breinlinger, Benjamin N. Eldridge, Eric D. Hobbs, Douglas S. Ondricek