Abstract: An internal precision oscillator (IPO) is trimmed within a microcontroller integrated circuit. The microcontroller integrated circuit receives a test program into flash memory on the microcontroller integrated circuit from a tester. The microcontroller integrated circuit also receives a reference signal from the tester. The IPO generates a clock signal having a frequency that depends upon a trim value. A general purpose timer on the microcontroller integrated circuit counts the number of cycles of the clock signal during a time period defined by the reference signal and outputs a digital value. A processor on the microcontroller integrated circuit executes the test program, reads the digital output, and adjusts the trim value such that the frequency of the clock signal is calibrated with respect to the reference signal. Test-time on the tester is reduced because the decision making during the frequency trimming process is made by the processor instead of the tester.

Abstract: An electronic device test apparatus which can optimize throughput and costs is provided. An electronic device test apparatus 1 comprises: a test cell cluster 10 having cell groups 11A to 11H each of which has a plurality of test cells 20; and a conveyor apparatus 30 supplying test carriers to a plurality of the test cells 20, and each of the test cell 20 has: contactors 215; a flow path 221 connected to a vacuum pump 25 and reducing pressure in a recess 211 of a pocket 21 so as to bring external terminals 73 and the contactors 215 into contact; and a test circuit for running a test on an electronic circuit formed into a die 90.

Abstract: A test handler is disclosed in the present invention. The test handler may include a test tray on which a plurality of inserts are arrayed for loading at least one semiconductor device, at least one opening unit for simultaneously opening one part of the plurality of inserts which are arrayed on one part of the test tray, and a test tray transfer apparatus for allowing the opening unit to simultaneously open other parts of the plurality of inserts which are arrayed on another part of the test tray as the test tray is transferred. Therefore, although semiconductor devices to be tested change their sizes, the replaced parts of the test handler are reduced in number, thereby reducing manufacturing cost and replacement work time. The inventive test handler reduces semiconductor devices loading time, reduces jamming, increases teaching efficiency and improves space utilization efficiency. Furthermore, the test handler can be applied to various types of testers.

Abstract: A parking-structure test system has motherboards that test memory modules. The motherboards are not stationary but are placed inside movable trays that move along conveyors. An unloader removes tested memory modules from test sockets on the motherboards, and a loader inserts untested memory modules into the motherboards using a robotic arm. A conveyor carries the motherboards from the loader to a parking and testing structure. An elevator raises or lowers the motherboards to different parking levels in the parking and testing structure. The motherboards move from the elevator to test stations on the parking level. A retractable connector from the test station makes contact with a motherboard connector to power up the motherboard, which then tests the memory modules. Test results are communicated from the test station to a host controller, which instructs the loader-unloader to sort the tested memory modules once the motherboard returns via the elevator and conveyors.

Abstract: An insert containing apparatus for a semiconductor package. The insert containing apparatus for a semiconductor package includes: a tray; an insert that is disposed in the tray, wherein at least one semiconductor package is seated on the insert and a through hole is formed around the semiconductor package; and an adapter including at least one finger of which an end portion passes through the through hole of the insert and guides the semiconductor package to a predetermined position so as to arrange the semiconductor package seated on the insert. The insert containing apparatus for a semiconductor package can be applied to semiconductor packages having any of various sizes by using a size-free insert. Thus, an investment cost of an instrument infrastructure can be greatly reduced, and an exchanging time of an insert can be reduced, and thus human power and time can be reduced.

Abstract: The electronic device mounting apparatus 1 comprises: a first camera 123 for imaging a flexible board 74 of a base member 70 of a test carrier 60 to generate a first image information; an image processing apparatus 40 for detecting a position of an alignment mark 79 of the flexible board 74 from the first image information and calculating a print start position 782 of the first interconnect patterns 78 on the flexible board 74 on the basis of the position of the alignment mark 79; a printing head 122 for forming a first interconnect pattern 78 on the flexible board 74 from the print start position 782; and a second conveyor arm 21 for mounting a die 90 on the flexible board 74 on which the first interconnect pattern 78 is formed.

Abstract: A parking-structure test system has motherboards that test memory modules. The motherboards are not stationary but are placed inside movable trays that move along conveyors. An unloader removes tested memory modules from test sockets on the motherboards, and a loader inserts untested memory modules into the motherboards using a robotic arm. A conveyor carries the motherboards from the loader to a parking and testing structure. An elevator raises or lowers the motherboards to different parking levels in the parking and testing structure. The motherboards move from the elevator to test stations on the parking level. A retractable connector from the test station makes contact with a motherboard connector to power up the motherboard, which then tests the memory modules. Test results are communicated from the test station to a host controller, which instructs the loader-unloader to sort the tested memory modules once the motherboard returns via the elevator and conveyors.

Abstract: An internal precision oscillator (IPO) is trimmed within a microcontroller integrated circuit. The microcontroller integrated circuit receives a test program into flash memory on the microcontroller integrated circuit from a tester. The microcontroller integrated circuit also receives a reference signal from the tester. The IPO generates a clock signal having a frequency that depends upon a trim value. A general purpose timer on the microcontroller integrated circuit counts the number of cycles of the clock signal during a time period defined by the reference signal and outputs a digital value. A processor on the microcontroller integrated circuit executes the test program, reads the digital output, and adjusts the trim value such that the frequency of the clock signal is calibrated with respect to the reference signal. Test-time on the tester is reduced because the decision making during the frequency trimming process is made by the processor instead of the tester.