Abstract: The present invention discloses a test connector, a transmission wire, a test system, and a using method. A test connector for a low voltage differential signal transmission wire comprises a signal wire interface matching with the low voltage differential signal transmission wire, and a PCB interface matching with a PCB plate to be tested, and the signal wire interface is electrically connected with the PCB interface. In the present invention, the test connector is inserted or pulled instead of a low voltage differential signal transmission (LVDS) connection; when damaged, only the test connector needs to be replaced, and the service life of the low voltage differential signal transmission (LVDS) wire is extended greatly. Because the cost of the test connector is only less than 10% of that of the LVDS wire, loss cost can be reduced.

Abstract: The embodiment is to provide a liquid crystal display device capable of detecting malfunctions. The liquid crystal display device includes pixels configured to be connected to scan lines and data lines, data pads electrically connected to the data lines, a data integrated circuit supplying data signals to the data lines through the data pads, first data transistors coupled to the data pads, and second data transistors coupled to the data lines. The first data transistors are disposed on the data integrated circuit and the second data transistors are separated from the data integrated circuit.

Abstract: An inspecting method using an electro-optical detecting device is disclosed. The electro-optical detecting device includes: an upper substrate and a lower substrate; a nematic liquid crystal layer interposed between the upper substrate and the lower substrate; a transparent electrode interposed between the nematic liquid crystal layer and the upper substrate, the transparent electrode connected to a device under test (DUT) via a power supply; a polarizing plate located over the nematic liquid crystal layer; and a reflecting plate located under the nematic liquid crystal layer.

Abstract: The present invention relates to a field of LCD technology, especially to a testing circuit for PSVA and array. The testing circuit for PSVA and array has gate signal lines, data signal lines, a first solder pad and thin-film transistors. Extension lines of the gate signal lines and the data signal lines are each connected to a drain of a corresponding one of the thin-film transistors. Sources of the thin-film transistors corresponding to the data signal lines are connected to each other and connected to the first solder pad. Gates of the thin-film transistors corresponding to the data signal lines are connected to a transfer structure on a substrate. Sources and gates of the thin-film transistors corresponding to the gate signal lines are connected to each other and connected to the transfer structure.

Abstract: To provide a display device having a test circuit with high accuracy for testing in the step after a counter substrate is attached and before shipping, and to provide a display device having a correction circuit inside the display device, for the case where a defect occurs. A pixel circuit operated by a gate line and a source line, a first wiring formed at the same time as the gate line, a second wiring formed at the same time as the source line, and a test circuit of detecting a defect of the pixel circuit by using potentials of the first wiring and the second wiring are provided over a substrate.

Abstract: A plurality of gate lines are formed on an insulating substrate in the horizontal direction, a gate shorting bar connected to the data lines is formed in the vertical direction and a gate insulating film is formed thereon. A plurality of data lines intersecting the gate lines are formed on the gate insulating film in the vertical direction, and a data shorting bar connected to the data lines is formed outside the display region. A first shorting bar is formed on the gate insulating film, located between the gate lines and the gate shorting bar, and connected to the odd gate lines. A second secondary shorting bar is formed parallel to the first shorting bar and connected to the even gate lines.

Abstract: A method of fabricating a liquid crystal display device includes forming a gate driver and array elements in at least one cell area of a mother substrate while forming a test element in at least one test area of the mother substrate, and inspecting the test element to determine an operational state of the gate driver.

Abstract: Systems and methods for testing a peripheral in accordance with a high-speed serial interface protocol are provided. A test system can test a peripheral by providing user-specified control over a test processor (which is substantially the same processor the peripheral will interface with when installed) to test, calibrate, or both test and calibrate the peripheral. The test processor can communicate with the peripheral according to the high-speed serial interface protocol, thereby effectively providing an actual “in-device” environment for testing and/or calibrating the peripheral.

Abstract: A one sheet test device and a method of testing using the same that can prevent a change of current characteristics due to a failure panel by measuring a current of normal panels except for the failure panel, when testing a one sheet substrate that includes panels, first wires that are arranged in a first direction between and connected to the panels, second wires that are arranged in a second direction different from the first direction between and connected to the panels. The test device includes voltage application units that are connected to the first and second wires, respectively, to apply a selected one of the first voltage and the second voltage to the corresponding wires; and a test unit that controls the voltage application units to measure an on-current and off-current of each of the panels.

Abstract: A liquid crystal display device includes a pixel matrix where a plurality of gate lines and a plurality of data lines cross each other and a plurality of liquid crystal cells are arranged, first data switching thin film transistors respectively connected to data lines of a first group of the data lines, and second data switching thin film transistors respectively connected to data lines of a second group of the data lines.

Abstract: A system for testing and a method for making a semiconductor device is disclosed. A preferred embodiment includes a conductor overlying a dielectric layer. The conductor is coupled to a first test pad via a first conducting line and to a second test pad via a second conducting line.

Abstract: A test controller switches the operation of output stages in an integrated circuit between a normal operation mode and a test mode. The output stages are respectively connected to switch elements. A level shifter generates a switch signal for controlling activation and deactivation of the switch elements in accordance with the normal operation mode and the test mode.

Abstract: There is provided a physical property measuring method for a TFT liquid crystal panel, includes an impedance setting step of setting the impedance between the source and drain of a TFT of the TFT liquid crystal panel to be less than or equal to a predetermined value, a voltage application step of applying a voltage that cyclically varies to a liquid crystal layer of the TFT liquid crystal panel. And the method further includes a physical property measuring step of measuring a transient current flowing through the liquid crystal layer to which the voltage that cyclically varies is applied in the voltage application step to measure physical properties of the liquid crystal layer.

Abstract: Inoperative or defective electroluminescent (EL) emitters in an EL display having a plurality of subpixels are detected. Current flow through a drive transistor in a subpixel is turned off, a selected test current is provided through the EL emitter in the subpixel using a current source, and the voltage at a second electrode of a readout transistor in the subpixel is measured to provide a status signal representative or characteristics of the selected EL emitter. The status signal for the subpixel is compared to the respective status signals of neighboring subpixels to determine whether the EL emitter in the subpixel is defective.

Abstract: An embodiment of the present disclosure provides a method of manufacturing an array substrate, comprising at least a step of forming a TFT pattern in a pixel region and correspondingly forming a TFT testing pattern in a testing region, wherein before forming a passivation layer to cover the pixel region and the testing region, a step of removing a gate insulation layer thin film above a testing line lead in the TFT testing pattern.

Abstract: An inspection method which simplifies an inspection step by eliminating the need to set probes on wiring or probe terminals, and an inspection device for performing the inspection step. A voltage is applied to each of inspected circuits or circuit elements to operate the same. Signal processing is performed on an output from each inspected circuit or circuit element during operation to form a signal (operation information signal) including information on the operating condition of the circuit or the circuit element. The operation information signal is amplified and the amplitude of an alternating current voltage separately input is modulated with the amplified operation information signal. The voltage of the modulated alternating current is read in a non-contact manner to determine whether the corresponding circuit or circuit element is non-defective or defective.

Abstract: A test circuit for an electronic device including a liquid crystal display (LCD) device. The LCD device includes a pulse width modulator (PWM) to provide voltages to a display panel of the LCD device, a plurality of feedback circuits to output feedback voltages to the PWM, and a power supply to provide an operating voltage for the PWM. When the electronic device is in a test mode, the feedback circuits respectively decrease the feedback voltages, such that the PWM increases the voltages output to the display panel according to the feedback voltages, the increased voltages reach predetermined test voltages and test the electronic device.

Abstract: The present disclosure discloses a test circuit and a test method for detecting a TFT-LCD electrical defect, which relates to the field of liquid crystal display and is able to distinguish effectively between a capacitive defect and a TFT defect. The test circuit for detecting a TFT-LCD electrical defect includes: a test apparatus connected with the input terminals of a first reference voltage and a second reference voltage corresponding to the same gray scale, the test apparatus controls the output terminals of the first reference voltage and the second reference voltage to output a constant voltage to a data line. The present disclosure can be applied to a liquid crystal display.

Abstract: A method of testing the display panel is provided. a display panel is provided, wherein the display panel has shorting bars and testing pads in a first peripheral area, and IC pads in a second peripheral area. A first stage test is performed to input a common voltage signal and a plurality of first stage test signals to the testing pads. A switching step is implemented to stop inputting the first stage test signals. A second stage test is carried out to input at least a second stage test signal to the IC pads.

Abstract: An active device array includes a plurality of scan lines, a plurality of data lines, a plurality of pixel structures, a first testing circuit, a second testing circuit, a third testing circuit and a fourth testing circuit. Each of the pixel structures is connected to one of the scan lines and one of the data lines. The first testing circuit is electrically connected to the odd scan lines; the second testing circuit is electrically connected to the (4n+1)th scan lines wherein n is zero or a positive integer; the third testing circuit is electrically connected to the even scan lines; the fourth testing circuit is electrically connected to the (4n+2)th scan lines.

Abstract: An exemplary method for manufacturing a liquid crystal display (LCD) includes providing an LCD panel (201) including a common voltage initialization circuit (2011); testing and inspecting the LCD panel for defects of the LCD panel, and thereby obtaining a preferred common voltage for the LCD panel; writing parameters of the preferred common voltage to the common voltage initialization circuit; and mounting a driving integrated circuit on the LCD panel, the driving integrated circuit being connected to the common voltage initialization circuit. The driving integrated circuit is connected to the common voltage initialization circuit.

Abstract: A method for detecting a storage voltage, a display apparatus using the storage voltage and a method for driving the display apparatus. The method for detecting the storage voltage includes applying a test voltage to a storage line in a display panel having an active layer disposed between the storage line and a data line while varying the test voltage, the active layer being in an active state or an inactive state according to the test voltage, and detecting the storage voltage corresponding to the test voltage in an inactive state of the active layer. Thus, the display panel is driven by using the detected storage voltage, so that an aperture ratio may be increased and current consumption may be decreased.

Abstract: A test circuit adapted in a display panel of an electronic device is provided. The test circuit is to test the pixel array function of the display panel, wherein the test circuit comprises: a plurality of test signal lines, a plurality of test signal transmitters, a plurality of gate lines and at least one static electricity protection device. The test signal lines receive a plurality of corresponding test signals respectively. The test signal transmitters comprises a plurality test signal transmitter groups comprising at least one transmitter, wherein each transmitter group corresponds to a test signal line and connects the test signal line and the to pixel array. Each gate line connects to the gate of the at least one transmitter. The static electricity protection device is placed between two of the gate lines.

Abstract: A thin film transistor (TFT) array having test circuitry includes a thin film transistor array body having a plurality of pixels. Test circuitry is integrally formed with the body. The test circuitry includes a power supply for supplying power via the test circuitry to the body; and a plurality of wireless switches to activate selected pixels.

Abstract: A method for checking alignment accuracy of a thin film transistor includes providing a substrate, forming a first conductive layer on the substrate, performing a first patterning process to form a gate electrode of a thin film transistor and a first terminal and a second terminal of a testing device, forming a first insulating layer covering the first terminal, the second terminal and the gate electrode on the substrate, forming a contact hole substantially corresponding to the first terminal and the second terminal in the first insulating layer, forming a pixel electrode and a connecting electrode of the testing device in the first contact hole, and performing a close/open circuit test. When the first terminal, the connecting electrode and the second terminal construct a close circuit, alignment accuracy is confirmed. When the first terminal, the connecting electrode and the second terminal construct an open circuit, alignment inaccuracy is confirmed.

Abstract: The embodiment is to provide a liquid crystal display device capable of detecting malfunctions. The liquid crystal display device includes pixels configured to be connected to scan lines and data lines, data pads electrically connected to the data lines, a data integrated circuit supplying data signals to the data lines through the data pads, first data transistors coupled to the data pads, and second data transistors coupled to the data lines. The first data transistors are disposed on the data integrated circuit and the second data transistors are separated from the data integrated circuit.

Abstract: An active device array substrate including a substrate, an active device array, an detecting circuit, a plurality of driver chip pads, a plurality of flexible printed circuit (FPC) pads, a plurality of connection lines and an inner shorting ring is provided. The active device array and the detecting circuit are disposed on the substrate, and the detecting circuit is electrically connected to the active device array. The driver chip pads and the FPC pads are disposed on the substrate, wherein the driver chip pads are electrically connected to the active device array. The connection lines are disposed on the substrate, and each of the connection lines is respectively connected to the detecting circuit and the corresponding FPC pad. The inner shorting ring is disposed on the substrate, and the inner shorter ring is respectively electrically connected to the corresponding FPC pad and the active device array.

Abstract: A display substrate includes a substrate, signal lines and test lines. The substrate includes a pixel region where pixels are disposed, a buffer region surrounding the pixel region and a grinding region surrounding the buffer region. The signal lines pass through the buffer region from the grinding region to provide the pixels with a driving signal. The test lines are disposed on the grinding region and the buffer region, respectively, so that the test lines intersect the signal lines in a lattice structure. Each of the test lines is electrically connected to the signal lines of a first number calculated by dividing a second number of the signal lines by a third number of the test lines. Thus, the performance of the pixels used for displaying an image may be tested more precisely.

Abstract: There is provided a physical property measuring method for a TFT liquid crystal panel, includes an impedance setting step of setting the impedance between the source and drain of a TFT of the TFT liquid crystal panel to be less than or equal to a predetermined value, a voltage application step of applying a voltage that cyclically varies to a liquid crystal layer of the TFT liquid crystal panel. And the method further includes a physical property measuring step of measuring a transient current flowing through the liquid crystal layer to which the voltage that cyclically varies is applied in the voltage application step to measure physical properties of the liquid crystal layer.

Abstract: A system for testing and a method for making a semiconductor device is disclosed. A preferred embodiment includes a conductor overlying a dielectric layer. The conductor is coupled to a first test pad via a first conducting line and to a second test pad via a second conducting line.

Abstract: There is established an easier inspection method with which it is not required to set up probes on wires. Also, there is provided an inspection apparatus using this inspection method. With the inspection apparatus or inspection method, primary coils of an inspection substrate and secondary coils of a device substrate are superimposed on each other so that a certain space is maintained therebetween. An AC signal is inputted into the primary coils, thereby generating an electromotive force in each secondary coil by electromagnetic induction. Then, each circuit provided on the device substrate is driven using the electromotive force and information possessed by an electromagnetic wave or electric field generated in this circuit is monitored, thereby detecting each defective spot.

Abstract: A COG type LCD device includes a first substrate including a display area and first, second, third and fourth non-display areas, gate and data lines in the display area on the first substrate and defining pixel regions, switching thin film transistor at each crossing portion of the gate and data lines and connected to the gate and data lines, a pixel electrode in each pixel region and connected to the thin film transistor, first testing thin film transistors in the second non-display area connected to the data lines and spaced apart from each other with a constant interval therebetween, first, second and third data testing lines connected to one ends of the data lines through the first testing thin film transistors, first, second and third data testing pads connected to the first, second and third data testing lines, respectively, data link lines in the first non-display area and connected to another ends of the data lines, second testing thin film transistors in the first non-display area and connected to th