Abstract: A system of thermally tuning an optical device is described. The system may include an optical device configured to output an optical signal. An amplitude of the optical signal may be dependent on a temperature of the optical device. The system may also include a control circuit, an adjust circuit, and a heater circuit. The control circuit may be configured to output a control current. The adjust circuit may be configured to perform an approximate square-root operation on the control current and to output a modified control current. The heater circuit may be coupled to the adjust circuit and may be configured to generate heat based on the modified control current. The heater circuit may also be positioned such that the generated heat affects the amplitude of the optical signal. The control circuit may linearly adjust the control current to approximately linearly adjust the heat generated by the heater.

Abstract: A CMOS current-mode square-root circuit includes a square-root circuit configured to compensate for the errors due to the carrier mobility reduction by employing a plurality of MOSFETs in Translinear Loop (MTL). The plurality of MOSFETs are configured to operate in the strong inversion region. The CMOS current-mode square-root circuit is configured to receive an input current and a biasing current, and is further configured to produce an output current based on the input current and the biasing current. The output current based on the input current and the biasing current is described by a first square-root relation and a second square-root relation.

Abstract: A circuit for providing a DC output equal to the RMS value of a time-varying input signal, the circuit including: (i) an RMS-to-DC converter for producing the DC output and (ii) a high-order low-pass filter comprising at least first and second low-pass filters connected in series to cooperatively reduce at least one of ripple in the DC output, ripple in an denominator feedback loop, or DC error in the DC output.

Abstract: Conventional circuits often have undesirable characteristics to due “hot spots” or use a large amount of area. Here, however, a charging circuit is provides that uses an improved driver. Namely, an amplifier within a current sensor is used to control the rate that a switch can charge an external capacitor. This is accomplished through the adjustment of the gain of the amplifier during a charging mode.

Abstract: Systems and methods are provided for power measurement of signals such that the power measurement is insensitive to PVT variations of the measurement systems. A power measurement system includes an analog squarer circuitry, an integrating ADC, and a controller. The squarer circuitry calculates the power of a signal whose power is to be measured while the integrating ADC integrates the calculated power over a runup interval to generate an integrated power. The squarer circuitry also calculates the power of a reference for the integrating ADC to de-integrate the integrated power over a rundown interval. The power measurements are independent of PVT variations of the analog squarer circuitry and integrating ADC. The controller digitally controls the runup interval and measures the rundown interval to provide digitized power measurements. The analog squarer circuitry have replica squarer circuits. Process dependent mismatches between the replica analog circuitry may be removed through a calibration process.

Abstract: Implementing a piecewise-polynomial-continuous function in a translinear circuit generally involves translinear elements that form translinear loops that are linked by a clamp transistor. A first translinear loop controls a first portion of the piecewise-polynomial-continuous function in a first area of operation. A second translinear loop controls a second portion of the piecewise-polynomial-continuous function in a second area of operation. When activated in the second area of operation, the clamp transistor draws current through one of the translinear elements without drawing current away from another translinear element of the translinear circuit.

Abstract: A circuit is provided that includes a parasitic power circuit that powers a parasitic circuit. The parasitic power circuit derives a supply voltage from an external AC or other signal suitable for use as a communications signal. A PMOS transistor or transistors is utilized to enable a supply voltage capacitor to charge substantially to the same voltage as the channel voltage of the communications signal.

Abstract: The differential drive circuit generates a differential drive signal having a root mean square value defined by a digital input value. The differential drive signal includes a first differential component and a second differential component. The circuit comprises a first differential component generator and a second differential component generator. The first differential component generator is for counting the clock signal to generate successive values of a periodic count. Each of the values includes a most-significant bit. The first differential component generator is additionally for generating the first differential component in response to successive ones of the most-significant bit of the count. The second differential component generator is for generating the second differential component in response to the digital input value and the successive values of the count.

Abstract: A method and an input signal level detection apparatus that correctly detect a level of an input signal while consuming low power apparatus including: a full-wave rectifier outputting a full-wave rectified waveform by performing a full-wave rectification on a first signal corresponding to an input signal, and on a second signal having a phase difference of 180 degrees from the first signal; a common voltage detector detecting a common voltage of the first signal and the second signal; and a level detection unit detecting a level of the input signal, based on a subtraction result obtained by subtracting the common voltage from the full-wave rectified waveform.

Abstract: A circuit is provided that includes a current source, and a compensation circuit to generate a compensation current based on an output voltage of the current source. The circuit further includes a combiner to combine the compensation current with an output current of the current source to substantially cancel a channel-length modulation effect associated with the output current of the current source.

Abstract: The present invention relates to an exponential function generator which is realized with only CMOS element without BJT element, not limited by the physical properties of the element or a square circuit, and not complicated in its configuration, and a variable gain amplifier using the same. The exponential function generator includes a voltage-current converter, 1st to nth curve generators for mirroring the current from the voltage-current converter, outputting a current adjusted according to a predetermined ratio, and an output end for outputting the sum of the current from the 1st to nth curve generators. The exponential current generator is configured to generate the current exponentially adjusted according to the control voltage.

Abstract: An EPROM cell in a printhead control circuit for an inkjet printer, having exactly one polysilicon layer and a conductive layer disposed above the polysilicon layer, includes a control transistor and an EPROM transistor. The control and EPROM transistors each have floating gates comprising a portion of the polysilicon layer, and an electrical interconnection, comprising a portion of the conductive layer, interconnects the floating gate of the control transistor and the floating gate of the EPROM transistor.

Abstract: The differential drive circuit generates a differential drive signal having a root mean square value defined by a digital input value. The differential drive signal includes a first differential component and a second differential component. The circuit comprises a first differential component generator and a second differential component generator. The first differential component generator is for counting the clock signal to generate successive values of a periodic count. Each of the values includes a most-significant bit. The first differential component generator is additionally for generating the first differential component in response to successive ones of the most-significant bit of the count. The second differential component generator is for generating the second differential component in response to the digital input value and the successive values of the count.

Abstract: Provided is a CMOS exponential function generating circuit capable of compensating for the exponential function characteristic according to temperature variations. The exponential function generating circuit includes an voltage scaler scaling the value of an external gain control voltage signal, an exponential function generating unit generating exponential function current and voltage in response to a signal output from the voltage scaler, a reference voltage generator providing a reference voltage to the exponential function generating unit, and a temperature compensator compensating for the exponential function characteristic according to temperature variations.

Abstract: An apparatus and method are disclosed which provide a substantially linear relationship between an input signal, such as an input voltage or current, and a predetermined parameter, such as a frequency response or capacitance of a parallel plate capacitor or varactor. The apparatus comprises a square root converter and a logarithmic generator. The square root converter is adapted to provide a square root signal which is substantially proportional to a square root of the input signal. In the various embodiments, the logarithmic generator is adapted to provide an applied signal which is substantially proportional to a sum of a logarithm of the input signal plus the square root of the input signal. The applied signal is a pre-distorted signal which generally has a non-linear relation to the predetermined parameter and which, when applied, allows the predetermined parameter to vary substantially linearly with the input signal.

Abstract: An apparatus and method are disclosed which provide a substantially linear relationship between an input signal, such as an input voltage or current, and a predetermined parameter, such as a frequency response or capacitance of a parallel plate capacitor or varactor. The apparatus comprises a square root converter and a logarithmic generator. The square root converter is adapted to provide a square root signal which is substantially proportional to a square root of the input signal. In the various embodiments, the logarithmic generator is adapted to provide an applied signal which is substantially proportional to a sum of a logarithm of the input signal plus the square root of the input signal. The applied signal is a pre-distorted signal which generally has a non-linear relation to the predetermined parameter and which, when applied, allows the predetermined parameter to vary substantially linearly with the input signal.

Abstract: A sampled data, analog computing method and circuit for producing an output voltage V.sub.OUT with a magnitude proportional to the root-mean-square value V.sub.RMS of a monopolar input voltage V.sub.DC, first demodulates or chops a time-varying monopolar input voltage V.sub.DC of interest to produce a demodulated or chopped voltage V.sub.CHOP, and then filters the chopped voltage V.sub.CHOP to produce an output voltage V.sub.OUT. The chopping operation is conducted at a duty ratio or modulation ratio proportional to the ratio of the monopolar input voltage V.sub.DC to the output voltage V.sub.OUT, with the result that the magnitude of the output voltage V.sub.OUT is proportional to the root-mean-square value V.sub.RMS of the monopolar input voltage V.sub.DC. The illustrated embodiment of the invention (i) rectifies a time-varying bipolar input voltage V.sub.AC of interest with a precision fullwave rectifier to produce the monopolar input voltage V.sub.

Abstract: A temperature compensatory constant current generator comprises a temperature inversely proportional constant current generator for supplying a temperature inversely proportional current, a temperature proportional constant current generator for supplying a temperature proportional current, a temperature inversely proportional current supplier for outputting the temperature inversely proportional current from the temperature inversely proportional constant current generator, a temperature proportional current supplier for outputting the temperature proportional current from the temperature proportional constant current generator and a square root generator for providing a current proportional to multiplied square roots of the temperature inversely proportional current and the temperature proportional current.

Abstract: A circuit arrangement for forming the square root of an input signal in at least one quadrant. The input signal is fed to the input of a first differential amplifier, the current outputs of which work on two diodes. The two outputs of the first differential amplifier are also connected to the inputs of a second differential amplifier, from one output of which there is a feedback via a diode to one of the outputs of the first differential amplifier. The collectors of the second differential amplifier work on current sources.

Abstract: A vector summation device includes a squaring circuit for receiving a number of input voltage signals, and a square-root circuit having first and second current terminals connected electrically to the squaring unit. The squaring circuit receives first and second current signals respectively from the first and second current terminals of the square-root circuit. The difference between the current values of the first and second current signals is proportional to the sum of the squares of the voltage values of the input voltage signals. The square-root circuit generates an output voltage signal with a voltage value that is proportional to the square-root of the difference between the current values of the first and second current signals.

Abstract: An integrate circuit companding amplifier for analog signals with digitally controlled gain. The expansion amplifier uses a square law with presentation of sign and the compression amplifier uses the inverse (square root law with preservation of sign). A digital potentiometer determines the gain, and peak detection plus feedback control of the potentiometer provides for automatic gain control. Three wire communication can program a fixed gain.