Exponential Patents (Class 327/346)
  • Publication number: 20130147538
    Abstract: Disclosed is a digital pre-distortion device which includes a pre-compensation lookup table which outputs a first input value and a second input value adjacent to an input signal, a first distortion value corresponding to the first input value, and a second distortion value corresponding to the second input value; and a function generator which generates a pre-distortion function based on the first and second input values and the first and second distortion values and generates a pre-distortion value corresponding to the input signal from the pre-distortion function.
    Type: Application
    Filed: July 27, 2012
    Publication date: June 13, 2013
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jung Hoon OH, Joon Hyung KIM, JAE HO JUNG, HYUN KYU CHUNG
  • Patent number: 8305133
    Abstract: Implementing a piecewise-polynomial-continuous function in a translinear circuit generally involves translinear elements that form translinear loops that are linked by a clamp transistor. A first translinear loop controls a first portion of the piecewise-polynomial-continuous function in a first area of operation. A second translinear loop controls a second portion of the piecewise-polynomial-continuous function in a second area of operation. When activated in the second area of operation, the clamp transistor draws current through one of the translinear elements without drawing current away from another translinear element of the translinear circuit.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: November 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Roy Alan Hastings
  • Publication number: 20120081168
    Abstract: Implementing a piecewise-polynomial-continuous function in a translinear circuit generally involves translinear elements that form translinear loops that are linked by a clamp transistor. A first translinear loop controls a first portion of the piecewise-polynomial-continuous function in a first area of operation. A second translinear loop controls a second portion of the piecewise-polynomial-continuous function in a second area of operation. When activated in the second area of operation, the clamp transistor draws current through one of the translinear elements without drawing current away from another translinear element of the translinear circuit.
    Type: Application
    Filed: October 1, 2010
    Publication date: April 5, 2012
    Applicant: Texas Instruments Incorporated a Delaware Corporation
    Inventor: Roy Alan Hastings
  • Patent number: 8130215
    Abstract: A logarithmic amplifier produces a logarithmic output signal as a function of an input signal. The amplifier comprises a reference signal, first and second function generators, and a low-pass filter. The first function generator produces a periodic exponential waveform from the reference signal based upon a resistor-capacitor time constant, wherein the exponential waveform exponentially increases from a minimum to a maximum in each period. The second function generator produces a pulsed waveform from the exponential waveform, wherein the pulsed waveform comprises a first portion having a first amplitude for a first time period and a second portion having a different amplitude for the remainder of the signal period, and wherein the duration of the first time period is determined in response to the exponential waveform. The low pass filter produces the logarithmic output signal as a function of the pulsed waveform.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: March 6, 2012
    Assignee: Honeywell International Inc.
    Inventor: Scot Olson
  • Patent number: 7994840
    Abstract: Embodiments of the present invention provide systems, devices and methods for detecting the RMS value of a signal. The RMS detector uses multiple variable-gain stages and internal gain control to generate an RMS output signal based on an arbitrary signal input. This RMS detector significantly reduces the signal swings seen on a squarer within prior art RMS detectors and reduces the detector's dependency on DC offsets at low signal levels and overload errors at high signal levels. The embodiments of the present invention also improve the accuracy of the RMS detector within large dynamic signal ranges by obviating the operation of a squarer in saturation or out of the squaring region. Accordingly, embodiments of the present invention are able to more accurately detect RMS values on a signal, operate over relatively higher signal ranges, and better function within different signal modulation schemes, particularly those with large peak-to-average ratios.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: August 9, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Robert G. Meyer
  • Patent number: 7969223
    Abstract: An embodiment of a logarithmic circuit may include a logging transistor, and a multi-tanh circuit arranged to provide temperature compensation to the logging transistor, where the multi-tanh circuit comprises a multiplicity of multi-tanh cells. In another embodiment, a logarithmic circuit may include a logging transistor, and a multi-tanh circuit arranged to provide temperature compensation to the logging transistor, where the multi-tanh circuit includes a first set of outputs arranged to provide an output signal and a second set of one or more outputs that are diverted.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: June 28, 2011
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Publication number: 20110068689
    Abstract: In one embodiment, a light dimming module is disclosed. The light dimming module has a dimming engine coupled to a digital input interface and an output interface. The dimming engine is configured to provide a N-segment piecewise linear exponential digital control signal, and the output interface is configured to control the intensity of a light source.
    Type: Application
    Filed: September 22, 2009
    Publication date: March 24, 2011
    Inventors: Andrea Scenini, Andrea Logiudice, Roberto Filippo, Diego Gaetano Munari, Federico Tosato
  • Patent number: 7902901
    Abstract: An RF squarer circuit comprises a first RF multiplier and a first variable gain transimpedance amplifier (TIA). The first RF multiplier receives an RF input signal RFIN and provides a first output current. The first TIA receives the first output current as an input. The first TIA provides an output voltage VOUT.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: March 8, 2011
    Assignee: Scintera Networks, Inc.
    Inventor: Frederic Roger
  • Patent number: 7791400
    Abstract: A square-function circuit includes an input field-effect transistor (FET) having a gate that is driven by an input voltage and is configured to conduct an output current. The circuit also includes a feedback circuit coupled to a source of the input FET, the feedback circuit being configured to drive a source of the input FET based on the output current to set a magnitude of the output current to be substantially equal to a square of the input voltage.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: September 7, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Qunying Li
  • Patent number: 7777551
    Abstract: Disclosed is a multiplier circuit including first and second squaring circuits comprising first and second differential MOS transistors respectively connected in cascode to first and second diode-connected MOS transistors. The first squaring circuit receives a differential sum voltage of a first input voltage and a second input voltage. The second squaring circuit receives a differential subtraction voltage of the first input voltage and the second input voltage. Outputs of the first and second squaring circuits are first and second terminal voltages of the first and second diode-connected MOS transistors. A differential voltage between the first and second terminal voltages corresponds to the product of the first and second input voltages.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: August 17, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Katsuji Kimura
  • Publication number: 20100128899
    Abstract: A circuit for generating a large RC time-constant includes an input node for receiving an input signal making a transition from a first state to a second state characterized by a first time-constant, and an output node for providing an output signal making a transiting from the first state to the second state in response to the input signal. The circuit also includes a first MOS field effect transistor coupled between the input node and the output node. The circuit further includes a first capacitor coupled between the output node and a ground node. A switch circuit is connected to a gate of the first MOS field effect transistor. The switch circuit is configured to bias the MOS field effect transistor to operate in saturation mode and the transition of the output signal is characterized by a time-constant associated with this large output resistance and the capacitor coupled to the output node.
    Type: Application
    Filed: November 26, 2008
    Publication date: May 27, 2010
    Applicant: NUVOTON TECHNOLOGY CORPORATION
    Inventor: LANCE M. WONG
  • Publication number: 20100079188
    Abstract: The present invention describes systems and methods to provide programmable analog classifiers. An exemplary embodiment of the present invention provides an analog classifier circuit comprising a bump circuit enabled to store a template vector, wherein the template vector can model a probability distribution with exponential behavior. Furthermore, the bump circuit is enabled to generate an output corresponding to a comparison between an input vector received by the bump circuit and the template vector stored by the bump circuit. Additionally, the analog classifier circuit includes a variable gain amplifier in communication with the bump circuit, and the variable gain amplifier can be adjusted to modify the variance of the template vector.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 1, 2010
    Applicant: Georgia Tech Research Corporation
    Inventors: Sheng-Yu Peng, Paul E. Halser
  • Patent number: 7546332
    Abstract: Apparatus and methods for implementation of mathematical functions apparatus providing both speed and accuracy. Disclosed are specific circuits and methods of operation thereof that may be used for the purpose of implementing an exponential function, a squaring function, and a cubic function, using the same basic circuit. By applying a desired weighting function on a current source, an output current provides a value that corresponds exactly to the desired mathematical functions at discrete points, and closely tracks values in between the discrete points. The precision is defined by the selection of a voltage reference for the circuit. Various embodiments are disclosed, as well as embodiments implementing other exemplary functions.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: June 9, 2009
    Assignee: Theta Microelectronics, Inc.
    Inventor: Spyridon Vlassis
  • Patent number: 7545197
    Abstract: An anti-exponential amplifier produces an output signal that is an exponential/anti-logarithmic function of an input signal. The amplifier includes three function generators and a low-pass filter. The first function generator produces a periodic exponential waveform based upon a resistor-capacitor time constant, with the magnitude of the periodic exponential waveform exponentially increasing to a maximum value in each period. A second function generator produces a ramp waveform from the exponential waveform. The ramp waveform has a period and maximum amplitude substantially equal to those of the exponential signal. The third function generator produces a hybrid waveform with a first portion and a second portion, with the duration of the first period determined in response to the ramp waveform. A low pass filter produces the anti-logarithmic output signal as a function of the hybrid waveform. The resulting amplifier could be useful in a brightness or other parameter control for a display.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: June 9, 2009
    Assignee: Honeywell International Inc.
    Inventor: Scot Olson
  • Patent number: 7514980
    Abstract: The present invention relates to an exponential function generator which is realized with only CMOS element without BJT element, not limited by the physical properties of the element or a square circuit, and not complicated in its configuration, and a variable gain amplifier using the same. The exponential function generator includes a voltage-current converter, 1st to nth curve generators for mirroring the current from the voltage-current converter, outputting a current adjusted according to a predetermined ratio, and an output end for outputting the sum of the current from the 1st to nth curve generators. The exponential current generator is configured to generate the current exponentially adjusted according to the control voltage.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: April 7, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jeong Ki Choi, Won Jin Baek, Hyun Hwan Yoo, Seung Min Oh
  • Publication number: 20080315939
    Abstract: An anti-exponential amplifier produces an output signal that is an exponential/anti-logarithmic function of an input signal. The amplifier includes three function generators and a low-pass filter. The first function generator produces a periodic exponential waveform based upon a resistor-capacitor time constant, with the magnitude of the periodic exponential waveform exponentially increasing to a maximum value in each period. A second function generator produces a ramp waveform from the exponential waveform. The ramp waveform has a period and maximum amplitude substantially equal to those of the exponential signal. The third function generator produces a hybrid waveform with a first portion and a second portion, with the duration of the first period determined in response to the ramp waveform. A low pass filter produces the anti-logarithmic output signal as a function of the hybrid waveform. The resulting amplifier could be useful in a brightness or other parameter control for a display.
    Type: Application
    Filed: June 22, 2007
    Publication date: December 25, 2008
    Applicant: HONEYWELL INTERNATIONAL, INC.
    Inventor: Scot Olson
  • Patent number: 7382174
    Abstract: A transconductor including circuitry for automatically selecting a non-linear class A operation or a linear class AB operation based on an input signal to be processed to generate an output signal, and for automatically adjusting current from a power supply to a level needed for operation of the transconductor.
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: June 3, 2008
    Assignee: STMicroelectronics S.A.
    Inventors: Didier Belot, Pascal Persechini
  • Patent number: 7375602
    Abstract: Systems and methods are described for transmitting a waveform having a controllable attenuation and propagation velocity. An exemplary method comprises: generating an exponential waveform, the exponential waveform (a) being characterized by the equation Vin=De?ASD[x?vSDt], where D is a magnitude, Vin is a voltage, t is time, ASD is an attenuation coefficient, and vSD is a propagation velocity; and (b) being truncated at a maximum value. An exemplary apparatus comprises: an exponential waveform generator; an input recorder coupled to an output of the exponential waveform generator; a transmission line under test coupled to the output of the exponential waveform generator; an output recorder coupled to the transmission line under test; an additional transmission line coupled to the transmission line under test; and a termination impedance coupled to the additional transmission line and to a ground.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: May 20, 2008
    Assignee: Board of Regents, The University of Texas System
    Inventors: Robert H. Flake, John F. Biskup, Su-liang Liao
  • Patent number: 7352231
    Abstract: A translinear network (34) has first (Q1, Q2, Q3, Q4) and second (Q4, Q3, Q5, Q6) translinear loops. A Trafton-Hastings clamp circuit (36) is connected to generate a piecewise-polynomial-continuous current IY, the value of which becomes undefined when current IX=0 due to a removable singularity in the transfer equation at this point. A current mirror (38) comprising a plurality of transistors (M1, M2, M3) is coupled to the Trafton-Hastings clamp circuit (36), and operates to add additional currents in transistors Q3 and Q5 to IX, when the Trafton-Hastings clamp transistor (Q7) conducts, so as to perturb the removable singularity in the transfer equation into the left half-plane.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: April 1, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Roy Alan Hastings
  • Patent number: 7268608
    Abstract: A squaring cell comprises a first circuit responsive to an input voltage to produce a corresponding current, and a second circuit, preferably in the form of an absolute modulator circuit, responsive to the current produced by the first circuit and to the input voltage to produce an output current that corresponds to the square of the input voltage. In one embodiment, the first circuit comprises an absolute value voltage-to-current converter; in another, the first circuit comprises a linear voltage-to-current converter. Techniques to improve accurate square law performance of the cell, independent of temperature, and of broad input voltage range and frequency, are presented.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: September 11, 2007
    Assignee: Linear Technology Corporation
    Inventor: Min Z. Zou
  • Patent number: 7180358
    Abstract: Provided is a CMOS exponential function generating circuit capable of compensating for the exponential function characteristic according to temperature variations. The exponential function generating circuit includes an voltage scaler scaling the value of an external gain control voltage signal, an exponential function generating unit generating exponential function current and voltage in response to a signal output from the voltage scaler, a reference voltage generator providing a reference voltage to the exponential function generating unit, and a temperature compensator compensating for the exponential function characteristic according to temperature variations.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: February 20, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong Kee Kwon, Mun Yang Park, Jong Dae Kim, Won Chul Song
  • Patent number: 6930532
    Abstract: In a master block, the exponential conversion characteristic is determined on the basis of a common mode reference voltage and a reference voltage. In a slave block, the exponential conversion characteristic determined with the master block is used to create a control voltage and a gain control signal on the basis of a common mode reference voltage and a reference voltage. For example, a gain of the variable gain amplifier is controlled by using this gain control signal.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: August 16, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Kanou, Takafumi Yamaji, Tetsuro Itakura
  • Patent number: 6930531
    Abstract: The present invention discloses a circuit (10) adapted to compensate for RMR variations and shunt resistance across the RMR comprising a first current source (idc1) coupled to a first resistor (r1), a second current source (idc2) coupled to a second resistor (r2), wherein the first resistor (r1) and the second resistor (r2) are coupled, a resistive sensor (RMR) coupled on either side to a third resistor (r3) and to a fourth resistor (r4), and a transconductance feedback block (GM) coupled to the resistive sensor (RMR), the third resistor (r3), and to the fourth resistor (r4).
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: August 16, 2005
    Assignee: Texas Instruments Incorporated
    Inventor: Raymond Elijah Barnett
  • Patent number: 6882185
    Abstract: An apparatus and method of generating a current pair Ip, Im where the ratio of the pair is exponentially related to a control signal, and where either Ip or Im is greater than or less than a minimum or maximum value includes a feedback correction circuit used to sense the value of Im or Ip. The correction circuit supplies a boost current Iboost when the sensed value of Ip or Im is less than or greater than the minimum or maximum value. Iboost is preferably maintained proportional to the difference of the desired value and Ip or Im.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: April 19, 2005
    Assignee: Qualcomm, Incorporated
    Inventors: Brett Christopher Walker, Peter C. Gazzerro
  • Patent number: 6879204
    Abstract: A first voltage conversion circuit converts first and second reference input voltages into first and second differential output voltage. A second voltage conversion circuit converts the first reference input voltage and a control input voltage into a third differential output voltage. The third differential output voltage is inputted to an exponential conversion element. The first and second differential output voltages are inputted to an active impedance bridge. The active impedance bridge outputs a gain control voltage of the first and second voltage conversion circuits. A balanced condition of the active impedance bridge determines the exponential conversion characteristic of the output current to the control input voltage of the exponential conversion element.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: April 12, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Nobuo Kanou
  • Patent number: 6873210
    Abstract: Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.
    Type: Grant
    Filed: March 4, 2004
    Date of Patent: March 29, 2005
    Assignee: Broadcom Corporation
    Inventors: Jan Mulder, Marcel Lugthart, Chi-Hung Lin
  • Publication number: 20040196088
    Abstract: In a master block, the exponential conversion characteristic is determined on the basis of a common mode reference voltage and a reference voltage. In a slave block, the exponential conversion characteristic determined with the master block is used to create a control voltage and a gain control signal on the basis of a common mode reference voltage and a reference voltage. For example, a gain of the variable gain amplifier is controlled by using this gain control signal.
    Type: Application
    Filed: April 15, 2004
    Publication date: October 7, 2004
    Inventors: Nobuo Kanou, Takafumi Yamaji, Tetsuro Itakura
  • Patent number: 6777999
    Abstract: In a master block, the exponential conversion characteristic is determined on the basis of a common mode reference voltage and a reference voltage. In a slave block, the exponential conversion characteristic determined with the master block is used to create a control voltage and a gain control signal on the basis of a common mode reference voltage and a reference voltage. For example, a gain of the variable gain amplifier is controlled by using this gain control signal.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: August 17, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Kanou, Takafumi Yamaji, Tetsuro Itakura
  • Patent number: 6771111
    Abstract: A precision analog exponentiation circuit includes a precision analog exponentiation circuit includes a first transistor coupled to a reference current for generating a voltage at the first transistor, a second transistor coupled to the first transistor for generating an output current, a variable current source coupled to the first transistor and the second transistor for generating a sum of the reference current and the output current in response to a feedback signal, and a feedback amplifier coupled to the first transistor for generating the feedback signal wherein the variable current source maintains the voltage at the first transistor substantially equal to a reference voltage so that the output current is substantially equal to an exponential function of a control voltage coupled to the first transistor and the second transistor.
    Type: Grant
    Filed: January 13, 2002
    Date of Patent: August 3, 2004
    Assignee: LSI Logic Corporation
    Inventors: Samuel W. Sheng, Ivan C. Eng
  • Patent number: 6750715
    Abstract: Methods and apparatus of amplifying signals. One method includes receiving a variable power supply, generating a variable bias current, and applying the bias current to a load such that an average output voltage is generated. The method further includes receiving an input signal, generating a current proportional to the input signal, and subtracting the current from the variable bias current. As the variable power supply changes value by a first amount, the variable bias current is varied such that the average output voltage varies by the first amount.
    Type: Grant
    Filed: April 16, 2001
    Date of Patent: June 15, 2004
    Assignee: Zeevo, Inc.
    Inventors: Stephen Allott, Iain Butler
  • Patent number: 6734736
    Abstract: A variable gain amplifier includes an input stage that receives an input signal and converts the input signal into a corresponding intermediate signal. An output stage provides an output signal based on the intermediate signal and a gain control signal, with feedback signal being provided to the input stage as a function of the gain control signal, so that the intermediate signal varies as a function of the input signal and the feedback signal. The linearity performance of the VGA is substantially constant at the output over the useful input range of signal amplitudes.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: May 11, 2004
    Assignee: Texas Instruments Incorporated
    Inventor: Ranjit Gharpurey
  • Patent number: 6727756
    Abstract: Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: April 27, 2004
    Assignee: Broadcom Corporation
    Inventors: Jan Mulder, Marcel Lugthart, Chi-Hung Lin
  • Publication number: 20040000943
    Abstract: A switching mode N-order circuit comprises a first unit, a second unit and a comparator. The first unit includes an operational amplifier integral circuit to integrate a first voltage. The second unit has one or more stages of subunits in cascade each including an operational amplifier integral circuit to integrate a second voltage stage by stage. Each of the operational amplifier integral circuits is equipped with a switch to be controlled by the comparator to be discharged. The output of the N-order circuit is derived from the output of the second unit.
    Type: Application
    Filed: April 16, 2003
    Publication date: January 1, 2004
    Inventors: Ming-Hsiang Chiou, Chen-Yu Hsiao
  • Publication number: 20030132795
    Abstract: A precision analog exponentiation circuit includes a precision analog exponentiation circuit includes a first transistor coupled to a reference current for generating a voltage at the first transistor, a second transistor coupled to the first transistor for generating an output current, a variable current source coupled to the first transistor and the second transistor for generating a sum of the reference current and the output current in response to a feedback signal, and a feedback amplifier coupled to the first transistor for generating the feedback signal wherein the variable current source maintains the voltage at the first transistor substantially equal to a reference voltage so that the output current is substantially equal to an exponential function of a control voltage coupled to the first transistor and the second transistor.
    Type: Application
    Filed: January 13, 2002
    Publication date: July 17, 2003
    Inventors: Samuel W. Sheng, Ivan C. Eng
  • Patent number: 6570447
    Abstract: Transconductance-based variable gain amplifiers amplify an input voltage by converting the voltage difference to a current and then amplifying the result. At least one resistor network is adjusted depending on the magnitude of the input voltage difference and the output desired. A network of MOS transistor switches with a small footprint adjusts the resistance of the input voltage circuit in a way to insure consistent resistance and low stray capacitance.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: May 27, 2003
    Assignee: Infineon Technologies AG
    Inventors: Sasan Cyrusian, Thomas Blon
  • Publication number: 20030071674
    Abstract: In a master block, the exponential conversion characteristic is determined on the basis of a common mode reference voltage and a reference voltage. In a slave block, the exponential conversion characteristic determined with the master block is used to create a control voltage and a gain control signal on the basis of a common mode reference voltage and a reference voltage. For example, a gain of the variable gain amplifier is controlled by using this gain control signal.
    Type: Application
    Filed: August 8, 2002
    Publication date: April 17, 2003
    Inventor: Nobuo Kano
  • Patent number: 6549057
    Abstract: An RMS-to-DC converter implements the difference-of-squares function by utilizing two identical squaring cells operating in opposition to generate two signals. An error amplifier nulls the difference between the signals. When used in a measurement mode, one of the squaring cells receives the signal to be measured, and the output of the error amplifier, which provides a measure of the RMS value of the input signal, is connected to the input of the second squaring cell, thereby closing the feedback loop around the second squaring cell. When used in a control mode, a set-point signal is applied to the second squaring cell, and the output of the error amplifier is used to control a variable-gain device such as a power amplifier which provides the input to the first squaring cell, thereby closing the feedback loop around the first squaring cell.
    Type: Grant
    Filed: October 23, 2000
    Date of Patent: April 15, 2003
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Publication number: 20020070788
    Abstract: In a master block, the exponential conversion characteristic is determined on the basis of a common mode reference voltage and a reference voltage. In a slave block, the exponential conversion characteristic determined with the master block is used to create a control voltage and a gain control signal on the basis of a common mode reference voltage and a reference voltage. For example, a gain of the variable gain amplifier is controlled by using this gain control signal.
    Type: Application
    Filed: September 13, 2001
    Publication date: June 13, 2002
    Inventors: Nobuo Kanou, Takafumi Yamaji, Tetsuro Itakura
  • Patent number: 6404245
    Abstract: A transfer function generator which generates an output that is a cubic function of the input for use in low voltage, high frequency applications. The cubic function generator creates a signal path through high speed npn devices, thereby allowing the use of high frequencies. Further, the topography of the cubic function generator requires a voltage drop across only two semiconductor devices, thereby allowing use of the circuit in low voltage applications.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: June 11, 2002
    Assignee: Conexant Systems, Inc.
    Inventors: Stefano Cipriani, Anthony A. Takeshian
  • Patent number: 6369618
    Abstract: A voltage to current conversion circuit is described. The circuit comprises a first differential amplifier for receiving an input voltage and producing an output voltage, and a second amplifier for converting the output voltage of the first amplifier to a current. The transfer function of the voltage to current conversion circuit is proportional to an exponential function that depends on the input voltage. The circuit is temperature and process independent. In a first preferred embodiment, the first amplifier comprises a first transistor for receiving an input voltage at its base terminal, a temperature dependent current source coupled to the emitter of the first transistor, and a positive voltage supply coupled to the collector through a diode coupled transistor, and a second transistor paired with the first transistor and having a base terminal coupled to an input voltage terminal, an emitter coupled to a temperature dependent current source, and a collector coupled to a voltage supply.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: April 9, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Bryan E. Bloodworth, Davy H. Choi, Mehedi Hassan
  • Patent number: 6215292
    Abstract: A power rising electronic device receives an input current and supplies an output current that is a function of a power of the input current having a relative whole-number exponent. The power rising electronic device includes a plurality of diodes equal to an absolute value of the relative whole-number exponent. The plurality of diodes are connected in series with one another to produce from the input current an input voltage that is a logarithmic function of a power of the input current. The electronic device further includes an output junction element, and a circuit for applying a voltage that is a function of the input voltage to the output junction element for producing a current that is an exponential function of the voltage applied thereto. The output current of the power rising electronic device is derived from the current produced in the output junction element.
    Type: Grant
    Filed: August 25, 1999
    Date of Patent: April 10, 2001
    Assignees: STMicroelectronics S.R.L., Hewlett-Packard Company
    Inventors: Riccardo Maggi, Adam Ghozeil
  • Patent number: 6212369
    Abstract: The present invention teaches parallel coupling what are herein termed a “switching stage” and a “steering stage,” thereby arranging the mixer and variable gain amplifier circuitry as a single merged circuit. The merged variable gain mixers of the present invention provide mixing and gain functionality utilizing only that power needed for a basic mixer function and only the transconductance of the basic mixer function (thereby eliminating non-linearities introduced by additional transconductance stages of prior art circuitry). Further, in the merged variable gain mixers described herein, no additional headroom is needed other than what is required by the basic mixer function. The present invention contemplates a variety of merged variable gain mixers including AC and DC coupled merged variable gain mixer of both single and double balanced configuration.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: April 3, 2001
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Madhu Avasarala
  • Patent number: 6204719
    Abstract: An RMS-to-DC converter implements the difference-of-squares function by utilizing two identical squaring cells operating in opposition to generate two signals. An error amplifier nulls the difference between the signals. When used in a measurement mode, one of the squaring cells receives the signal to be measured, and the output of the error amplifier, which provides a measure of the RMS value of the input signal, is connected to the input of the second squaring cell, thereby closing the feedback loop around the second squaring cell. When used in a control mode, a set-point signal is applied to the second squaring cell, and the output of the error amplifier is used to control a variable-gain device such as a power amplifier which provides the input to the first squaring cell, thereby closing the feedback loop around the first squaring cell.
    Type: Grant
    Filed: February 4, 1999
    Date of Patent: March 20, 2001
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Patent number: 6160427
    Abstract: A transfer function generator which generates an output that is a cubic function of the input for use in low voltage, high frequency applications. The cubic function generator creates a signal path through high speed npn devices, thereby allowing the use of high frequencies. Further, the topography of the cubic function generator requires a voltage drop across only two semiconductor devices, thereby allowing use of the circuit in low voltage applications.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: December 12, 2000
    Assignee: Conexant Systems, Inc.
    Inventors: Stefano Cipriani, Anthony A. Takeshian
  • Patent number: 6084471
    Abstract: The input AGC and reference (REF) voltages are converted to currents and provided as differential inputs to a current amplifier. The current amplifier scales these currents proportional to absolute temperature. The translinear principle is used to realize the current amplifier and ensures linearity of the differential output currents. These currents are then converted to voltages by resistor elements. The result is applied to a simple differential pair that produces two AGC control currents that follow the hyperbolic tangent function. The two AGC control currents are equal when the AGC input is three-fourths the reference value. The overall gain response is well modeled by a second order function and is self-limiting at high gain values.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: July 4, 2000
    Assignee: Nokia Mobile Phones
    Inventors: Robert N. Ruth, Jr., John Groe, Damian Costa, Roy Enright
  • Patent number: 5999053
    Abstract: A current steering circuit includes a first current steering pair of differentially coupled transconductance devices for current steering an input current signal to an output of the current steering circuit. A linearizer circuit includes a second pair of differentially coupled devices coupled electrically in parallel with the first current steering pair so that any current steering which takes place in the second pair is mirrored by the first pair. The linearizer circuit controls the second differential pair so that the current through the devices of the second differential pair that are coupled to the output device of the first current steering pair is exponentially dependent on the differential input voltage.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: December 7, 1999
    Assignee: Philips Electronics North America Corporation
    Inventor: Rudolphe Gustave Eschauzier
  • Patent number: 5952867
    Abstract: An exponentiator circuit (24) is provided that includes a first transistor device, that includes a BJT (80) and a BJT (84) configured in a Darlington configuration, and a second transistor device that includes a BJT (88) and a BJT (92) also configured in a Darlington configuration. The first transistor device is coupled between a reference voltage and a summing node, while the second transistor device is coupled between an output node and a summing node. A programmable current iI is provided to the first transistor device and the second transistor device such that the base-to-emitter voltages of the two devices are provided at a different level. This results in the generation of a first current through the first transistor device and an output current through the second transistor device. An input current is provided at the summing node which is equivalent to the sum of the first current and the output current. The overall gain of the exponentiator circuit (24) is approximately exponential.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: September 14, 1999
    Assignee: Texas Instruments Incorporated
    Inventor: Davy H. Choi
  • Patent number: 5754013
    Abstract: An amplifier which outputs a nonlinear function in response to a linear input. The nonlinear response is a piece-wise linear approximation. The circuit includes an op amp which outputs a ramping voltage and a series of stages which change the scope of the ramping voltage. As the output of the op amp reaches a particular breakpoint, an additional stage of the circuit is activated so as to change the slope of the output. The new line segment has a new slope such that the combination of all these stages approximates a nonlinear response.
    Type: Grant
    Filed: December 30, 1996
    Date of Patent: May 19, 1998
    Assignee: Honeywell Inc.
    Inventor: Michael Ross Praiswater
  • Patent number: 5744993
    Abstract: Briefly, in accordance with one embodiment of the invention, a device for use in a magnetic recording read channel adapted to be coupled to a magneto-resistive (MR) read head comprises: an integrated circuit adapted so as to introduce a controllable amount of second-order nonlinearity into the magnetic recording read channel signal path to at least partially offset nonlinearity associated with use of the MR read head. Briefly, in accordance with another embodiment of the invention, a method of reducing nonlinear signal effects in a magnetic recording read channel signal path associated with use of a magneto-resistive (MR) read head comprises the step of: introducing into the read channel signal path a scalable square of the read channel signal.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: April 28, 1998
    Assignee: Lucent Technologies, Inc.
    Inventor: Jeffrey Lee Sonntag
  • Patent number: 5714902
    Abstract: An electrical circuit for generating a polynomial function in response to a linear input signal is disclosed. The circuit in one embodiment comprises a primary and a secondary current mirror, with the collector or source of the secondary current mirror connected in common with the input signal of the primary current mirror. The output signal of the electrical circuit is taken at the mirrored current source terminal of the first current mirror. The primary and secondary current mirrors are biased to at least initially respond exponentially to the linear input signal. Each then transitions into the more linear, resistor-dominated range. The primary current mirror is enabled at a predetermined cut-in level, such that an upward curving exponential response function is generated in response thereto.
    Type: Grant
    Filed: November 30, 1995
    Date of Patent: February 3, 1998
    Assignee: Oak Crystal, Inc.
    Inventor: Donald T. Comer