Abstract: An agent apparatus includes a shift position detector and an agent controller. The shift position detector is configured to detect a shift position of a vehicle. The agent controller is configured to control a personified agent. The agent controller is configured to cause the agent to face a driver of the vehicle in a case where the shift position is in a parking range. Upon communicating information, the agent controller is configured to cause the agent to output the information using voice and a movement of arms of the agent.

Abstract: An analog switch circuit includes: a switch unit and a control circuit, wherein the control circuit includes a sensor circuit and a gate-source voltage adjustment circuit. The switch unit operates a first switch therein according to a first gate-source voltage, to convert an input signal of an input terminal to an output signal of an output terminal. The sensor circuit is coupled between the input terminal and the output terminal, and generates a sensing signal according to a voltage difference between the input signal and the output signal. The gate-source voltage adjustment circuit is coupled to the sensor circuit, and adaptively adjusts the first gate-source voltage according to the sensing signal, to maintain the conduction resistance of the switch unit at a constant while the voltage difference changes.

Abstract: Performance information indicative of operator performance of a mobile machine is received. A performance opportunity space is identified, indicative of possible performance improvement. Savings identified in the performance opportunity space are quantified.

Abstract: An on-chip millimeter wave power detection circuit comprises a high resistive probe for voltage sensing of millimeter wave signals, the probe comprises a metal line perpendicularly connected to a transmission line, at one end, and further connected to a power root mean square (RMS) detector at the other end; and the RMS detector for measuring a RMS voltage value of the sensed millimeter wave signals, wherein the RMS detector is characterized by a known impedance.

Abstract: The logarithmic and exponential function generator for analog signal processing is implemented with CMOS circuits operating in current mode and includes current mirrors connected to a square root function circuit and two current amplifiers. A third current amplifier utilizes a constant current input. The outputs of the current amplifiers are combined to provide the logarithmic and exponential functions.

Abstract: A radio frequency diode detector has a set of diodes having a differential voltage output, and a current source electrically coupled to the ring of diodes, the current source coupled to provide a forward bias current. This is followed by nonlinear signal processing to create an overall linear detector suitable for use in microwave power measurement.

Abstract: New devices and methods capable of detecting a true Root-Mean-Square (RMS) power level of an analog input signal are disclosed. For example, an electronic circuit can include a squaring circuit that receives the analog input signal and processes the analog input signal so as to produce a squared-output of the analog input signal using an analog transfer function of the squaring circuit, and a square-root circuit that receives the squared-output and processes the squared-output using an analog transfer function of the square-root circuit so as to produce an analog RMS output signal representing the true RMS power level of the analog input signal.

Abstract: A root-mean-square (RMS) detector includes detection circuitry having as an input a radio frequency signal, target voltage and a set voltage and a RMS signal as an output, and a gain stage within the detection circuitry to produce the RMS signal as an output. The gain stage provides for faster settling times of the detector.

Abstract: A root-mean-square (RMS) detector includes detection circuitry having as an input a radio frequency signal, target voltage and a set voltage and a RMS signal as an output, and a gain stage within the detection circuitry to produce the RMS signal as an output. The gain stage provides for faster settling times of the detector.

Abstract: The present disclosure relates to a RMS detector for directly computing a signal detected through an analog circuit to measure its RMS value, and a circuit breaker using the same. For this purpose, a RMS detector according to the present disclosure may include a plurality of voltage/current sensing units configured to detect a voltage or current shaped analog signal for an arbitrary load; a plurality of square circuit units configured to compute square function units, respectively, based on a voltage output from the plurality of voltage/current sensing units; a summing circuit unit configured to sum a plurality of output voltages output from the plurality of square circuit units, respectively; and a root circuit unit configured to compute a RMS value based on a voltage output from the summing circuit unit.

Abstract: An RMS-DC converter includes a chopper-stabilized square cell that eliminates offset, thus enabling high-bandwidth operation. The chopper-stabilized offset requires only a small portion of the circuitry (i.e., a single component square cell) which operates at high frequencies, and is amenable to using high-bandwidth component square cells. Using the chopping technique minimizes required device sizes without compromising an acceptable square cell dynamic range, thereby maximizing the square cell bandwidth. The RMS-DC converter consumes less power than conventional RMS-to-DC converters that requires a high-frequency variable gain amplifier.

Abstract: New devices and methods capable of detecting a true Root-Mean-Square (RMS) power level of an analog input signal are disclosed. For example, an electronic circuit can include a squaring circuit that receives the analog input signal and processes the analog input signal so as to produce a squared-output of the analog input signal using an analog transfer function of the squaring circuit, and a square-root circuit that receives the squared-output and processes the squared-output using an analog transfer function of the square-root circuit so as to produce an analog RMS output signal representing the true RMS power level of the analog input signal.

Abstract: A circuit for providing a DC output equal to the RMS value of a time-varying input signal, the circuit including: (i) an RMS-to-DC converter for producing the DC output and (ii) a high-order low-pass filter comprising at least first and second low-pass filters connected in series to cooperatively reduce at least one of ripple in the DC output, ripple in an denominator feedback loop, or DC error in the DC output.

Abstract: A sigma-delta (??) difference-of-squares LOG-RMS to digital converter” by merging a traditional ?? modulator with an analog LOG-RMS to DC converter based on a difference-of-squares concept. Two basic architectures include one based on two squaring cells in the feedforward and feedback paths and a second based on a single squaring cell in the forward path. High-order ?? LOG-RMS can be implemented with a loop filter containing multiple integrators and feedforward and/or feedback paths for frequency compensation. The embodiments as described allow the implementations of ?? difference-of-squares LOG-RMS to DC converters with a natural digital output and a logarithmically compressed dynamic range.

Abstract: A sigma-delta (??) difference-of-squares LOG-RMS to digital converter for true RMS detection by merging a ?? modulator with an analog LOG-RMS to DC converter based on a difference-of-squares. Chopper-stabilization, implemented through commutators running at two different frequencies, can be employed to reduce sensitivity to DC offsets and low-frequency errors, resulting in an extension of the useful input-referred dynamic range. High-order ?? LOG-RMS converters can be implemented with a loop filter containing multiple integrators and feedforward and/or feedback paths for frequency compensation. The resulting implementations are ?? difference-of-squares LOG-RMS to DC converters with a natural digital output and a logarithmically compressed dynamic range.

Abstract: Architectures of ?? difference-of-squares RMS-to-digital converters employing multiple feedback paths. Additional feedback paths enable a stable ?? closed-loop behavior in different topologies where the RMS level of the quantization error processed by the squaring non-linearity is minimized. Such feedback paths include lowpass filtered and constant gain feedback paths, lowpass and highpass filtered paths or multiple lowpass filtered paths. These can be combined with multiple integrators in the forward path, with frequency compensation provided by additional feedforward or feedback paths. Electronic configurability can further extend the total input referred dynamic range (DR) of such architectures.

Abstract: A circuit is configured to receive an input signal and to produce an output signal measuring a power of the input signal. The circuit includes a multiplier cell configured to multiply first and second signals, where each of the first and second signals includes a component related to the input signal and a component related to the output signal. The circuit also includes a controlled amplifier configured to amplify an intermediate signal produced by the multiplier cell, where an amplification provided by the controlled amplifier is a function of the output signal. The circuit could further include at least one first converting amplifier configured to generate the component related to the input signal and at least one second converting amplifier configured to generate the component related to the output signal. Transconductances of the converting amplifiers could be selected to configure the circuit as a linear or logarithmic RMS power detector.

Abstract: Described herein is technology for, among other things, reducing offset errors in RMS-to-DC converters. The technology involves generating first and second feedback signals with first and second feedback paths respectively. A multiplier is then employed to receive first and second signals and provide a third signal based on multiplying the first signal and the second signal. The first signal is based on an input signal and the first feedback signal, and the second signal is based on the input signal and the second feedback signal. A chopper is then employed to receive an output signal, which is based on the third signal, and a chopping signal, and in turn provide a fourth signal based on multiplying the output signal with the chopping signal. As a consequence, the fourth signal represents the output signal shifted to a frequency different than that of low-frequency noise components of the first and second signals.

Abstract: Systems and methods are provided for power measurement of signals such that the power measurement is insensitive to PVT variations of the measurement systems. A power measurement system includes an analog squarer circuitry, an integrating ADC, and a controller. The squarer circuitry calculates the power of a signal whose power is to be measured while the integrating ADC integrates the calculated power over a runup interval to generate an integrated power. The squarer circuitry also calculates the power of a reference for the integrating ADC to de-integrate the integrated power over a rundown interval. The power measurements are independent of PVT variations of the analog squarer circuitry and integrating ADC. The controller digitally controls the runup interval and measures the rundown interval to provide digitized power measurements. The analog squarer circuitry have replica squarer circuits. Process dependent mismatches between the replica analog circuitry may be removed through a calibration process.

Abstract: Embodiments of the present invention provide systems, devices and methods for detecting the RMS value of a signal. The RMS detector uses multiple variable-gain stages and internal gain control to generate an RMS output signal based on an arbitrary signal input. This RMS detector significantly reduces the signal swings seen on a squarer within prior art RMS detectors and reduces the detector's dependency on DC offsets at low signal levels and overload errors at high signal levels. The embodiments of the present invention also improve the accuracy of the RMS detector within large dynamic signal ranges by obviating the operation of a squarer in saturation or out of the squaring region. Accordingly, embodiments of the present invention are able to more accurately detect RMS values on a signal, operate over relatively higher signal ranges, and better function within different signal modulation schemes, particularly those with large peak-to-average ratios.

Abstract: Implementing a piecewise-polynomial-continuous function in a translinear circuit generally involves translinear elements that form translinear loops that are linked by a clamp transistor. A first translinear loop controls a first portion of the piecewise-polynomial-continuous function in a first area of operation. A second translinear loop controls a second portion of the piecewise-polynomial-continuous function in a second area of operation. When activated in the second area of operation, the clamp transistor draws current through one of the translinear elements without drawing current away from another translinear element of the translinear circuit.

Abstract: Embodiments of the present invention provide systems, devices and methods for detecting the RMS value of a signal. The RMS detector uses multiple variable-gain stages and internal gain control to generate an RMS output signal based on an arbitrary signal input. This RMS detector significantly reduces the signal swings seen on a squarer within prior art RMS detectors and reduces the detector's dependency on DC offsets at low signal levels and overload errors at high signal levels. The embodiments of the present invention also improve the accuracy of the RMS detector within large dynamic signal ranges by obviating the operation of a squarer in saturation or out of the squaring region. Accordingly, embodiments of the present invention are able to more accurately detect RMS values on a signal, operate over relatively higher signal ranges, and better function within different signal modulation schemes, particularly those with large peak-to-average ratios.

Abstract: In general, this disclosure describes techniques for demodulating wireless signals. In particular, the techniques of this disclosure dynamically select between two or more demodulators based on channel quality information measured over a plurality of measurement periods. For example, a wireless communication device (WCD) may switch from a first demodulator to a second demodulator when the channel quality information associated with the demodulators indicates a better channel quality for the second demodulator than the first demodulator for a consecutive number of measurement periods. As another example, the WCD may compute, for each measurement period, the difference between the channel quality information associated with each of the demodulators, sum the differences, and switch demodulators when the total accumulation of the differences exceeds a threshold.

Abstract: An RF measurement system includes an envelope detector to extract the modulation envelope of the RF input signal. The resulting baseband envelope signal is then applied to a statistics extraction circuit which provides a precise measure of the modulation envelope. The statistics extraction circuit can be implemented with any number of lower-frequency precision measurement technologies because the high-frequency carrier portion of the signal is removed, and thus, the demands on the post-envelope extraction circuit are greatly reduced. In one embodiment, the envelope detector and statistics extraction circuit may be implemented as a logarithmic amplifier followed by an RMS-responding post-processing circuit to provide accurate power measurement.

Abstract: Described herein is technology for, among other things, reducing offset errors in RMS-to-DC converters. The technology involves generating first and second feedback signals with first and second feedback paths respectively. A multiplier is then employed to receive first and second signals and provide a third signal based on multiplying the first signal and the second signal. The first signal is based on an input signal and the first feedback signal, and the second signal is based on the input signal and the second feedback signal. A chopper is then employed to receive an output signal, which is based on the third signal, and a chopping signal, and in turn provide a fourth signal based on multiplying the output signal with the chopping signal. As a consequence, the fourth signal represents the output signal shifted to a frequency different than that of low-frequency noise components of the first and second signals.

Abstract: Described herein is technology for, among other things, reducing offset errors in RMS-to-DC converters. The technology involves generating first and second feedback signals with first and second feedback paths respectively. A multiplier is then employed to receive first and second signals and provide a third signal based on multiplying the first signal and the second signal. The first signal is based on an input signal and the first feedback signal, and the second signal is based on the input signal and the second feedback signal. A chopper is then employed to receive an output signal, which is based on the third signal, and a chopping signal, and in turn provide a fourth signal based on multiplying the output signal with the chopping signal. As a consequence, the fourth signal represents the output signal shifted to a frequency different than that of low-frequency noise components of the first and second signals.

Abstract: Embodiments of the present invention provide systems, devices and methods for detecting the RMS value of a signal. The RMS detector uses multiple variable-gain stages and internal gain control to generate an RMS output signal based on an arbitrary signal input. This RMS detector significantly reduces the signal swings seen on a squarer within prior art RMS detectors and reduces the detector's dependency on DC offsets at low signal levels and overload errors at high signal levels. The embodiments of the present invention also improve the accuracy of the RMS detector within large dynamic signal ranges by obviating the operation of a squarer in saturation or out of the squaring region. Accordingly, embodiments of the present invention are able to more accurately detect RMS values on a signal, operate over relatively higher signal ranges, and better function within different signal modulation schemes, particularly those with large peak-to-average ratios.

Abstract: The present invention relates to an exponential function generator which is realized with only CMOS element without BJT element, not limited by the physical properties of the element or a square circuit, and not complicated in its configuration, and a variable gain amplifier using the same. The exponential function generator includes a voltage-current converter, 1st to nth curve generators for mirroring the current from the voltage-current converter, outputting a current adjusted according to a predetermined ratio, and an output end for outputting the sum of the current from the 1st to nth curve generators. The exponential current generator is configured to generate the current exponentially adjusted according to the control voltage.

Abstract: An RMS to DC converter squares an a-c input signal to obtain a squared direct current voltage signal. The squared direct current voltage signal is applied to successive stages, each stage amplifying its received signal and detecting the amplified level of the signal within a confined range. The detected levels detected in the successive stages are added to produce an output d-c signal that is variable in linear proportion to logarithmic change in RMS voltage of the input signal. The voltage level of the squared direct current voltage signal can be clamped to a predetermined maximum voltage. To expand the range of detection, the squared direct current voltage signal is attenuated prior to detection in one or more of the stages.

Abstract: A current squaring cell is provided for producing an output current that correlates to the square of an input signal current. The current squaring cell comprises a first circuit portion, which receives a first tail current that is positively proportional to the input signal current, and a second circuit portion, which connects to the first circuit portion and receives a second tail current that is negatively proportional to the input signal current.

Abstract: An embodiment of a method for measuring an RMS voltage of an arbitrary time-varying waveform includes: a) coupling said arbitrary time-varying waveform to said thermally sensitive device; b) decoupling said arbitrary time-varying waveform from said thermally sensitive device; c) coupling said thermally sensitive device to said controlled DC voltage source; d) measuring a current through said thermally sensitive device at least two points in time; e) determining a change in said current over said at least two points in time; f) if said current is increasing between said at least two points in time, then decrease said controlled DC voltage source responsive to determining that said current is increasing; g) if said current is decreasing between said at least two points in time, then increase said controlled DC voltage source responsive to determining that said current is decreasing; and h) repeating steps a)–g).

Abstract: Provided is a CMOS exponential function generating circuit capable of compensating for the exponential function characteristic according to temperature variations. The exponential function generating circuit includes an voltage scaler scaling the value of an external gain control voltage signal, an exponential function generating unit generating exponential function current and voltage in response to a signal output from the voltage scaler, a reference voltage generator providing a reference voltage to the exponential function generating unit, and a temperature compensator compensating for the exponential function characteristic according to temperature variations.

Abstract: Techniques for determining root mean square (RMS) values of a signal for controlling operation of grid-linked converters, such as DC-to-AC inverters, via squaring the signal, sampling the squared signal n times during a cycle period to obtain n samples, summing the first n?1 samples to obtain a first value, multiplying the first value by a sampling time and a frequency of the signal to obtain a second value, determining a compensation factor, adding the compensation factor to the second value to obtain a third value, and determining a square root of the third value to obtain a RMS result.

Abstract: The present invention discloses a circuit (10) adapted to compensate for RMR variations and shunt resistance across the RMR comprising a first current source (idc1) coupled to a first resistor (r1), a second current source (idc2) coupled to a second resistor (r2), wherein the first resistor (r1) and the second resistor (r2) are coupled, a resistive sensor (RMR) coupled on either side to a third resistor (r3) and to a fourth resistor (r4), and a transconductance feedback block (GM) coupled to the resistive sensor (RMR), the third resistor (r3), and to the fourth resistor (r4).

Abstract: An apparatus and method for signal processing in a root-mean-square (RMS) meter. In representative embodiments, the root-mean-square (RMS) meter includes an RMS converter having a converter input and a converter output. The RMS converter converts a time varying signal applied to the converter input to a signal at the converter output. The value of the signal at the converter output is indicative of the RMS value of the applied signal. The signal at the converter output comprises a non-time varying component and a time varying component as determined by a time constant of the RMS converter. The RMS meter further includes an inverting amplifier having an inverter input and an inverter output. The converter output is connected to the inverter input. In addition, the RMS meter includes a switch having first, second, and central contacts. The converter output is connected to the first contact, and the inverter output is connected to the second contact.

Abstract: A method and apparatus for setting the level of an analog signal supplied to an electronic device having a maximum input level. The method includes computing a gain which, when applied to the analog signal, causes the amplified signal to exceed the maximum input level for a percentage of time which is greater than zero, and applying the gain to the analog signal. When clipping occurs at least part of the time, the correlation result obtained for a pair of truly correlated signals remains virtually unaffected, while there is actually a beneficial effect on the correlation result obtained for a pair of truly uncorrelated signals. To determine the amplifier gain needed to attain the desired amount of clipping, the present invention capitalizes on the availability of power measurements taken from the signal before it was amplified. Reliance on feedback from the amplifier output is not required, resulting in a simplified gain computation process.

Abstract: The present invention relates to analog computation circuits that use a synchronous demodulator topology which can be configured to perform arithmetic computation, power measurements, and/or energy measurement of various analog signals. The computation circuits have circuitry that generates an output signal based on the values of a first input signal, a second input signal, and a reference signal. This invention provides accurate computation of two signals by using modulation circuitry (e.g., &Dgr;-&Sgr; modulation circuitry), demodulation circuitry (e.g., multiplying digital-to-analog converters), delay circuitry, and output circuitry.

Abstract: An RMS-DC converter generates a series of progressively amplified signal pairs which are then multiplied and weighted in such a way as to cancel uncorrelated noise while still providing true square-law response. The converter includes two series of gain stages for generating the amplified signal pairs, and a series of four-quadrant multipliers for multiplying and weighting the amplified signal pairs in response to a series of weighting signals. The outputs from the multipliers are summed and averaged, and a final output signal is generated by integrating the difference between the averaged signal and a reference signal. To preserve the square-law response over a wide range of input voltages, the system is servoed by feeding the final output signal back to an interpolator which generates the weighting signals as a series of continuously interpolated, overlapping, Gaussian-shaped current pulses having a centroid that moves along the length of the interpolator as the final output signal varies.

Abstract: An input system for a variable gain amplifier using a continuously interpolated attenuator includes a plurality of gm stages in which the collector current from one transistor in each gm stage is diverted to AC ground, thereby eliminating a feedforward path and providing flat frequency response at very high frequencies. An additional feedforward path through the parasitic emitter capacitances in each gm stage is eliminated by a filter capacitor coupled the common emitter node of each gm stage. A compensation transistor included in each gm stage provides a differential output signal which can be used to cancel common mode feedforward signals which are coupled to the output through the collector-junction capacitances of the gm stages. The effects of parasitic capacitances are further reduced by reverse biasing the gm stages that are off.

Abstract: A precision RMS measurement system is provided by extending the effective resolution of a medium-resolution sampling RMS converter. An AC or other time-varying cyclic signal is simultaneously applied to an average-responding AC-to-DC converter and to a high-speed medium resolution sampling analog-to-digital converter. The average voltage produced by the AC-to-DC converter is measured by a precision analog-to-digital converter to produce a highly accurate DC voltage measurement. The output of the sampling analog-to-digital converter is provided to a digital signal processor, which calculates the RMS and average values. A microprocessor then multiplies the ratio of the calculated RMS and average values by the highly-accurate DC average to produce a highly accurate RMS voltage. The precision RMS voltage is then displayed.

Abstract: An RMS-DC converter generates a series of progressively amplified signal pairs which are then multiplied and weighted in such a way as to cancel uncorrelated noise while still providing true square-law response. The converter includes two series of gain stages for generating the amplified signal pairs, and a series of four-quadrant multipliers for multiplying and weighting the amplified signal pairs in response to a series of weighting signals. The outputs from the multipliers are summed and averaged, and a final output signal is generated by integrating the difference between the averaged signal and a reference signal. To preserve the square-law response over a wide range of input voltages, the system is servoed by feeding the final output signal back to an interpolator which generates the weighting signals as a series of continuously interpolated, overlapping, Gaussian-shaped current pulses having a centroid that moves along the length of the interpolator as the final output signal varies.

Abstract: An RMS-DC converter provides extended dynamic range by driving a squaring cell with a variable gain amplifier. Temperature effects in the squaring cell can be cancelled by driving a second squaring cell with a reference signal and averaging the difference between the output signals from the two squaring cells. In a transmission system utilizing a power measurement system having two detector cells, square-law conformance errors in the detector cells can be cancelled by driving one of the detectors cells with a replica of the baseband modulation signal.

Abstract: The invention provides methods and apparatus for performing RMS-to-DC conversion in which the input signal is sampled using circuitry that includes a clock signal. The clock signal is dithered, however, to account for various problems that may occur, such as aliasing. The dithering may occur during the sampling prior to the conversion, such as when the input signal is converted to a digital signal prior to the conversion. Alternately, the dithering may occur as part of the RMS-to-DC conversion.

Abstract: A method and apparatus for measuring the RMS value of an electrical signal. An electrical signal is converted to a digital signal. The digital signal is squared and low pass filtered to extract the DC component, the DC component being recognized as the mean-square of the signal. In use in a measurement device, the square root of the DC component is taken and displayed as the RMS value of the electrical signal.

Abstract: A sampled data, analog computing method and circuit for producing an output voltage V.sub.OUT with a magnitude proportional to the root-mean-square value V.sub.RMS of a monopolar input voltage V.sub.DC, first demodulates or chops a time-varying monopolar input voltage V.sub.DC of interest to produce a demodulated or chopped voltage V.sub.CHOP, and then filters the chopped voltage V.sub.CHOP to produce an output voltage V.sub.OUT. The chopping operation is conducted at a duty ratio or modulation ratio proportional to the ratio of the monopolar input voltage V.sub.DC to the output voltage V.sub.OUT, with the result that the magnitude of the output voltage V.sub.OUT is proportional to the root-mean-square value V.sub.RMS of the monopolar input voltage V.sub.DC. The illustrated embodiment of the invention (i) rectifies a time-varying bipolar input voltage V.sub.AC of interest with a precision fullwave rectifier to produce the monopolar input voltage V.sub.

Abstract: An explicit RMS detector sequentially performs the square, mean and square-root operations in the log domain. An input signal is first applied to a log converter, and then to a times two multiplier which squares the input signal. A log filter averages the log square input signal for a predetermined period to approximate the "mean" operation, after which a times one-half multiplier operates on the log mean-square input signal to compute the square root. An exponentiator exponentiates the resulting log root-mean-square input signal to produce an output signal that approximates the RMS value of the input signal for the predetermined period.

Abstract: A method of sensing the rms value of a phase chopped sinusoidal electrical waveform including combining an input signal representative of the waveform with an auxiliary signal in a combining circuit which produces a combining circuit output equal to whichever is the greater of the auxiliary signal and the modulus of the input signal, and averaging the combining circuit output over at least one half cycle of the waveform. The resulting output signal level is representative of the sensed rms value. By making the auxiliary signal equal to the product of a predetermined factor multiplied by a desired value of the output signal level, a feedback signal is produced to allow control of the rms voltage delivered to a load such as a lighting circuit.

Abstract: An estimating circuit for application in estimating or deriving the value V.sub.rms.sup.2 or V.sub.peak.sup.2, of a line voltage V.sub.AC provides fast response time and a substantially ripple free value for these signals by the utilization of a controlled harmonic oscillator whose output precisely tracks the input voltage waveform. Two out of phase (by .pi./2) sine wave signals are derived from the input sine wave and these two out of phase signals are squared and summed to derive or estimate the desired square of the sine waveform signal at a fast response time while substantially excluding ripple of the estimated out of phase sine waves. An estimating circuit, described herein, comprises two integrator circuits series connected into a substantially closed loop. The output of the second integrator circuit is fed back to the input of the first integrator circuit. The output of each individual integrator circuit is a voltage sine wave separated in phase from the output of the other integrator by .pi.