Abstract: A four-quadrant multiplier using BiCMOS circuits can be applied in high-frequency analog circuits. The four-quadrant multiplier includes two transform circuits to generate two intermediate signals proportional to the first and second input signals, respectively; four square circuits to provide a squaring relationship between current and voltage in the four square circuits; and two resistors serving as a load for the currents of the four square means and for outputting the resultant voltage to an output port.

Abstract: An operational transconductance amplifier having a good transconductance linearlity within a wide input voltage range that can be realized easily without increase in chip area. There are a first balanced differential pair of first and second MOS transistors that are driven by a first constant current source, and a second balanced differential pair of third and fourth MOS transistors that are driven by a second constant current source. The first, second, third and fourth transistors have the same transconductance parameter. Drains of the first and fourth transistors are coupled together and drains of the second and third transistors are coupled together. A differential output current of the amplifier is derived from the output ends of the first and fourth transistors and the output ends of the second and third transistors. Gates of the first and third transistors are applied with an input voltage. Gates of the third and fourth transistors are applied with a voltage produced by dividing the input voltage.

Abstract: A stacked double balanced mixer (220) includes a double balanced mixer (320) and a first cross coupled differential mixer (330). The double balanced mixer (320) includes two input transistors (321, 322) and four cross coupled output transistors (323-326). The first cross coupled differential mixer (330) includes four cross coupled input/output transistors (331-334) and a second mixer output (227, 228). The four cross coupled input/output transistors (331-334) have first output terminal pairs DC coupled in series to second output terminal pairs of the four cross coupled output transistors (323-326). The stacked double balanced mixer (220) generates, at the second mixer output (227,228), a second IF differential output signal having a second IF frequency at a difference of a radio frequency of a differential input signal and the sum of first and second LO frequencies, respectively, of first and second LO signals.

Abstract: A multiplier circuit includes first and second squaring circuits each having a differential input terminal pair. A first input terminal of the differential input terminal pair of the first squaring circuit is applied with a first input voltage and the second input terminal thereof is applied with a second input voltage opposite in phase to the first input voltage. A first input terminal of the differential input terminal pair of the second squaring circuit is supplied with the second input voltage and the second input terminal thereof is applied with the first input voltage. The first and second squaring circuits each includes two sets of unbalanced differential transistor pairs which are arranged so that their inputs are opposite in phase and their outputs are connected in common. The transistors of each unbalanced differential transistor pair have different emitter sizes.

Abstract: A four quadrant multiplier circuit having a high dynamic range and capable of operating at low voltages includes a dual transconductance amplifier circuit (TAC) consisting of NPN transistors (20 to 23 and 64 to 67), coupled to a first input port (36), first and second folded Darlington circuits (57,58), and a resistive element (78). Each Darlington circuit includes first and second NPN transistors (68,70 and 69,71) whose emitter-collector paths are connected in series and a third PNP transistor (72,73) having its emitter-collector path connected between the collector of the first transistor (68,69) and the base electrode of the second transistor (70,71). The emitter-collector junction (76,77) of the first and second transistors (68,70 and 69,71) is connected to the base electrode of the third transistor (72,73). The resistive element (78) is connected between the base electrodes of the third transistors (72,73). A second input port (56) is connected to the base electrodes of the first transistors (68,69).

Abstract: A four quadrant multiplier comprises X and Y input stages for coupling signals to a gain core amplifier for multiplication, wherein each of the input stages and the gain core amplifier further comprises a pair of complementary circuits, based on devices having opposite conductivity properties. The complementary X-input stage is a dual differential amplifier which provides balanced, differential outputs when loaded by the gain core differential amplifiers, due to separate cancellation of the npn and pnp base currents within the loaded X-input stage. Outputs from the cross-connected gain core amplifiers provide a pair of complete, ground referenced product signals having opposite phases. The X-input stage is also suitable for driving other complementary, differential stages such as two quadrant multipliers, voltage controlled amplifiers, and high speed analog multiplexing circuits.