Abstract: An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more power amplifiers for amplifying a signal for transmission through the antenna. A power amplifier may include an amplitude modulation distortion compensation circuit coupled to the input of the power amplifier. The compensation circuit may include adaptive biasing transistors each having a first source-drain terminal coupled to the input of the power amplifier, a second source-drain terminal coupled to a supply voltage, and a gate terminal configured to receive a control voltage via a big resistor. The control voltage can be set to a voltage level so that the adaptive biasing transistors are only turned on when the voltage swing at the input of the power amplifier is relatively large.

Abstract: A radio frequency (RF) power detector with a variable threshold for dynamic power detection. The RF power detector includes stacked transistors of an input stage and stacked transistors of an output stage. A DC bias voltage plus an input RF signal are applied to a control electrode on the input stage and the same DC bias voltage plus an additional DC bias voltage are applied to a control electrode on the output stage. Depending on the input power of the RF signal, a ? current is generated in the output stage, and the output capacitor is either charged or discharged, and the output capacitor voltage is compared to a threshold to generate an output signal. The output signal may be averaged over time by two capacitors, miller capacitor and output capacitor. The output voltage of the RF power detector is an integration over time of the input RF power.

Abstract: A distance from an apparatus to at least one object is determined by generating a first signal and generating light modulated by the first signal to be emitted from the apparatus. Light reflected by the at least one object is detected using a Time-of-flight detector array, wherein each array element of the Time-of-flight detector array generates an output signal from a series of photon counts over a number of consecutive non-overlapping time periods. The output signals are compared to the first signal to determine at least one signal phase difference. From this at least one signal phase difference a distance from the apparatus to the at least one object is determined.

Abstract: According to one aspect of the present disclosure, there is provided a device that includes: a first quadrature modulator configured to receive an in-phase portion of a baseband signal and a quadrature portion of the baseband signal, and to produce a first portion of an output signal according to the in-phase and quadrature portions of the baseband signal; a second quadrature modulator configured to receive a first modified signal and a second modified signal, and to produce a second portion of the output signal according to the first and second modified signals; an output circuit configured to sum the first and second portions of the output signal, and to transmit the output signal to an antenna; and a mode selection circuit configured to turn on the first quadrature modulator, to receive a control signal, and to determine whether to turn on the second quadrature modulator according to the control signal.

Abstract: The disclosure relates to a pre-5th-generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-generation (4G) communication system such as long term evolution (LTE). An operation method of a device for upconversion in a wireless communication system is provided. The method includes receiving a first local oscillator (LO) signal, generating a second LO signal, based on the first LO signal and cross-coupled latches, receiving an input signal, generating an upconverted frequency, based on the second LO signal and the input signal, generating an output signal obtained by processing a harmonic component included in the upconverted frequency, and transmitting the generated output signal.

Abstract: Various aspects provide for a digitally programmable analog duty-cycle correction circuit. For example, a system includes a duty-cycle correction circuit and a duty-cycle distortion detector circuit. The duty-cycle correction circuit adjusts a clock associated with the transmitter. The duty-cycle distortion detector circuit facilitates digital control of a duty-cycle of the clock associated with the duty-cycle correction circuit based on duty-cycle distortion error associated with output of the transmitter.

Abstract: A dual-band mixer circuit includes a mixer configured to receive an input signal and a local oscillator (LO) signal and to generate an output frequency signal, and a switchable inductance circuit coupled to an output of the mixer, and including a transformer including a primary inductor and a secondary inductor, the primary inductor being electrically coupled to the output of the mixer, a capacitor electrically coupled to the secondary inductor, and a switch electrically coupled to the capacitor and the secondary inductor.

Abstract: The present disclosure provides a voltage-to-time converter and method for reducing parasitic capacitance and power supply influences. The voltage-to-time converter includes: a main sampling network, a compensation sampling network, a discharge network and an over-threshold detection unit. The influence of a traditional VTC parasitic capacitance on a VTC output swing amplitude is reduced by using the compensation sampling network. A sampling common-mode level of the compensation sampling network is compensated, such that the influence of the low-frequency disturbance of a power supply voltage on a threshold of a traditional VTC threshold detection circuit is reduced. The output swing amplitude of the voltage-to-time converter of the present disclosure can reduce the influence of a parasitic capacitance. A voltage common-mode level of a VTC input end is related to a power supply voltage, which reduces a conversion error caused by the influence of the power supply voltage on a threshold.

Abstract: A receiver includes one or more mixers configured to sample an input analog signal at a plurality of discrete points in time to obtain a discrete-time sampled signal based on a local oscillating signal provided by a local oscillator; and a sample reordering circuit coupled to the one or more mixers and configured to reorder a sequence of samples received from the one or more mixers.

Abstract: A down-conversion mixer includes a converting-and-mixing module and a load module. The converting-and-mixing module performs voltage-to-current conversion and mixing with first and second differential oscillatory voltage signal pairs upon a differential input voltage signal pair to generate first and second differential mixed current signal pairs. The load module includes two RL circuits and a negative resistance providing circuit that cooperate to convert the first and second differential mixed current signal pairs into first and second differential mixed voltage signal pairs. Each RL circuit includes two variable resistors, and an inductor connected between the variable resistors.

Abstract: Systems and methods are disclosed for improved linearity performance of a mixer. An example mixer includes switching circuit elements configured to be switched on and switched off based at least partly on a local oscillator signal and capacitors including a respective capacitor in parallel with each of the switching elements. The mixer is configured to mix the input signal with the local oscillator signal to thereby frequency shift the input signal.

Abstract: An analog neuromorphic circuit is disclosed, having input voltages applied to a plurality of inputs of the analog neuromorphic circuit. The circuit also includes a plurality of resistive memories that provide a resistance to each input voltage applied to each of the inputs so that each input voltage is multiplied in parallel by the corresponding resistance of each corresponding resistive memory to generate a corresponding current for each input voltage and each corresponding current is added in parallel. The circuit also includes at least one output signal that is generated from each of the input voltages multiplied in parallel with each of the corresponding currents for each of the input voltages added in parallel. The multiplying of each input voltage with each corresponding resistance is executed simultaneously with adding each corresponding current for each input voltage.

Abstract: A down-conversion mixer includes a trans conductance circuit and a mixing circuit. The transconductance circuit includes: first and second transconductance units cooperatively converting a differential input voltage signal pair into a differential input current signal pair; and an inductor coupled between the first and second transconductance units. The mixing circuit is coupled to a common node of the first trans conductance unit and the inductor and to a common node of the second transconductance unit and the inductor for receiving the differential input current signal pair therefrom, and mixes the differential input current signal pair with a differential oscillatory voltage signal pair to generate a differential mixed voltage signal pair.

Abstract: A power amplifier module includes a combining circuit including a combiner. The combining circuit further includes a first inductor connected in series between an output terminal of a first amplifier and the combiner, a second inductor connected in series between an output terminal of a second amplifier and the combiner, and a second capacitor having an end connected to the combiner and another end grounded. A phase of a third signal from the output terminal of the first amplifier to the second amplifier through the combiner is delayed by about 45 degrees in the first inductor and the second capacitor, and is delayed by about 45 degrees in the second inductor and the second capacitor. A phase of the third signal from the output terminal of the first amplifier to the second amplifier through the first capacitor is advanced by about 90 degrees.

Abstract: Provided is a sine wave multiplication device of simple configuration, broad input signal level range, and minimal fluctuation in characteristics due to temperature. A signal component that corresponds to a product of an input signal Si and the third harmonic wave of a first square wave W1 included in an output signal Su1; and a signal component that corresponds to a product of the input signal Si and the fifth harmonic wave of the first square wave W1 is canceled by: a signal component that corresponds to a product of the input signal Si and the fundamental wave of a second square wave W2 included in an output signal Su2; and a signal component that corresponds to a product of the input signal Si and the fundamental wave of a second square wave W3 included in an output signal Su3.

Abstract: A passive mixer may include an output coupled to a next stage circuit. The output may be coupled to baseband inputs via first switches. The passive mixer may further include a tunable capacitor bank. The tunable capacitor bank may be coupled via second switches to the baseband inputs.

Abstract: A down-conversion mixer includes a transconductance unit, a resonant unit and a mixing unit. The transconductance unit converts a differential input voltage signal pair into a differential input current signal pair. The resonant unit provides a negative resistance and a differential auxiliary current signal pair. The mixing unit mixes a combination of the differential input current signal pair and the differential auxiliary current signal pair with a differential oscillatory voltage signal pair to generate a differential mixed voltage signal pair.

Abstract: A switching apparatus includes an energy store and two measuring devices connected to the control apparatus, the energy store being connected in series between the supply connection and the power supply via the first measuring device, the control apparatus can ascertain if the supply voltage attached to the primary side of the power supply falls short of a first voltage threshold value and, via the second measuring device, if the supply voltage of the power supply attached to the secondary side of the power supply falls short of a second voltage threshold value, the control apparatus evaluates the time between falling short of the first voltage threshold value and falling short of the second voltage threshold value.

Abstract: A sub-harmonic mixer two or more cascaded stages for converting a Radio Frequency signal to an Intermediate Frequency signal. Each stage comprises a common-emitter transistor or a common-source transistor and each stage having an input and an output, the output of each stage is coupled to the input of a next stage by a capacitor. An Alternating Current choke is coupled at a collector or drain of each transistor. An LO input is coupled to the input of a first stage of the two or more stages; an RF input is coupled to the output of the first stage of the two or more stages; and an IF output is coupled to the output of a last stage of the two or more stages.

Abstract: A compensation circuit is configured to compensate for a loss of low-frequency signal content of an input signal at a receiver input. The compensation circuit includes a switching circuit and a summing circuit coupled to the switching circuit. The switching circuit is configured to receive a first plurality of digitized values sampled from a receiver output signal. The summing circuit is configured to generate a summation signal based on a combination of a first plurality of input values selected by the switching circuit. The selecting is based on the first plurality of digitized values. The compensation circuit is configured to provide to the receiver input a compensation signal to compensate for the loss of the low-frequency signal content from the input signal. The compensation signal is based on the summation signal and is a function of at least one gain value.

Abstract: A mixer includes a trans conductance unit, a gain boost unit, a mixing module and a buffer. The trans conductance unit, the gain boost unit and the mixing module cooperatively mix a differential input voltage signal pair with a differential oscillatory voltage signal pair to generate a differential mixed voltage signal pair. The buffer performs buffering on the differential mixed voltage signal pair, and has inductance that cooperates with parasitic capacitance at output terminals thereof to form an LC tank circuit that reaches resonance at a frequency of the differential mixed voltage signal pair to behave as an open circuit.

Abstract: A method for clock spur artifact correction includes obtaining a plurality of switching stage input signals generated in accordance with an input signal level of an external amplifier, and adjusting the plurality of switching stage input signals such that a clock spur harmonic artifact is reduced. The clock spur harmonic artifact includes a first clock spur harmonic artifact generated in a plurality of external signal paths including external switching stages, and the adjusting the plurality of switching stage input signals includes one of: adjusting a duty ratio of one of the plurality of switching stage input signals in accordance with a gain mismatch between two of the external signal paths; and injecting a first Continuous Wave (CW) signal into the plurality of switching stage input signals in accordance with a previous amplitude of the first clock spur harmonic artifact.

Abstract: An apparatus for performing capacitor amplification in an electronic device may include a first resistor and a second resistor that are connected in series and coupled between a set of input terminals of a receiver in the electronic device, a common mode capacitor having a first terminal coupled to a common mode terminal and having a second terminal, and an alternating current (AC)-coupled amplifier that is coupled between the common mode terminal and the second terminal of the common mode capacitor. The first resistor and the second resistor may be arranged for obtaining a common mode voltage at the common mode terminal between the first resistor and the second resistor. In addition, the common mode capacitor may be arranged for reducing a common mode return loss. Additionally, the AC-coupled amplifier may be arranged for performing capacitor amplification for the common mode capacitor.

Abstract: An impedance matching power combining/dividing system and a method for combining power combiners/dividers are presented. The impedance matching power combiner comprises a cylindrical matching cavity, two or more coaxial inputs, each of the two or more coaxial inputs having an inner input conductor and an outer input conductor and having a source impedance, a coaxial output having an inner output conductor and an outer output conductor and having a load impedance and a circular matching plate suspended inside the cylindrical matching cavity, wherein the inner input conductors and the inner output conductor are electrically connected to the matching plate, the outer input conductors and the outer output conductor are electrically connected to the cylindrical matching cavity and the cylindrical matching cavity at least partially matches the source impedance with the load impedance. The system and method to combine/divide groups of power combiners/dividers to handle high power are also presented.

Abstract: A multiple input, multiple function, multiple output (MIMFMO) radiofrequency (RF) processor including a MIMFMO RF processor element. The MIMFMO RF processor element is configured to receive multiple RF input signals, perform multiple RF operations on the multiple RF input signals, and output processed RF output signals to multiple output circuits.

Abstract: In semiconductor switches, the isolation can be limited by the capacitive coupling between the switch input and the switch output. Ultra-high isolation can be achieved by adding a coupled transmission line to the semiconductor switch. The coupled transmission line introduces inductive coupling, which cancels at least a part of the capacitive coupling between the switch input and the switch output.

Abstract: A variable gain amplifier having stabilized frequency response for widened gain control range. A resistor-capacitor compensation network is provided between two differential current input ports and corresponding emitter nodes of cross-coupled four transistors in the variable gain amplifier to desensitize the gain control voltages to the system noise and provide compensation to the VGA frequency response when the differential gain control voltage varies the gain setting, yielding a substantially stabilized frequency response over a ?3 dB bandwidth ranging from 1 GHz to 60 GHz with a widened gain control range up to 12 dB without increasing power consumption.

Abstract: Systems and methods analyzing body fluids contain cells including blood, bone marrow, urine, vaginal tissue, epithelial tissue, tumors, semen, and spittle are disclosed. The systems and methods utilize an improved technique for applying a monolayer of cells to a slide and generating a substantially uniform distribution of cells on the slide. Additionally aspects of the invention also relate to systems and method for utilizing multi-color microscopy for improving the quality of images captured by a light receiving device.

Abstract: An extended analog computer includes an electrically conductive material with a plurality of sides. At least one of the sides is isolated from an electrical ground and at least one other side is electrically grounded. A plurality of electrically conductive pins is arranged in the electrical conductor. At least one voltage sensor is arranged in the electrical conductor proximate to the at least one side that is isolated from the electrical ground.

Abstract: An embodiment of a plasma ignition system for an internal combustion engine having up to N cylinders includes a power splitter, N phase shifters, N amplifiers, a power combiner network, and up to N radiation devices. The power splitter divides an input RF signal into N divided RF signals. Each phase shifter applies one of multiple pre-determined phase shifts to one of the N divided RF signals to produce N phase shifted RF signals. The N amplifiers amplify the N phase shifted RF signals to produce N amplified, phase shifted RF signals. The power combiner network combines the N amplified, phase shifted RF signals to produce N output RF signals. Each of the radiation devices receives one of the N output RF signals, and produces a plasma discharge when a power level of the output RF signal is sufficiently high.

Abstract: In one example, a current steering circuit for a digital-to-analog converter (DAC) includes a source-coupled transistor pair responsive to a differential gate voltage; a current source coupled to the source-coupled transistor pair operable to source a bias current; a load circuit coupled to the source-coupled transistor pair operable to provide a differential output voltage; a driver having a first input, a second input, and a differential output, the differential output providing the differential gate voltage; and combinatorial logic having a data input, a clock input, a true output, and a complement output, the true output and the complement output respectively coupled to the first input and the second input of the driver, the combinatorial logic operable to exclusively OR a data signal on the data input and a clock signal on the clock input.

Abstract: A mixer circuit includes a single-ended to differential converter, first and second transistors, first to fourth inductive transmission lines, and a mixer. The first and second transistors receive a differential input voltage signal pair from the single-ended to differential converter and generate a differential input current signal pair. The mixer mixes the differential input current signal pair with a differential oscillatory voltage signal pair. The first and second inductive transmission lines are configured such that an equivalent input impedance seen into the first and second transistors matches an equivalent output impedance seen into the first single-ended to differential converter.

Abstract: In a passive mixer, switches and a capacitance are shared between bootstrapped mixing transistors, reducing the number of components required as compared to prior art bootstrap designs. Shared bootstrap circuits operate in an interleaved fashion between I and Q mixer circuits, at twice the LO frequency. That is, the shared bootstrap circuits in each I mixer circuit charge their capacitors in a first half-period of a clock, and connect the shared capacitor to the gate of an enabled mixing transistor in the second half-period. The shared bootstrap circuits in the Q mixer circuit charge their capacitors in the second half-period, and connect the shared capacitor to the gate of an enabled mixing transistor in the first half-period. One of two mixing transistors connected to each shared bootstrap circuit is alternately enabled during the clock signal half-periods that the shared bootstrap circuit is not charging its capacitor.

Abstract: The invention relates to a Frequency Divider Circuit for dividing an input RF signal to a frequency divided RF signal. The circuit comprises a RF pair, a switching-quad pair coupled in series with a transimpedance amplifier and a double pair of emitter followers. The circuit comprises coupling elements for providing first DC paths to first amplifier paths of the RF pair and for providing second DC paths to second amplifier paths of the series arrangement of the switching-quad pair and the transimpedance amplifier. The first DC paths are independent of the second DC paths. RF connections are provided to couple the first and the second amplifier paths for transferring a signal from the first amplifier paths to the second amplifier paths.

Abstract: A frequency converter, capable of obtaining resonance characteristics having a high Q factor and a high multiplication signal and having a narrow-band frequency selectivity function, is provided by the following configuration. A magnetoresistance effect element includes a pinned magnetization layer, a free magnetization layer, and a non-magnetic spacer layer disposed between the pinned magnetization layer and the free magnetization layer. In response to an input of a high frequency signal and a local signal, the magnetoresistance effect element generates a voltage signal (multiplication signal) by multiplying the signals by each other using a magnetoresistance effect. A magnetic field generated by a magnetic-field applying unit is applied to the free magnetization layer of the magnetoresistance effect element in a direction perpendicular to a film surface direction or by tilting an angle of the magnetic field from the film surface direction toward a direction perpendicular to the film surface direction.

Abstract: A mixer includes an input stage to convert an RF input signal to an output signal, and a mixer core to mix the output signal from the input stage with a local oscillator signal. The input stage may include an input cell having a first differential pair of cross-connected transistors, and a linearizer coupled to the input cell. The linearizer may include a second differential pair of transistors having first and second inputs coupled to the input terminals and first and second outputs coupled to the output terminals.

Abstract: An analog baseband filter apparatus for a multi-mode and multi-band wireless transceiver and a method for controlling the analog baseband filter apparatus are provided. The analog baseband filter apparatus includes a plurality of Radio Frequency (RF) units, each of the plurality of RF units being for receiving RF signals of one of a plurality of frequency bands and outputting baseband signals, a plurality of filter blocks for filtering and amplifying the baseband signals, and a switching unit for connecting at least two of the plurality of RF units to at least one of the plurality of filter blocks according to a selected communication mode, wherein the at least one of the plurality of filter blocks is configured to be connected to a capacitor region of an adjacent filter block from among the plurality of filter blocks.

Abstract: It is disclosed a mixer arrangement for complex signal mixing comprising a first harmonic rejection mixer, and a second harmonic rejection mixer. Each of the harmonic rejection mixers comprises mixer unit cells wherein each mixer unit cell comprises a differential input, transconductance elements corresponding to the differential input, and a switching network arranged to switch signals from the transconductance elements to a differential output, and the first and the second harmonic rejection mixers have mutual quadrature phase relationship. The first and the second rejection mixer share a plurality of mixer unit cell, each comprising an input for receiving a signal to be mixed, an input for receiving control signals derived from a local oscillator signal, and one output for each of the first and second harmonic rejection mixers. A radio circuit comprising such a mixer arrangement and a communication apparatus comprising such a radio circuit are also disclosed.

Abstract: A mixer includes a first node to which an intermediate frequency (IF) signal is input; first and second transistors that respectively have control terminals supplied with local signals having mutually opposite phases and output terminals connected to the first node; a first filter that is connected between the output terminal of the second transistor and the first node and suppresses passage of the IF signal; a second node to which the IF signal is input; third and fourth transistors that respectively have control terminals supplied with local signals having mutually opposite phases and output terminals connected to the second node; a second filter that is connected between the output terminal of the fourth transistor and the second node and suppresses passage of the IF signal; and a combiner combining a signal output from the first node and a signal output from the second node.

Abstract: An adaptable mixer device is operable in a first mode and a second mode and includes a first set of mixer units operable in the first mode and a second set of mixer units operable in the second mode. The second set of mixer units includes at least one mixer unit that is common to both the first set of mixer units and the second set of mixer units. The second set of mixer units also includes a plurality of mixer units that are not in the first set of mixer units. Similarly, the first set of mixer units including a plurality of mixer units that are not in the second set of mixer units.

Abstract: A multi-mode circuit can switch an output section between mixer and amplifier modes, with or without variable gain, to create a variable gain amplifier or a variable gain mixer or route an input signal by adjusting a bias current. An input section is controlled by a bias section and connected to the output section. The output section includes a first base-coupled transistor pair adapted to receive an input signal at emitters of the first base-coupled transistor pair, receive a bias signal at bases of the first base-coupled transistor pair, and provide an output signal at collectors of the first base-coupled transistor pair.

Abstract: A double balanced image reject mixer (IRM) can be configured to comprise: a common radio frequency (RF) port; four mixer devices, each comprising an intermediate frequency (IF) port, an RF port and an local oscillator (LO) port; and a four-way, in-phase splitter/combiner. The four-way, in-phase splitter/combiner can be connected between the RF common port and the RF port of each of the four mixer devices. A method of performing spurious suppression and image reject mixing in a double balanced IRM, can comprise: directly in-phase combining radio frequency (RF) output signals of four mixer devices located in the double balanced IRM; and phase pairing local oscillator (LO) signals and intermediate frequency (IF) signals such that the combination of the phases of the respective IF and LO signals can result in substantially equal phase RF signals at the RF ports of all four mixer devices.

Abstract: Embodiments of the present invention disclose a frequency mixing circuit and a method for suppressing local oscillation leakage in the frequency mixing circuit, where a mixed input signal and a local oscillation signal are involved, and local oscillation leakage can be effectively reduced by using a frequency mixing circuit whose structure is simpler and is easier to be implemented. The frequency mixing circuit includes a direct current bias circuit, where the direct current bias circuit includes a direct current bias voltage source used for reducing a local oscillation current. The frequency mixing circuit is mainly applied to frequency mixing, and especially to a case where an intermediate frequency signal is mixed with a local oscillation signal to output a radio frequency signal.

Abstract: A transconductance-enhancing passive frequency mixer comprises a transconductance amplification stage, a frequency mixing stage, and an output transresistance amplifier. The transconductance amplification stage has a pre-amplification transconductance-enhancing structure, so that the transconductance is greatly enhanced, thereby obtaining the same transconductance value at a lower bias current. A radio-frequency current is modulated by the frequency mixing stage to generate an output mid-frequency current signal. The mid-frequency current signal passes through the transresistance amplifier, to form voltage output, and finally obtain a mid-frequency voltage signal. The transresistance amplifier has a transconductance-enhancing structure, thereby further reducing input impedance, and improving current utilization efficiency and port isolation. The frequency mixer has the characteristics of low power consumption, high conversion gain, good port isolation, and the like.

Abstract: An apparatus of a Harmonic Rejection Mixer (HRM) for removing a harmonic component and an operating method thereof are provided. The HRM includes a Local Oscillator (LO), at least one frequency converter, at least two mixers, at least one phase converter, and a combiner. The LO generates an LO signal. The at least one frequency converter multiplies the LO signal using different variables to provide the same to at least two mixers. The at least two mixers convert a frequency band of an input signal using the LO signal provided from the LO and the at least one frequency converter. The at least one phase converter controls a phase of an output signal of at least one other mixer excluding one of the at least two mixers. The combiner combines an output signal of the one mixer with an output signal of the at least one phase converter.

Abstract: A single-balanced balun mixer circuit includes a balun with a center tap connected to a differential pair with a tail resistor. The balun receives a first input signal and a second signal at the single-ended input terminal and the center tap, respectively. Such a balun mixer may be used as an up-converter mixer by supplying a baseband or intermediate signal at the center tap and a local oscillator (LO) signal at the single-ended input terminal.

Abstract: A mixer for providing a mixed signal by mixing an input signal and an oscillation signal, comprising a follower and a switch. The follower is arranged to conduct a driving contribution from a bias terminal to an output terminal following a signal at an input terminal, wherein the input terminal and the bias terminal are respectively coupled to the input signal and the oscillation signal, and the output terminal is arranged to output the mixed signal. The switch is arranged to selectively conduct the output terminal to a reference level in response to alternating of the oscillation signal. An associated signal circuit is also disclosed.

Abstract: The present invention provides a transconductance circuit and a frequency mixer. The transconductance circuit includes: a first transistor, a second transistor, a first impedor, a second impedor, a first input network, and a second input network, where a gate of the first transistor is connected to a source of the second transistor through the first input network and the first impedor; and a gate of the second transistor is connected to a source of the first transistor through the second input network and the second impedor. The present invention can enable a current that passes through a transconductance circuit to be reused between a first transistor and a second transistor, thereby improving the gain efficiency of the transconductance circuit and improving performance of the transconductance circuit.

Abstract: Embodiments of the invention described herein provide a magnetic sensor interface capable of adjusting signal conditioning dynamically using a speed signal of a target such that the true positive and negative peaks of the input signal are maintained for the given target across its entire speed range (0-Max rpm), therefore increasing the signal to noise ratio at low speeds and avoiding clipping or distortion at high speeds. In one aspect, a method comprises receiving an alternating differential voltage signal from a sensor. The differential voltage signal has an amplitude that changes relative to a change in speed of a target. The alternating differential voltage signal is converted to an attenuated single-ended voltage signal that can be dynamically scaled. The attenuated single-ended voltage signal can be scaled by multiplying the attenuated single-ended voltage signal by a scaling factor.

Abstract: A sensor circuit for obtaining physical quantities with a small margin of error even when the temperature varies is provided. The sensor circuit includes a sensor, a sampling circuit for obtaining a voltage value or a current value of a signal output from the sensor during a predetermined period and holding the value, and an analog-to-digital converter circuit for converting the held analog voltage value or current value into a digital value. The sampling circuit includes a switch for obtaining the voltage value or the current value and holding the value. The switch includes a transistor including an oxide semiconductor in a channel formation region.