Push-pull Circuit Patents (Class 327/412)
  • Patent number: 9893608
    Abstract: According to one embodiment of the present invention, when a power supply device having first and second amplification units which share an energy storage element is used, it is possible to reduce voltage stress of a semiconductor device and to consistently maintain output voltage outputted to the first and second amplification units while individually adjusting the amplification rates of the first and second amplification units.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: February 13, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Dong Gyun Kim, Dong Young Huh, Jae Sam Lee
  • Patent number: 9608848
    Abstract: A data transmitter includes a vibration motor and a switch to regulate voltage from a direct-current (DC) power supply to the vibration motor. A microcontroller generates a pulse width modulation signal with which to drive the switch and regulate the voltage to the vibration motor in a sinusoidal manner, to generate data as symbols from vibrations that form a series of bits from the vibration motor. The microcontroller may also cancel and jam a sound of vibration (SoV) created by the vibration motor. A data receiver includes a vibration sensor to sample data from vibrations in an incoming signal at a predetermined sampling rate, and a microcontroller, coupled to the vibration sensor, to control the sampling rate through an inter-integrated circuit (I2C) protocol or the like. A memory card, coupled to the microcontroller, stores the data with a serial peripheral interface (SPI) protocol or the like.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: March 28, 2017
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Nirupam Roy, Romit Roy Choudhury, Mahanth K. Gowda
  • Patent number: 9602096
    Abstract: A power electronic device includes first and second electronic switches, each integrated on a package having a low parasitic inductance, a supply terminal and a ground terminal. The first conduction terminal of the first switch may be coupled with the supply terminal, and the second conduction terminal of the second electronic switch may be coupled with the ground terminal. The corresponding control terminals of the switches may be coupled to corresponding pilot drivers. The package may include first and second electric terminals, wherein the second conduction terminal of the first switch is coupled to the first electric terminal, and the first conduction terminal of the second switch is coupled to the second electric terminal. A first inductance may be interposed between the first electric terminal and the output terminal and/or a second inductance interposed between the second electric terminal and the output terminal.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: March 21, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Edoardo Botti
  • Patent number: 8922259
    Abstract: A gate drive circuit includes a power supply circuit that has an output switch function for switching a voltage value of a drive voltage between two levels, a gate-ON drive circuit that outputs a constant electric current toward a gate of an IGBT from an output terminal of the power supply circuit, and a control section performs a constant electric current drive of a gate of the IGBT at a time of a turn-ON by operating the gate-ON drive circuit. At a turn-ON start time, the control section sets the drive voltage to a relatively-high first set value, and then switches the drive voltage to a relatively-low second set value at a switch timing after a mirror period end time.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: December 30, 2014
    Assignee: DENSO CORPORATION
    Inventors: Kazuki Yamauchi, Yasutaka Senda
  • Patent number: 8766701
    Abstract: An apparatus relating generally to an analog multiplexer is disclosed. In such an apparatus, the analog multiplexer has first select circuits and at least one second select circuit. The first select circuits have respective input nodes and output nodes. The output nodes are all coupled to one another to provide an output node of the analog multiplexer. The first select circuits are coupled to a first supply voltage of a first supply domain. The at least one second select circuit is coupled to a second supply voltage of a second supply domain different from the first supply domain. The at least one second select circuit has an input port and an output port. The output port is coupled to an input node of the input nodes.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: July 1, 2014
    Assignee: Xilinx, Inc.
    Inventor: Santosh Kumar Sood
  • Patent number: 8625370
    Abstract: A semiconductor integrated circuit includes a P-type MOS transistor and two or more N-type MOS transistors connected together in series between a first and a second power supply, an input terminal connected to a gate terminal of the P-type MOS transistor and gate terminals of the two or more N-type MOS transistors, an output terminal which is a connection node between the P-type MOS transistor and one of the two or more N-type MOS transistors connected to the P-type MOS transistor, and one or more capacitors connected to the output terminal. The drive capability of the P-type MOS transistor is higher than the overall drive capability of the two or more N-type MOS transistors connected together in series. Therefore, a semiconductor integrated circuit is provided in which fluctuations in the delay time of a delay circuit caused by variations in transistor characteristics can be reduced.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: January 7, 2014
    Assignee: Panasonic Corporation
    Inventor: Yoshinobu Yamagami
  • Patent number: 8004343
    Abstract: A driver circuit includes first and second switching elements connected in series to two ends of an electric voltage source. A driven load having a capacity is connected to a connection line connecting the first and second switching elements to each other. An inverter inverts a control signal into an inverted control signal applied to the second switching element. When the first switching element is turned on by the control signal and the second switching element is turned off by the inverted control signal, a drive voltage is applied from one of the two ends of the electric voltage source to the driven load. When the first switching element is turned off by the control signal and the second switching element is turned on by the inverted control signal, an electric charge of the driven load is discharged to another of the two ends of the electric voltage source.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: August 23, 2011
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Isao Kobayashi
  • Patent number: 5896171
    Abstract: A video signal processing apparatus of the invention has an image pickup unit for picking up an image of an object and generating a video signal corresponding to the picked-up object image, a signal processing unit for executing various kinds of signal processes to the video signal which is generated from the image pickup unit, and a cable for electrically connecting the image pickup unit and the signal processing unit. In order to transmit and receive a data signal between the image pickup unit and the signal processing unit through the cable, for a predetermined period of time of the video signal which is transmitted from the image pickup unit to the signal processing unit through the cable, a plurality of kinds of video signals of different DC potentials are switched and outputted in accordance with the data signal, thereby multiplexing the data signal to the video signal.
    Type: Grant
    Filed: February 3, 1997
    Date of Patent: April 20, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yasuo Suzuki
  • Patent number: 5684681
    Abstract: Described is a drive circuit of a switching element for controlling a switching element.
    Type: Grant
    Filed: February 14, 1996
    Date of Patent: November 4, 1997
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Dong-Young Huh
  • Patent number: 5663673
    Abstract: An output circuit, for minimizing output idle current fluctuations and improve the output voltage range, has first and second transistors connected to first and second power sources, with a plurality of diodes connected to control terminals of the first and second transistors. The output circuit further includes a third transistor having a first terminal connected to the second power source and a second terminal connected to a predetermined position among the plurality of diodes. A predetermined voltage is applied from the diodes to the control terminal of the first transistor when the third transistor is saturated, to bring a level of an output of said output circuit close to a level of the second power source. A fourth transistor, a fifth transistor, a first resistor, and a capacitor are also provided.
    Type: Grant
    Filed: March 30, 1995
    Date of Patent: September 2, 1997
    Assignee: Fujitsu Limited
    Inventors: Hirokazu Tanaka, Tatsuo Kumano, Tetsuji Funaki, Takahiro Watai
  • Patent number: 5436487
    Abstract: In an output circuit having first and second MOS transistors in series between a first power supply line and a second power supply line, and a third MOS transistor, the gates of the first and second transistors are connected to first and second input nodes, respectively, and an output node is provided between the first and second MOS transistors. The third MOS transistor is connected between one of the input nodes and the output node. The gate of the third MOS transistor is connected to a third power supply line.
    Type: Grant
    Filed: May 25, 1994
    Date of Patent: July 25, 1995
    Assignee: NEC Corporation
    Inventor: Kaoru Narita