Opposite Conductively (i.e., Complementary) Patents (Class 327/484)
  • Patent number: 11043376
    Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: June 22, 2021
    Assignees: Taiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
    Inventors: Sheng-Ting Fan, Pin-Shiang Chen, Chee Wee Liu, Chi-Wen Liu
  • Patent number: 10636651
    Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: April 28, 2020
    Assignees: Taiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
    Inventors: Sheng-Ting Fan, Pin-Shiang Chen, Chee Wee Liu, Chi-Wen Liu
  • Patent number: 10320178
    Abstract: A power-source protection circuit includes a power source including a first voltage rail and a second voltage rail, a pass switch connected across the first voltage rail and a third voltage rail, a control switch connected to the second voltage rail and a control terminal of the pass switch, such that the pass switch turns on in response to the control switch turning on and the pass switch turns off in response to the control switch turning off, and output terminals connected to the third voltage rail and the second voltage rail. The control switch is arranged to switch on when the power source is started and the control switch is arranged to switch off when the output terminals are short-circuited and to switch on when the short-circuit is removed.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: June 11, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Rohit Sidapara
  • Patent number: 10109477
    Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: October 23, 2018
    Assignees: Taiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
    Inventors: Sheng-Ting Fan, Pin-Shiang Chen, Chee Wee Liu, Chi-Wen Liu
  • Patent number: 10074968
    Abstract: A power-source protection circuit includes a power source including a first voltage rail and a second voltage rail, a pass switch connected across the first voltage rail and a third voltage rail, a control switch connected to the second voltage rail and a control terminal of the pass switch, such that the pass switch turns on in response to the control switch turning on and the pass switch turns off in response to the control switch turning off, and output terminals connected to the third voltage rail and the second voltage rail. The control switch is arranged to switch on when the power source is started and the control switch is arranged to switch off when the output terminals are short-circuited and to switch on when the short-circuit is removed.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: September 11, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Rohit Sidapara
  • Patent number: 9529038
    Abstract: An electronic control circuit for an electronically commutated motor (ECM) is disclosed. A plurality of power transistors controls the ECM, and a reference transistor is formed together with the power transistors on a common support. A control unit is configured to, in a test mode: apply a test current to the reference transistor and one of the power transistors respectively; measure a saturation voltage of the reference transistor and one of the power transistors; evaluate a saturation voltage difference between the measured saturation voltages of the reference transistor and the respective power transistor; evaluate a rate of change of saturation voltage differences between a first iteration of the test mode and a second iteration of the test mode; and determine an expected remaining service life of the power transistors based on the temperature of the support during the test mode and the rate of change of the saturation voltage differences.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: December 27, 2016
    Assignee: ebm-papst Mulfingen GmbH & Co. KG
    Inventors: Helmut Lipp, Günter Haas, Martin Bürkert
  • Patent number: 9467061
    Abstract: In accordance with an embodiment, a circuit for driving a control terminal of a switching transistor includes a driver having an output configured to be coupled to the control terminal of the switching transistor, a first power supply terminal configured to be coupled to a first terminal of a floating power supply, a second power supply terminal configured to be coupled to a second terminal of the floating power supply, and a switching input terminal configured to receive a switching signal. The circuit further includes a bias circuit having an output terminal configured to be coupled to a common-mode control terminal of the floating power supply, wherein the bias circuit is configured to provide a time dependent voltage.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: October 11, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Bernhard Zojer, Matteo Kutschak
  • Patent number: 9000832
    Abstract: A switch includes a first switching member and a latch circuit. A first terminal of the first switching member is electrically connected to a power source, while a second terminal thereof is electrically connected to a loading. The latch circuit includes a first transistor and a second transistor which are mutually electrically connected. The first transistor is electrically connected to the first terminal, and the second transistor is electrically connected to the control terminal. By inputting a trigger voltage to the second transistor, the second transistor and the first switching member are conducted, which makes the first transistor become conductive. After the first transistor becoming conductive, the first transistor provides electricity to the second transistor to cause latching effect, and to consequently keep the first switching member conductive.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: April 7, 2015
    Assignees: Hep Tech Co., Ltd.
    Inventor: Ming-Feng Lin
  • Patent number: 8415988
    Abstract: A circuit that produces a clocking signal for a low to medium capacitance input of a device includes a drive gate connected to a common-base bi-polar driver circuit. The output of the drive gate is connected to an emitter of an NPN bi-polar transistor through one coupling capacitor and to an emitter of a PNP bi-polar transistor through another coupling capacitor. The transistors are connected in a common-base configuration with the collectors of the transistors connected together. One voltage is connected to the base of the PNP transistor. Another voltage is connected to the base of the NPN transistor. A diode is connected in parallel with the base-emitter of the PNP transistor. Another diode is connected in parallel with the base-emitter of the NPN transistor. A damping resistor is connected between the collectors of the transistors and the low to medium capacitance clock input of the device.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: April 9, 2013
    Assignee: Truesense Imaging, Inc.
    Inventor: Gregory O. Moberg
  • Publication number: 20110241624
    Abstract: An electricity charging module using a hysteresis switch includes a storage capacitor that preliminarily stores electrical energy supplied from an external power source, a charging unit for preventing over-charging or over-discharging through monitoring of the charging state of the rechargeable battery, and a hysteresis switch that has a larger turn-on voltage level than the turn-off voltage level, and located between the storage capacitor and the charging unit, thereby electrically connecting or disconnecting the storage capacitor with the charging unit.
    Type: Application
    Filed: April 13, 2010
    Publication date: October 6, 2011
    Applicant: Kookmin University Industry Academy Cooperation Foundation
    Inventors: Jun-seok PARK, Ha-Ryoung OH, Yeong-Rak SEONG, Hyoung-Hwan ROH, Do-won KIM
  • Patent number: 6992521
    Abstract: A switch in bipolar technology including a first main transistor of a first type connecting an input terminal, intended to be connected to a first terminal of application of a D.C. supply voltage, to an output terminal intended to be connected to a load to be supplied; a second bipolar transistor of the same type as the first one, connected between the input terminal and an input of a current mirror circuit having a copying output connected to the base of the first transistor, the bases of the first and second transistors being interconnected and the first transistor having an emitter surface area greater than the second one; and a circuit for biasing the second transistor including the copying of the output voltage of the switch on the collector of this second transistor.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: January 31, 2006
    Assignee: STMicroelectronics S.A.
    Inventor: Joël Concord
  • Patent number: 6992524
    Abstract: A bias control circuit for controlling a bias circuit coupled to an amplifier transistor. The bias control circuit receives a control voltage, and actively adjusts an equivalent resistance of the bias control circuit responsive to the control voltage, wherein the equivalent resistance is established between a first node and a reference voltage. In one embodiment, when the control voltage is increased, the equivalent resistance is gradually decreased and a current drawn by the bias control circuit is gradually increased, resulting in a quiescent current of the amplifier transistor being gradually increased.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: January 31, 2006
    Assignee: Skyworks Solutions, Inc.
    Inventors: Youngoo Yang, Kevin Choi, Bong-Seok Park
  • Patent number: 6924694
    Abstract: A switch circuit formed on a semiconductor substrate, comprising: a first terminal to which a signal of transmission object is inputted; a second terminal from which a signal of transmission object is outputted; a first transistor formed in a first semiconductor region in said semiconductor substrate, which has one of a source and a drain terminals connected to said first terminal and another thereof connected to said second terminal; a control circuit which controls a gate voltage of said first transistor; and a first rectifying element which has an anode terminal connected to said first terminal, a cathode terminal connected to a power supply terminal of said control circuit, said first rectifying element being formed in a second semiconductor region in said semiconductor substrate separate from said first semiconductor region.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: August 2, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masanori Kinugasa, Akira Takiba
  • Patent number: 6898745
    Abstract: An integrated device having a pad receiving, in a standard operative condition, an input signal having a first value and, in a test operative condition, a test voltage having a second value higher than the first value; an input stage connected to the pad and including an electronic component having a first terminal connected to the pad; a third-level detecting stage connected to the pad and supplying a logic third-level signal having a first level in presence of the input signal and a second level in presence of the test voltage; and a selector connected to a second terminal of the electronic component and structured to connect the second terminal to a reference potential in the presence of the first logic level of the third-level signal and to a biasing voltage higher than the reference potential and lower than the second value in the presence of the second logic level of the third-level signal.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: May 24, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Zanardi, Maurizio Branchetti, Jacopo Mulatti, Massimiliano Picca
  • Patent number: 6642772
    Abstract: Current mirror circuits that are parts of a first circuit and a second circuit, respectively, allow the same constant current to flow through the input side and the output side. Therefore, the base-emitter voltages of transistors Tr1 and Tr4, which tend to vary due to a temperature variation, can be set identical and hence can cancel out each other sufficiently. The same is true of the base-emitter voltages of transistors Tr5 and Tr8. Therefore, an input signal can be converted by a function having reference voltages as change points without being affected by temperature. Desired function circuits can be obtained by combining first circuits and second circuits in various manners.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: November 4, 2003
    Assignee: Alps Electric Co., Ltd.
    Inventors: Daisuke Takai, Kazuo Hasegawa
  • Patent number: 6529063
    Abstract: A thermally stabilized cascode heterojunction bipolar transistor (TSC-HB) having the current and power generation regions in separate temperature zones, each transistor collector in a cold zone connected directly and individually to an emitter terminal of a corresponding transistor in a hot zone, thereby limiting the current available to the emitter of the transistor in the hot zone. Such an interconnection of transistors prevents the transistor in the hot zone from drawing more current from other transistor sources when increases in temperature occur. This achieves thermal stability and prevents the transistors from overheating and burning out.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: March 4, 2003
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Burhan Bayraktaroglu, Mike L. Salib
  • Patent number: 6307419
    Abstract: A high frequency bipolar switching transistor circuit. A first bipolar transistor is provided, having an emitter adapted to receive a voltage, having a base adapted to receive a drive current, and having a collector. A second bipolar transistor is provided, having a base connected to the collector of the first bipolar transistor, having a collector connected to the base of the first bipolar transistor, and having an emitter. An inductor having a first port connected to the common connection node of the collector of the first bipolar transistor and the base of the second transistor, and having a second port connected to the emitter of the second transistor. The common connection node of the emitter of the second transistor and the second port of the inductor form the output of the circuit.
    Type: Grant
    Filed: January 5, 2001
    Date of Patent: October 23, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Mark C. Fischer
  • Patent number: 6225839
    Abstract: To provide a buffer circuit that is able to achieve a reduction of the input current and a high input impedance by compensating the base current of a transistor, and to avoid a lowering of the input dynamic range by means of a current compensation circuit. By means of transistor P2, the base voltage of transistor Q2 is established in response to the signal of input node ND1 of the differential circuit, and the emitter voltage of transistor Q2 is set at virtually the same level as the reference voltage Vref. The collector current IC2 of transistor P2 is the same as the base current of transistor Q2, and is established with the amplification ratio of transistor Q2 as well as the current I2 of current source IS2.
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: May 1, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Shigeki Ohtsuka
  • Patent number: 6204652
    Abstract: A motor vehicle electrical system has at least one apparatus for regulating the power supply voltage of an electrical load which has a nominal or rated supply voltage. The regulating apparatus is supplied by a variable value unidirectional voltage source. The apparatus includes an oscillator for generating a rectangular control signal having a cyclic ratio which varies with the value of the unidirectional voltage when the latter is above a given threshold value. The apparatus also includes an interrupter controlled by the control signal and connected in series with the load across the voltage source. Each voltage regulating apparatus further includes an inductance connected in series with the load, and a component with unidirectional conduction in parallel with the series connected load and inductance.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: March 20, 2001
    Assignee: Valeo Vision
    Inventors: Pierre Albou, Jean Paul Charret, Joel Leleve
  • Patent number: 6154069
    Abstract: A circuit for driving a capacitive load using a booster having a low power consumption, which amplifies spike-like signals at high speeds and produces a large voltage and a large current, and wherein two transistors 104 and 111 are connected in series across a first power source H1 and a second power source L1 having a potential lower than that of the first power source. An output terminal OUT is provided at a portion where the two transistors are connected together, and the first transistor 104 connected between the first power source and the output terminal has a complementary relationship to the second transistor 11 connected between the output terminal and the second power source.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: November 28, 2000
    Assignee: Citizen Watch Co., Ltd.
    Inventor: Heihachiro Ebihara
  • Patent number: 5869995
    Abstract: A high impedance node of a transimpedance stage drives the input of a unity-gain forward buffer. A unity-gain integrated back-buffer is enabled to drive the high-impedance node from the output of the forward buffer when the forward buffer is disabled. A voltage from the forward buffer limits the reverse-biasing of all transistors in the back-buffer when the back buffer is disabled, and a voltage from the back-buffer limits the reverse-biasing of all transistors in the forward buffer when the forward buffer is disabled. The output-driver transistors of the forward buffer are bootstrapped to the output voltage through resistors which, when the forward buffer is enabled, bias pre-driver transistor coupled to the output-driver transistors. Neither the forward buffer nor the back-buffer consume a significant amount of power when not enabled.
    Type: Grant
    Filed: November 13, 1996
    Date of Patent: February 9, 1999
    Assignee: Analog Devices, Inc.
    Inventor: Kimo Y. F. Tam
  • Patent number: 5834964
    Abstract: A control circuit for providing fast turn on of a PNP transistor in which a capacitor charging current is boosted and provided to the base of the PNP transistor. An embodiment of the invention provides a current amplifier in parallel with a current source for coupling to the base of the PNP transistor. The PNP transistor is connected to a positive voltage supply. A capacitor is also coupled to the positive voltage supply for delivering a charging current amplifier. In a further embodiment, an NPN transistor has its base coupled to the capacitor and its collector coupled to the base of the PNP transistor for providing the drive current boost. A diode may be coupled to the capacitor for passing a discharge current to the capacitor when the PNP transistor is off and to block the capacitor current when the PNP transistor is being switched on. A PNP drive transistor may be coupled between the collector of the NPN transistor and the base of the PNP transistor.
    Type: Grant
    Filed: June 2, 1997
    Date of Patent: November 10, 1998
    Assignee: Cherry Semiconductor Corporation
    Inventor: William J. Scheraga
  • Patent number: 5751171
    Abstract: A write driver drives a current through a two-terminal inductive load. A switching circuit drives current through the inductive load, and connects to the inductive load and to at least one control node. A driver circuit charges and discharges the control node in response to an input signal. The driver circuit has at least one charging path to charge the control node and at least two active discharging paths to discharge the control node.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: May 12, 1998
    Assignee: VTC Inc.
    Inventor: Tuan V. Ngo
  • Patent number: 5640110
    Abstract: A current supply circuit includes a current source producing a first current, a current amplifying circuit for producing a second current having a magnitude a.multidot.I/h.sub.FE from the first current where a is a constant, I is a magnitude of the first current and h.sub.FE is a current transfer ratio of a current supply circuit. The above current supply circuit produces a third current from the second current so that the third current has a magnitude equal to a.multidot.I.
    Type: Grant
    Filed: October 5, 1995
    Date of Patent: June 17, 1997
    Inventors: Kimitoshi Niratsuka, Yosiaki Sano
  • Patent number: 5616971
    Abstract: A power switching circuit includes a power switching NPN transistor (1) having its collector electrode coupled to a reference potential terminal (17) and its emitter electrode coupled to an output terminal (7). A driver circuit (5) is provided having an input coupled to a supply terminal (6) and a driving current output coupled to the base electrode of the power transistor (1). A PNP transistor(4) has its emitter electrode coupled to the output terminal(7), its base electrode coupled to a reference voltage terminal (9) for receiving, in operation, a voltage which is positive relative to the reference potential and its collector electrode coupled to the base electrode of an NPN transistor (2). The NPN transistor (2) has its collector electrode coupled to the collector electrode of the power transistor (1) and its emitter electrode coupled to the base electrode of the power transistor (1).
    Type: Grant
    Filed: October 6, 1995
    Date of Patent: April 1, 1997
    Assignee: Motorola, Inc.
    Inventor: Petr Kadanka
  • Patent number: 5585749
    Abstract: A high current driver (100) for driving a high current load (110) in an electronic device powered by a battery (112) comprises a voltage reference (104) for generating a reference voltage, and a drive current controller (102, 302) responsive to a drive control signal for selectively switching the drive current controller (102, 302) from an active state for supplying current to the high current load (110), to an-inactive state for inhibiting the supply of current to the high current load (110). The drive current controller (102, 302) further controls the amount of current supplied to the high current load (110) when the battery (112) terminal voltage is substantially equal to the reference voltage. A load control element (108) is coupled to the drive current controller (102, 302) and drives the high current load (110) when the drive current controller (102, 302) is in the active state.
    Type: Grant
    Filed: December 27, 1994
    Date of Patent: December 17, 1996
    Assignee: Motorola, Inc.
    Inventors: Gary L. Pace, David H. Overton
  • Patent number: 5578950
    Abstract: A low voltage indicator circuit including a self-biased driver circuit. A voltage at the output terminal is used to create a bias voltage to operate the driver when less than a threshold voltage is present on at least one voltage supply line. A transistor for supplying base drive current to the driver has a base coupled to the at least one voltage supply line in one embodiment and to the bias circuit in other embodiments. The transistor in the one embodiment provides base drive current to the driver when voltage on the at least one voltage supply line is less than the voltage on the output terminal by at least a predetermined amount. In other embodiments, the bias circuit may include a FET or resistor coupled between the output terminal and the base of a bias circuit transistor. The bias circuit transistor has a terminal connected to a bias resistor for providing current through the bias resistor when the bias circuit transistor is turned on.
    Type: Grant
    Filed: July 8, 1994
    Date of Patent: November 26, 1996
    Assignee: Cherry Semiconductor Corporation
    Inventors: Frank J. Kolanko, Jay D. Moser, Sr.
  • Patent number: 5563547
    Abstract: An electronic circuit for providing a momentary switch closure function output in response to operation of a control-request switch input to a closed condition and maintenance of the control-request switch input in closed condition for an amount of time greater than the time of the momentary switch closure function output. One use of the invention is as a single switch PTO enabler in conjunction with an electronically controlled internal combustion engine to provide a required momentary switch closure input to the engine electronic control for enabling the engine speed to change to a demanded speed.
    Type: Grant
    Filed: February 21, 1995
    Date of Patent: October 8, 1996
    Assignee: Navistar International Transportation
    Inventors: Ronald L. Blanchard, Brian P. Marshall, Eric T. Swenson, Riley A. Thomas, III
  • Patent number: 5552741
    Abstract: A high input impedance common-emitter amplifier stage is disclosed. This amplifier stage utilizes a transistor to buffer the base drive from the input stage of a Darlington circuit. This buffer action increases the input impedance of the common-emitter stage by a factor of beta (.beta.) of the buffering transistor. Various embodiments are disclosed.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: September 3, 1996
    Assignee: Maxim Integrated Products
    Inventor: Madhav V. Kolluri
  • Patent number: 5546045
    Abstract: An integrated circuit output stage is intended for use with an operational amplifier. The output is capable of driving capacitive load to within a V.sub.SAT of the power supply rails. The complementary output transistors are driven by way of a combination of buffers and complementary differential amplifiers which act to bias the stage in class AB. The quiescent current is stabilized and controlled, in part, by simple resistor rationing. The output transistor saturation is sensed and a current limit is imposed so that hard saturation is avoided. Frequency compensation is achieved in a manner that responds to output transistor saturation so as to improve the high frequency transient response. Feedforward capacitors are also included to further improve high frequency response.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: August 13, 1996
    Assignee: National Semiconductor Corp.
    Inventor: Don R. Sauer
  • Patent number: 5546043
    Abstract: In order to drive an MOS field-effect transistor as a voltage interrupter in a DC/DC converter operating on the chopper principle, a suitable circuit arrangement has an input transistor (T1) for current control on the input side with a low voltage change, a downstream phase reversing transistor (T2) and a complementary stage formed from a first and a second further transistor (T3, T4) whose collectors are interconnected. An auxiliary voltage is applied which is raised to the input voltage to be regulated. The complementary stage switches without any overlap by means of different current switching thresholds for the first further transistor (T3) and the phase reversing transistor (T2) which drives the second further transistor (T4). In addition, it switches with a switch-on delay, so that the switched-on duration of an upstream switched-mode regulator chip can be increased to 100%. The internal current consumption of the circuit arrangement is in this case low.
    Type: Grant
    Filed: November 7, 1994
    Date of Patent: August 13, 1996
    Assignee: Siemens Nixdorf Informationssysteme Aktiengesellschaft
    Inventor: Werner Pollmeier
  • Patent number: 5539352
    Abstract: A voltage input circuit for providing an output in response to an input signal. According to a preferred embodiment of the invention, an output having a first state and a second state is generated. The output is switched from the first state to the second state when a capacitor is charged for a first predetermined time period by the input signal having a magnitude greater than a first predetermined threshold magnitude. The capacitor is disabled to prevent the output from switching from the first state to the second state if the input signal falls below the first predetermined threshold magnitude during the first time period. The output is switched from the second state to the first state when the input signal has a magnitude less than a second predetermined threshold magnitude for a second predetermined time period.
    Type: Grant
    Filed: December 28, 1994
    Date of Patent: July 23, 1996
    Assignee: General Electric Company
    Inventor: Robert P. DuPuy
  • Patent number: 5459425
    Abstract: A signal processing circuit for limiting a signal voltage generated, for example, across a signal source coil 1 within a range between a predetermined upper limit and a predetermined lower limit, includes: a second transistor pair 5a and 5b and a second transistor pair 5c and 5d coupled across the signal source coil 1. The base voltages of the transistors 5b and 5d are maintained at respective predetermined voltages by means of the serial circuit consisting of the resistor 5q, transistor 5e and the constant voltage source 5g and the serial circuit consisting of the constant voltage source 5h, transistor 5f and the resistor 5r, respectively, which are coupled across the voltage source 100. Thus, the second transistor pair 5a and 5b are turned on when the voltage at the signal input terminal 8 exceeds the upper limit. The second transistor pair 5c and 5 d are turned on when the voltage at the signal input terminal 8 falls below the lower limit.
    Type: Grant
    Filed: December 23, 1993
    Date of Patent: October 17, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yukio Yasuda
  • Patent number: 5455533
    Abstract: An impedance converter includes an emitter follower constructed of a first transistor with a first resistor connected between an emitter electrode of the first transistor and an output terminal. Input to the emitter follower is provided by a second transistor of complementary type, with input signal applied to the base of the second transistor and the emitter electrode of the second transistor coupled to the base of the first transistor with a second resistor. Bias current in the second transistor and second resistor is in constant proportion to bias current in the first transistor and first resistor. Output impedance can be made positive, negative or zero by appropriate proportioning of the first and second resistors.
    Type: Grant
    Filed: October 7, 1993
    Date of Patent: October 3, 1995
    Assignee: Telefunken Fernseh und Rundfunk GmbH
    Inventor: Hartmut Kollner
  • Patent number: 5438693
    Abstract: A mixer of the commutating type using FETs to switch between the primary of a transformer for an r.f. input and the secondary of a transformer 2 for an i.f. output. The mixer has high linearity and low power consumption of the local oscillator drive because the gate electrodes of the FETs are switched using pulse waveforms from driving transistors.
    Type: Grant
    Filed: November 8, 1994
    Date of Patent: August 1, 1995
    Assignee: GEC-Marconi Limited
    Inventor: Ian F. Cox
  • Patent number: 5430400
    Abstract: Driver circuits are provided which also serve as termination and clamp in an IC tester. When it is to drive a port of a device under test (DUT) between two predetermined voltage levels, the driver's I/O terminal is switched between two predetermined voltage levels with an output impedance that matches the transmission line between the driver circuit and the DUT. When the DUT's port is supplying an output signal, the driver circuit can be programmed to provide one of two types of termination. If the DUT's port is specified as capable of driving the load, the transmission line between the driver circuit and the DUT is terminated by switching the driver circuit's I/O terminal to a predetermined voltage level with an impedance of Z.sub.0. If the DUT's port is not specified as being capable of driving such a termination load, the driver circuit functions like a Z-clamp circuit.
    Type: Grant
    Filed: August 3, 1993
    Date of Patent: July 4, 1995
    Assignee: Schlumberger Technologies Inc.
    Inventors: Richard F. Herlein, Sergio A. Sanielevici, Burnell G. West, David K. Cheung
  • Patent number: 5424665
    Abstract: A driving circuit is provided for a power transistor connected to an inductive load. A detection resistor is placed between ground and the emitter of the power transistor. The driving circuit has a first portion which is capable of generating a first current which is a non-linear function of the voltage across the detection resistance. A second portion of the driving circuit is used to generate a base current for the power transistor that is proportional to the first current. The non-linear function of the first current compensates for the non-linear gain with respect to collector current of the power transistor.
    Type: Grant
    Filed: May 21, 1992
    Date of Patent: June 13, 1995
    Assignee: Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno
    Inventors: Stefano Sueri, Sergio Palara
  • Patent number: 5418834
    Abstract: This invention describes a maintenance termination unit often used in telephone lines and particularly the triggering circuit for use in such units. The triggering circuit uses two complementary transistors Q1, Q2 and a diode Z1 along with a resistor R and capacitor C2 in specific electrical connection sequence to provide for "turn-on" by either reaching the preset "turn on" voltage or by having a significantly high rate of voltage rise.
    Type: Grant
    Filed: September 10, 1993
    Date of Patent: May 23, 1995
    Inventors: Stephen W. Byatt, Michael J. Maytum
  • Patent number: 5365240
    Abstract: An improved driving circuit for a large-current radiator avoids the need to dissipate large powers in the driving circuit by drawing a certain energy value from a power supply to a storage capacitor and then feeding this energy to the radiating antenna. A constant current source provides, when a switching circuit coupled to the radiator is opened, a current to counter the tendency of the radiator otherwise to maintain continuity of current through the switching circuit, keeping to a minimum the voltage across the switching circuit so that essentially no energy will need to be dissipated in the driving circuit. By choosing the stored energy value carefully one can make it just large enough to cover the radiated energy but leave essentially no energy to be dissipated in the radiator driving circuit.
    Type: Grant
    Filed: November 4, 1992
    Date of Patent: November 15, 1994
    Assignee: Geophysical Survey Systems, Inc.
    Inventor: Henning F. Harmuth