Abstract: A current detection circuit detects photoelectric current that flows through a phototransistor, and outputs a current, which is proportional to the photoelectric current, via an output terminal. An input-side transistor is a PNP bipolar transistor, and is provided on a current path for the phototransistor. Output-side transistors are PNP bipolar transistors. The base terminals thereof are connected to that of the input-side transistor so as to form a common base terminal, and the emitter terminals thereof are connected to that of the input-side transistor so as to form a common emitter terminal, thereby forming a current mirror circuit. Each of first switches is provided between the collector of the corresponding output-side transistor and an output terminal. Each of second switches is provided between the collector of the corresponding output-side transistor and the ground terminal. A control unit controls the ON/OFF operations of the first switches and the second switches.

Abstract: A regulated mirror current source circuit has an output transistor, a regulator for controlling the output circuit, and a current mirror having two or more current paths. The first path of the mirror is coupled in series with a current path of the output circuit, and the second path is coupled to the regulator, to provide feedback. The feedback can provide better precision, or reduced component area. The circuit can include cascode transistors, and the regulator can have integral control. The output transistor gate-source voltage is overdriven to reduce “on” resistance of the output transistor. When the output transistor is a high voltage transistor, its area can be reduced without sacrificing compliance.

Abstract: A start signal output circuit having an RF/DC conversion circuit to which radio frequency power (RF) of specified frequency is inputted and from which a direct current potential (DC) is outputted, comprises a detection/amplification circuit 210 which includes a voltage doubler wave-detector circuit 10 configured including a sensing diode Q1 (Tr34) for sensing the RF power, a differential amplifier including differential pair transistors Tr31 and Tr32, and a current mirror circuit. A base current of one Tr31 of the differential pair transistors is brought into substantial agreement with a DC component of a current flowing through the sensing diode Q1 (Tr34). A total of currents flowing through the differential pair transistors Tr31 and Tr32 is regulated to a substantially constant value by the current mirror circuit. Thus, the start signal output circuit which is small in size, high in sensitivity and low in power consumption can be realized.

Abstract: A bandgap voltage reference is described which has reduced sensitivity to noise and amplifier offset. By configuring the circuitry such that the base width of the component transistors is not varied on application of a bias, it is possible to obviate the Early effect.

Abstract: A switch in bipolar technology including a first main transistor of a first type connecting an input terminal, intended to be connected to a first terminal of application of a D.C. supply voltage, to an output terminal intended to be connected to a load to be supplied; a second bipolar transistor of the same type as the first one, connected between the input terminal and an input of a current mirror circuit having a copying output connected to the base of the first transistor, the bases of the first and second transistors being interconnected and the first transistor having an emitter surface area greater than the second one; and a circuit for biasing the second transistor including the copying of the output voltage of the switch on the collector of this second transistor.

Abstract: Current mirror circuits that are parts of a first circuit and a second circuit, respectively, allow the same constant current to flow through the input side and the output side. Therefore, the base-emitter voltages of transistors Tr1 and Tr4, which tend to vary due to a temperature variation, can be set identical and hence can cancel out each other sufficiently. The same is true of the base-emitter voltages of transistors Tr5 and Tr8. Therefore, an input signal can be converted by a function having reference voltages as change points without being affected by temperature. Desired function circuits can be obtained by combining first circuits and second circuits in various manners.

Abstract: Current mirror circuit including a current input terminal (2), a current output terminal (6), a common terminal (8), a first transistor (T1) arranged between the current input terminal (2) and the common terminal (8), a second transistor (T2) arranged between the current output terminal (6) and the common terminal (8), a transconductance stage (TS) having an input terminal coupled to the current input terminal (2), and an output terminal coupled to the common terminal (8), and a bias source (22) for biasing the control electrodes of the first and second transistors (T1, T2). This configuration provides a large bandwidth independently of the input current, accurate current transfer and a single pole system.

Abstract: A rectifier circuit is described, which comprises an arrangement of a first, a second and a third transistor, emitters of said transistors being coupled together at a first junction point and to a terminal of a first constant current source and in which arrangement collectors of the first and the second transistor are coupled together at a second junction point, a current mirror arrangement having a predetermined mirror ratio, an input of said current mirror being coupled to the second junction point and an output of said current mirror being coupled to a collector of the third transistor at a third junction point, wherein an input voltage, by which the collector-emitter currents of the first and/or the second transistor are controllable, can be supplied to the rectifier circuit bia bases of the first and/or the second transistor, while an output voltage can be taken from the base of the third transistor of the rectifier circuit and the output voltage at least substantially corresponds to the rectified input

Abstract: A current amplifier driver capable of driving both 10 Base-T signalling and 100 Base signalling in a Local Area Network (LAN) includes one constant current source. A voltage controlled switch is contained in each of four vertical segment of an H-bridge circuit. Two voltage signals are applied to the switches to control the direction of current from a constant current source across a load. When one of the voltage signals is high, the other is low and two switches of the four switches turn on. The current amplifier driver sinks the constant current in a first direction, such that a voltage drop across the output nodes is positive. When the other voltage signal is high the switches that were on turn off, and the other two switches turn on to sink the constant current across the load in the opposite direction, such that a voltage drop across the output nodes is negative. When both voltage signals are low, all four switches turn off, and the output voltage is zero.

Abstract: A comparator circuit includes a differential amplifier circuit (5, 6, and 7) which receives a first input voltage and a second input voltage, and outputs a comparison result signal by comparing the first and second input voltages, a current circuit (8) which supplies a driving current to activate the differential amplifier circuit, and a current control circuit (2) which is connected to the differential amplifier circuit and the current circuit. The current control circuit is deactivated when the first input voltage is lower than the second input voltage, and is activated when the first input voltage is higher than the second input voltage to reduce the driving current supplied.

Abstract: A cascode circuit includes a source-grounded input NMOS transistor having a gate connected to an input terminal and a drain connected through an output NMOS transistor to an output terminal. An amplification circuit is constructed by a gate-grounded third NMOS transistor having a source connected to the drain of the input transistor, a current mirror circuit consisting of PMOS transistors having an input current path connected to a drain of the third transistor, and a current source connected to an output current path of the constant mirror circuit as a load. An output from the amplification circuit is fed back to a gate of the second transistor. With this arrangement, the cascode circuit can maintain a high output impedance until a minimum output signal voltage reaches around 0.5 V, and can also have a minimum working supply voltage of about 2 V, and at the same time, a circuit construction suitable for IC in the CMOS process.

Abstract: A signal receiving and signal processing unit connected to one or several conductors is adapted to transmit information-carrying signals in the form of voltage pulses. A conductor is connected to a transistor belonging to a signal receiving circuit, to have an effect upon a current by using variations in the voltage pulses and the voltage value of a pulse. The current is in the form of pulses passing through the transistor. The current is generated by the voltage pulse variations and a voltage level, and the current is adapted to an information-carrying form in a signal processing circuit. The transistor belonging to the signal receiving circuit is coordinated with at least one other transistor to form a current mirror. The ability of the signal receiving circuit to receive, detect, and process the signals is adjustable through a current generating circuit such that an increasing current value provides detection of a voltage pulse at an increased transfer rate and vice versa.

Abstract: A current mirror includes first through eighteenth transistors. The load paths of the first and second transistors are in series for carrying an input current to a first supply potential. The control terminals of the first through eighth transistors receive the input current. The load paths of the fourth, third, ninth and tenth transistors are in series between the first and a second supply potential. The third and ninth transistors form a tap being connected to the control terminals of the ninth, tenth, eleventh, twelfth and thirteenth transistors. The load paths of the fifth, sixth, eleventh and fourteenth transistors are in series between the first and second supply potentials. The sixth and eleventh transistors form a tap being connected to the control terminals of the fourteenth through sixteenth transistors. The load paths of the seventeenth, seventh, twelfth and fifteenth transistors are in series between the first and second supply potentials.

Abstract: A high current driver (100) for driving a high current load (110) in an electronic device powered by a battery (112) comprises a voltage reference (104) for generating a reference voltage, and a drive current controller (102, 302) responsive to a drive control signal for selectively switching the drive current controller (102, 302) from an active state for supplying current to the high current load (110), to an-inactive state for inhibiting the supply of current to the high current load (110). The drive current controller (102, 302) further controls the amount of current supplied to the high current load (110) when the battery (112) terminal voltage is substantially equal to the reference voltage. A load control element (108) is coupled to the drive current controller (102, 302) and drives the high current load (110) when the drive current controller (102, 302) is in the active state.

Abstract: A signal-receiving and signal-processing unit connected to one or several conductors is configured to transmit information-carrying signals in the form of voltage pulses. The conductor is connected to a transistor in a signal-receiving circuit to affect a current by using variations in the voltage pulses and the voltage value of a pulse. The current is in the form of pulses that pass through the transistor. The current is generated by the voltage pulse variations and voltage level. The current is given a signal-adapted information-carrying form by a signal-processing circuit. The transistor in the signal-receiving circuit is coordinated with at least one other transistor so that together they form a current mirror circuit.

Abstract: A storage charge reduction circuit for reducing the storage charge of a first bipolar transistor. The circuit includes a second field effect transistor connectable between the base of the first bipolar transistor and ground for conducting a compensation current from the base of the first bipolar transistor to ground. A third bipolar transistor is connected in series with a first resistor for conducting a first current from a first voltage supply through the first resistor to ground. Current mirror circuitry sets the gate-source voltage of the second field effect transistor so that the compensation current is proportional to the first current. The first current and the compensation current increase when temperature increases. In a preferred embodiment, the storage charge reduction circuit is used in a transmission line driver. The driver includes an output bipolar transistor connectable between the transmission line and ground for conducting current from the transmission line to ground.

Abstract: A first current mirror circuit for driving a first output stage transistor to flow out current to a coil in a motor is disposed between a power source voltage line and a reference voltage line, and a second current mirror circuit for driving a second output stage transistor to receive a current flowing out from the coil of the motor is disposed between a reference voltage line and a ground line.

Abstract: A CCD gate driver circuit provides an output drive signal in response to an input clock signal. The output drive signal is symmetrical, uses a minimum amount of power at high frequencies, and compensates for cross-coupling between CCD gates. An input circuit receives the input clock signal and converts it to current pulses on the transitions of the input clock signal. The current pulses are applied to a common input of a pair of complementary input transistors to switch conduction of the transistors. The control inputs of the input transistors are coupled to a reference voltage level. The outputs of the input transistors are coupled to respective current mirrors. The outputs of the current mirrors are in turn coupled to respective inputs of a pair of complementary output transistors that have a common output. A pair of voltage rails that define the voltage swing of the output drive signal are coupled to the respective control inputs of the output transistors.

Abstract: The invention is a method and circuit for improving the settability of the output current (i1) of at least one pad driver (D: D1, D2, . . . Dn) to reduce interfering voltage dips on the supply lines. The pulselike current peaks caused by rapid charging/discharging of high load capacitances (c) are particularly avoided. To this end, the respective output transistor (t1, t1') is operated as a current-controlled element in a first range (b1) of the output voltage (OUR) and as a voltage-controlled element in a second range (b2).

Abstract: A driving circuit is provided for a power transistor connected to an inductive load. A detection resistor is placed between ground and the emitter of the power transistor. The driving circuit has a first portion which is capable of generating a first current which is a non-linear function of the voltage across the detection resistance. A second portion of the driving circuit is used to generate a base current for the power transistor that is proportional to the first current. The non-linear function of the first current compensates for the non-linear gain with respect to collector current of the power transistor.