With Compensation For Temperature Fluctuations Patents (Class 327/513)
  • Patent number: 11496170
    Abstract: The present disclosure relates to a method for controlling a device comprising an oscillation circuit, configured to provide a clock signal to a radio frequency circuit, and an antenna, in which the enabling of the passage of the signal from the circuit to the antenna is delayed with respect to an instant from which a power amplifier of the circuit is enabled.
    Type: Grant
    Filed: February 20, 2021
    Date of Patent: November 8, 2022
    Assignees: STMicroelectronics (Alps) SAS, STMicroelectronics S.r.l., STMicroelectronics (Grenoble 2) SAS
    Inventors: Benoit Marchand, Hamilton Emmanuel Querino De Carvalho, Daniele Mangano, Santo Leotta
  • Patent number: 11392156
    Abstract: An electronic circuit is disclosed. The electronic circuit includes a reference voltage generator, which includes a first candidate circuit configured to generate a first candidate reference voltage, a second candidate circuit configured to generate a second candidate reference voltage, and a selector circuit configured to select one of the first and second candidate reference voltages. The reference voltage generator also includes a third circuit configured to generate a power supply voltage based on the selected candidate reference voltage.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: July 19, 2022
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Hassan Osama Elwan, Esmail Babakrpur Nalousi
  • Patent number: 11316515
    Abstract: A RF switching arrangement (400) is described including a bias swap circuit (30). The bias swap circuit switches the bias voltage dependent on the state of the RF switch. This improves the performance of the RF switch without requiring charge pump circuitry.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: April 26, 2022
    Assignee: NXP B.V.
    Inventors: Gian Hoogzaad, Jozef Bergervoet
  • Patent number: 11287331
    Abstract: Described herein are methods and systems for configuring sensors to compensate for a temperature gradient. Multiple sensor sets, each having at least two sensors of a same type with orthogonal axes, are positioned to form at least one opposing sensor pair, in which an axis of one sensor of one sensor set is in an opposite orientation to an axis of one sensor of another sensor set. A combined measurement of each opposing sensor pair may be output which is compensated for an effect of a temperature gradient on sensor measurements of the sensors.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: March 29, 2022
    Inventors: Mahdi Heydari, Karthik Katingari
  • Patent number: 11283117
    Abstract: A temperature controlled enclosure that includes a temperature control device for controlling the temperature within an internal cavity of the temperature controlled enclosure. The temperature controlled enclosure also includes one or more charging ports for receiving and charging a battery pack. A controller within the temperature controlled enclosure controls the temperature within the internal cavity to a predetermined or desired temperature (e.g., 20° C.). When a battery pack is received in the one or more charging ports, the temperature of the battery pack can be determined. If, for example, the temperature of the battery pack is below 0° C., the battery pack is allowed to warm up inside the temperature controlled enclosure before the battery pack is charged.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: March 22, 2022
    Assignee: MILWAUKEE ELECTRIC TOOL CORPORATION
    Inventors: Matthew R. Polakowski, Kyle C. Fassbender
  • Patent number: 11217891
    Abstract: An antenna device includes an antenna unit that receives radio waves of a plurality of first frequency bands and outputs received signals, and a first band pass filter that transmits, out of the received signals that are output, received signals of at least two second frequency bands out of the first frequency bands.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: January 4, 2022
    Assignee: MITSUMI ELECTRIC CO., LTD.
    Inventors: Daiki Monma, Kozo Shimizu, Takahiro Oshima, Kazunari Saito
  • Patent number: 11188138
    Abstract: In an embodiment, a processor includes a plurality of processing engines to execute instructions and a power management unit. The power management unit is to: control an operating frequency and a supply voltage according to a first voltage/frequency curve associated with a first temperature; and in response to a detection of a second temperature in the processor, increase the operating frequency to a second frequency based on a second voltage/frequency curve, wherein, at least one voltage of a first range of voltages, the second voltage/frequency curve specifies a higher frequency than the first voltage/frequency curve. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: November 30, 2021
    Assignee: Intel Corporation
    Inventors: Michael Bitan, Andrey Gabdulin, Efraim Rotem, Eli Efron, Nadav Shulman, David Ben Shimon, Nir Levitin, Esfir Natanzon
  • Patent number: 11175686
    Abstract: A low-temperature drift ultra-low-power linear regulator includes eight PMOS transistors, two resistors, two capacitors and three NMOS transistors. The eight PMOS transistors include PMOS transistor PM1 to PMOS transistor PM8. The two resistors include resistor R1 and resistor R2. The two capacitors include capacitor C1 and capacitor C2. The three NMOS transistors include NMOS transistor NM1, NMOS transistor NM2 and NMOS transistor NM3. From right to left, the linear regulator includes a PTAT voltage core starting circuit, a PTAT voltage core circuit, a negative temperature characteristic generating circuit and a driver stage closed-loop control circuit. PM5-PM8 form a feedback circuit. The feedback circuit clamps the current flowing through PM6 to be proportional to PM2 to obtain a temperature-stable output voltage, and can dynamically adjust the gate voltage of PM5 according to the change of load current to output different currents according to the load demand.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: November 16, 2021
    Assignee: SOUTHEAST UNIVERSITY
    Inventors: Chao Chen, Jun Yang, Xinning Liu
  • Patent number: 11177772
    Abstract: A power control circuit includes: a voltage-current converter and a programmable current amplifier; the voltage-current converter is configured to detect an inputted output power control signal, and to convert the output power control signal to a control current and output same; and the programmable current amplifier is configured to receive the control current and output the amplified control current as a bias current of the power amplifier connected to the power control circuit.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: November 16, 2021
    Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
    Inventors: Qiang Su, Zhenfei Peng, Baiming Xu, Jiangtao Yi
  • Patent number: 11125629
    Abstract: An embodiment for an integrated circuit for temperature detection includes: a closed loop circuit branch including: a first bipolar junction transistor (BJT), a first resistor coupled between a first base of the first BJT and a junction node, and an amplifier having an output coupled to the junction node and a non-inverting input coupled to a collector of the first BJT; and an open loop circuit branch including: a second BJT, a second resistor coupled between a base of the second BJT and the junction node, a third resistor coupled between the base of the second BJT and ground, and a comparator having an inverting input coupled to a collector of the second BJT and an output configured to provide a digital voltage signal that corresponds to a temperature reading.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: September 21, 2021
    Assignee: NXP USA, INC.
    Inventors: Ricardo Pureza Coimbra, Juan Camilo Monsalve
  • Patent number: 11125627
    Abstract: In accordance with an embodiment, a device includes an interface configured for obtaining at least one measurement signal from a temperature sensor. In a first time interval the at least one measurement signal comprises information about a temperature-dependent voltage difference between a first temperature-dependent voltage at a first diode of the temperature sensor and a second temperature-dependent voltage at a second diode of the temperature sensor. In a second time interval the at least one measurement signal comprises information about a measurement value of a temperature-dependent voltage at a temperature-dependent electrical component of the temperature sensor.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: September 21, 2021
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Christian Jenkner, Daniel Neumaier
  • Patent number: 11119606
    Abstract: A processing system comprises sensor circuitry and a baseline correction mechanism. The sensor circuitry comprises a receiver channel having an input configured to acquire a resulting signal from a sensor electrode. A background capacitance is formed between the sensor electrode and a conductive element. The baseline correction mechanism is coupled to the input of the receiver channel. The baseline correction mechanism comprises a resistive element configured to be driven with a compensation signal to at least partially mitigate the background capacitance.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: September 14, 2021
    Assignee: Synaptics Incorporated
    Inventor: Guozhong Shen
  • Patent number: 11086385
    Abstract: Provided is a graphics processing unit and an operation method thereof. The graphics processing unit includes a plurality of cores in which a delay time between an input and an output decreases according to an increase of a temperature, a temperature monitoring and sorting circuit configured to monitor a temperature of each of the plurality of cores, and a controller configured to control a clock frequency and a power supply of the plurality of cores based on a drivable clock frequency of a core having the lowest temperature among temperatures of each of the plurality of monitored cores.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: August 10, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sukho Lee, Jae-Jin Lee, Kyuseung Han
  • Patent number: 11051762
    Abstract: An electronic device is disclosed. The electronic device includes a case and a battery cover forming an appearance of the electronic device and a printed circuit board mounted inside the case and provided with electronic elements. A measurement sensor is mounted on at least a portion of the printed circuit board. One surface of a recess of the printed circuit board, on which the measurement sensor is mounted, is formed at a different height from other portion of the printed circuit board in a thickness direction of the electronic device. The recess, on which the measurement sensor is mounted, is thinner than the other portion and is spaced apart from the other portion, and thus the electronic device can more accurately measure a body temperature of a user.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: July 6, 2021
    Assignee: LG ELECTRONICS INC.
    Inventors: Hongjo Shim, Hyunok Lee, Yoonwoo Lee, Seonghyok Kim, Mihyun Park, Hyunwoo Kim
  • Patent number: 11022499
    Abstract: A temperature detection device which receives a temperature signal from a temperature sensor and outputs an electrical signal corresponding to the temperature signal. A temperature slope which is an amount of change in an output of the electric signal relative to an amount of change in the temperature signal is changed at a predetermined temperature threshold.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: June 1, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Hidetomo Ohashi
  • Patent number: 11009403
    Abstract: A time domain temperature sensor circuit includes a voltage generating circuit configured to generate and equalize a first voltage of a first node and a second voltage of a second node, a current generating circuit comprising a first semiconductor device connected between the first node and a ground, and configured to generate a first current, and a variable resistor circuit and a second semiconductor device connected in series between the second node and the ground, and configured to generate a second current, the variable resistor circuit being configured to vary a temperature gradient of the second current based on resistance variations by the variable resistor circuit, and a current mirror circuit configured to generate a third current by performing current mirroring of the second current and transmit the third current to an output terminal.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: May 18, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Soo Woong Lee
  • Patent number: 10996697
    Abstract: Bias circuit and a bias generator circuit comprising such a bias circuit. The bias circuit (10, 11) comprises a switched capacitor resistor circuitry (C1, C2, M12-M17), and an operational amplifier (M1-M4, M10) with an input differential transistor pair (M1, M2). The bias circuit further comprises additional source follower transistors (M5, M6) associated with the first and second input differential transistors (M1, M2). The bias generator circuit has a PMOS switched capacitor reference circuit (11) and a NMOS switched capacitor reference circuit (10) and a transconductor reference cell (15). The transconductor reference cell (15) is a replica of a basic reference cell used in a further circuit.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: May 4, 2021
    Assignee: Qorvo International Pte. Ltd.
    Inventor: Erdogan Ozgur Ates
  • Patent number: 10972079
    Abstract: A common mode voltage level shifting and locking circuit is provided. The common mode voltage level shifting and locking circuit includes an operational amplifier, a source follower, a first feedback circuit, and a second feedback circuit. The operational amplifier generates a first common mode voltage. The source follower shifts the first common mode voltage to generate a second common mode voltage. The first feedback circuit generates a first control signal according to the second common mode voltage. The operational amplifier adjusts the first common mode voltage according to the first control signal. The second feedback circuit generates a second control signal according to an external reference voltage provided by a next stage circuit. The source follower adjusts the second common mode voltage according to the second control signal such that the next stage circuit reaches a maximum input common mode range.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: April 6, 2021
    Assignee: IC Plus Corp.
    Inventor: Wen-Wei Chen
  • Patent number: 10969816
    Abstract: In certain aspects, a bias generation circuit comprises a bias voltage generator. The bias voltage generator has a main NMOS transistor having a drain and a gate of the main NMOS transistor both coupled to a first terminal, a main resistor having a first main resistor terminal and a second main resistor terminal, wherein the first main resistor terminal couples to a source of the main NMOS transistor; and a main PMOS transistor having a source of the main PMOS transistor coupled to the second main resistor terminal and a drain and a gate of the main PMOS transistor both coupled to a second terminal, wherein the second terminal couples to a main ground. The bias generation circuit further comprises an array of sensors coupled to the first terminal and the second terminal.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: April 6, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Sameer Wadhwa, Yi Wang, Lennart Karl-Axel Mathe
  • Patent number: 10950658
    Abstract: A circuit includes: a first node to receive a first current; a first resistive element receiving a first branch current of the first current; first transistors each including a first terminal connected to the second end of the first resistive element; a second resistive element connected to the first node and receiving a second branch current of the first current; a second node to receive a second current; a second transistor including a first terminal, the first terminal of the second transistor connected to the second node and receiving a first branch current of the second current; a third resistive element connected to the second node and receiving a second branch current of the second current; wherein a temperature coefficient is adjusted by a resistance of the second resistive element and a resistance of the third resistive element and corresponding to the first current.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: March 16, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Hung-Chang Yu
  • Patent number: 10908845
    Abstract: A data structure is stored that includes a slope value corresponding to each die temperature of a set of die temperatures, where the slop value represents a change of a read voltage level as a function of a write-to-read delay time of a memory sub-system. In response to a read command, a current write-to-read delay time and a current die temperature are determined. Using the data structure, a stored slope value corresponding to the current die temperature is identified. An adjusted read voltage level is determined based at least in part on the stored slope value and the current write-to-read delay time. The read command is executed using the adjusted read voltage level.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: February 2, 2021
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Murong Lang, Zhenming Zhou
  • Patent number: 10886427
    Abstract: An optoelectronic device including a support having a rear surface and a front surface opposite each other, a plurality of nucleation conductive strips forming first polarization electrodes, an intermediate insulating layer covering the nucleation conductive strips, a plurality of diodes, each of which having a first, three-dimensional doped region and a second doped region, and a plurality of top conductive strips forming second polarization electrodes and resting on the intermediate insulating layer, each top conductive strip being disposed in such a way as to be in contact with the second doped regions of a set of diodes of which the first doped regions are in contact with different nucleation conductive strips.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: January 5, 2021
    Assignees: ALEDIA, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Florian Dupont, Benoit Amstatt, Vincent Beix, Thomas Lacave, Philippe Gilet, Ewen Henaff, Berangere Hyot, Hubert Bono
  • Patent number: 10800383
    Abstract: The present disclosure provides an optical sensor having constant sensitivity regardless of changes in temperature. The optical sensor may include a light emitting device configured to emit light; a light receiving device configured to receive the light emitted from the light emitting device, and to output current based on an intensity of the light; a temperature sensor coupled with the light emitting device, and having electrical resistance varying with temperature; and a microcontroller including a first channel for supplying first current directly to the light emitting device, a second channel for supplying second current to the light emitting device via the temperature sensor, and a third channel for receiving the current output from the light receiving device.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: October 13, 2020
    Assignees: Hyundai Motor Company, KIA Motors Corporation, Accendo Motion Research Co., Ltd.
    Inventors: Jong Min Park, Nak Kyoung Kong, Seung Hyeok Chang, Ki Hong Lee, Nam Joon Yoo, Yong Pyo Hong
  • Patent number: 10685734
    Abstract: A semiconductor integrated circuit according to an embodiment includes: a first circuit, an analog-to-digital converter, an external input terminal, a selector, and a second circuit. The first circuit is configured to generate a first voltage corresponding to a temperature. The analog-to-digital converter is configured to convert the first voltage into a first digital value. The external input terminal is a terminal to which a second digital value is input from outside. The selector is configured to select either the first digital value or the second digital value. The second circuit is configured to generate a second voltage based on a third digital value being a digital value selected by the selector.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: June 16, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Yoshio Mochizuki
  • Patent number: 10686372
    Abstract: A power supply is disclosed. The power supply includes a switching converter for providing an output voltage comprising a power switch coupled to a driver for driving the power switch with an on-off switching cycle; and a voltage threshold indicator. The voltage threshold indicator includes an input for receiving an output of the converter, and an output coupled to the driver. The voltage threshold indicator is adapted to provide a temperature compensated voltage threshold, and a control signal to control the on-off switching cycle. The control signal is adapted such that when the output voltage exceeds the temperature compensated voltage threshold, a value of the control signal changes.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: June 16, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Guillaume de Cremoux, Andrew Notman, Vladislav Vasilev
  • Patent number: 10591946
    Abstract: A power circuit applied to an electronic device, includes: a control circuit and a power providing circuit, wherein the control circuit is coupled to at least one circuit installed within the electronic device, and is arranged to generate a providing information according to at least one performance indicator of the circuit, wherein the providing information includes an optimal voltage signal setting, and the optimal voltage signal setting is generated according to a performance coefficient corresponding to each performance indicator; the power providing circuit is coupled to the control circuit and the at least one circuit, and is arranged to dynamically provide a voltage signal to the circuit according to the providing information.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: March 17, 2020
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chun-Yu Luo, Shih-Chieh Chen, Liang-Hui Li, Yi-Lin Li
  • Patent number: 10585446
    Abstract: A reference voltage generator circuit (100) is disclosed, comprising a first transistor (101) having a first channel type and a second transistor (102) having a second channel type. A current source (104) is connected to a source terminal of the first transistor (101). A drain terminal of the second transistor (102) is connected to a drain terminal of the first transistor (101). The reference voltage generator circuit (100) further comprises a third transistor (103) having the second channel type, wherein a drain terminal of the third transistor (103) is connected to a source terminal of the second transistor (102). A node between the source terminal of the second transistor (102) and the drain terminal of the third transistor (103) is connected to a gate terminal of the first transistor (101). A connection for a reference voltage (Vrc) is provided between the current source (104) and the source terminal of the first transistor (101).
    Type: Grant
    Filed: February 3, 2018
    Date of Patent: March 10, 2020
    Assignee: NXP B.V.
    Inventors: Ivan Jesus Rebollo Pimentel, Gerhard Martin Landauer
  • Patent number: 10504811
    Abstract: Materials and methods for improving the DC and RF performance of off-state step-stressed high electron mobility transistors (HEMTs) and devices are provided. A semiconductor device can include at least one HEMT and an on-chip heating source. A method of recovering the DC and RF performance of a stressed semiconductor device can include annealing the device with a built-in heating source of the device.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: December 10, 2019
    Assignee: University of Florida Research Foundation, Incorporated
    Inventors: Fan Ren, Stephen J. Pearton
  • Patent number: 10459869
    Abstract: An electronic apparatus is provided. The electronic apparatus includes a first integrated circuit (IC) and a second IC. The direction pin of the first IC outputs a direction control signal to the direction pin of the second IC. The first IC takes a control right when the direction control signal is in a first logic state. The clock pin of the first IC outputs a first clock signal to the clock pin of the second IC when the first IC takes the control right. The second IC takes the control right when the direction control signal is in a second logic state. The clock pin of the second IC outputs a second clock signal to the clock pin of the first IC when the second IC takes the control right.
    Type: Grant
    Filed: December 17, 2017
    Date of Patent: October 29, 2019
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Yu-Chun Lin, Yi-Long Yang, Yaw-Guang Chang
  • Patent number: 10367491
    Abstract: A delay line circuit including: a coarse-tuning arrangement, including delay units, the coarse-tuning arrangement being configured to coarsely-tune an input signal by transferring the input signal through a selected number of the delay units and thereby producing a first output signal; and a fine-tuning arrangement configured to receive the first output signal at a beginning of a signal path which includes at least three serially-connected inverters, finely-tune the first output signal along the signal path, and produce a second output signal at an end of the signal path; the fine-tuning arrangement including: a speed control unit which is selectively-connectable, and a switching circuit to selectively connect the speed control unit to the signal path based on a process-corner signal.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: July 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Chieh Huang, Chan-Hong Chern, Tsung-Ching (Jim) Huang, Chih-Chang Lin, Tien-Chun Yang
  • Patent number: 10367518
    Abstract: An apparatus is provided which comprises: a thermal sensor comprising one or more n-type devices or p-type devices that suffer from subthreshold factor variation, wherein the thermal sensor is to generate an output digital code representing a temperature; and a calibration circuitry coupled to the thermal sensor, wherein the calibration circuitry is to trim the effects of subthreshold factor variation from the output digital code.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: July 30, 2019
    Assignee: Intel Corporation
    Inventors: Cho-Ying Lu, Hyung-Jin Lee
  • Patent number: 10353835
    Abstract: A modular control apparatus, having a head module, and at least one supply module and peripheral module arranged on the head module and having a bus structure. The supply module and the peripheral module have a base module part, an electronic module part and a connection module part. The base module parts are arranged next to one another and provide the bus structure that electrically couples the head module, the supply module and the peripheral module to one another. The supply module additionally comprises an electrical line that runs from the connection module part through the electronic module part to the base module part and connects the supply connection of the supply module to the bus structure. An overload identification unit is arranged at the electrical line and determines a parameter of the electrical line and produces a warning signal if the parameter exceeds a threshold value.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: July 16, 2019
    Assignee: PILZ GMBH & CO. KG
    Inventors: Richard Veil, Bernd Harrer
  • Patent number: 10290625
    Abstract: An insulated gate semiconductor device includes a main insulated gate transistor having a gate electrode controlling a main current, a current-detecting insulated gate transistor, which is disposed in parallel to a main insulated gate transistor, outputting a current on a proportional basis in size between the transistors to the main current flowing through the main insulated gate transistor, a temperature detecting diode formed integrally with these insulated gate transistors in a semiconductor substrate. Interposing an ESD tolerance Zener diode between an emitter electrode of the current-detecting insulated gate transistor and an anode electrode of the temperature detecting diode leads to securing the ESD tolerance for the current-detecting insulated gate transistor by using the temperature detecting diode.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: May 14, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Shigeki Sato
  • Patent number: 10260967
    Abstract: An IGBT temperature sense circuit is provided. The IGBT temperature sense circuit automatically calibrates a temperature sense of a diode to minimize an error based on element characteristics of a temperature sense diode, precisely senses the temperature and removes a limit of a maximum current (to increase the maximum current) of an output of an IGBT. A temperature sense circuit includes an automatic calibrator that is configured to supply current of a current source to a current to a diode and a diode temperature sensor that is configured to measure a voltage of one side terminal of the diode based on the current of the diode based on a change of a temperature and adjustment of an operation of a protection object device.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: April 16, 2019
    Assignee: Hyundai Motor Company
    Inventors: Ji Woong Jang, Ki Jong Lee, Kang Ho Jeong, Ki Young Jang, Sang Cheol Shin
  • Patent number: 10243544
    Abstract: This disclosure provides systems, methods and apparatuses for processing analog signals with a wide dynamic range. In some implementations, the analog signal may be a current signal that is logarithmically scaled to decrease its dynamic range and converted to an output voltage using two or more diodes. A first diode may be used to scale a first range of the current signal and a second diode may be used to scale a second range of the current signal.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: March 26, 2019
    Assignee: WAYMO LLC
    Inventor: Vadim Gutnik
  • Patent number: 10236788
    Abstract: A temperature-compensated rectifying component is configured to receive an input signal and comprises: a diode part, for rectifying the received input signal and providing a rectified output signal thereby, the diode part having an operational temperature; and a temperature compensation controller, configured to control a power dissipated by the diode part over a predetermined period of time, such that an average of the operational temperature over the predetermined period of time meets pre-set criteria. This may be used in a RF detector for generating a DC level from a RF input signal, which may form part of a control circuit for setting an amplitude of an RF potential for supplying to an electronic amplifier in an analytical instrument, such as an ion optical device.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: March 19, 2019
    Assignee: Thermo Fisher Scientific (Bremen) GmbH
    Inventor: Sven Wohlgethan
  • Patent number: 10222816
    Abstract: An electronic circuit for current generation includes a source-follower based current source and a voltage compensation semiconductor device. The source-follower based current source is configured to output a reference current, the current source including a main transistor which is configured to derive the reference current from a reference voltage, wherein the main transistor has a voltage drop that varies with temperature and process variations. The voltage compensation semiconductor device is configured to be biased with bias currents that increase the reference voltage provided to the main transistor by an offset voltage that matches the voltage drop of the main transistor across at least part of the temperature and process variations, thereby pre-compensating for the voltage drop of the main transistor.
    Type: Grant
    Filed: September 3, 2017
    Date of Patent: March 5, 2019
    Assignee: MARVELL ISRAEL (M.I.S.L) LTD.
    Inventor: Shimon Avitan
  • Patent number: 10224425
    Abstract: An electric power converter (100) which is provided with a switching element (101) and a rectifying element (102) that is connected in series to the switching element (101). This electric power converter (100) has a configuration wherein an external electrical load (103) is connected to the connection point of the switching element (101) and the rectifying element (102). The switching element (101) is composed of an insulating gate type semiconductor element that has a first gate terminal (105) and a second gate terminal (106). The rectifying element (102) is composed of a diode that has a Schottky junction which uses silicon carbide as a semiconductor base. Different driving signals are applied to the first gate terminal (105) and the second gate terminal (106), respectively.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: March 5, 2019
    Assignee: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
    Inventors: Yujiro Takeuchi, Mutsuhiro Mori
  • Patent number: 10215832
    Abstract: Methods for operating electronic modules with small and flexible interfaces are disclosed. In accordance with an embodiment, an electronic module is configured for operation in a first operating mode. The electronic module receives a first signal that includes a first component and a second component, where the first component of the first signal serves as a first source of operating potential for the electronic module and the second component of the first signal is for configuring the electronic module. The electronic module is configured for operation in a second operating mode in response to a first set of criteria being satisfied, wherein the first set of criteria comprises the second component of the first signal being at a first signal level for a first amount of time. The electronic module generates an output signal in response to the electronic module being in the first operating mode.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: February 26, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Timothy J. Warneck
  • Patent number: 10205485
    Abstract: A communication apparatus (100) of the present invention includes a first communication circuit (2), a second communication circuit (1), and one signal line (3). The first communication circuit (2) transmits a collector voltage of an open collector circuit as an output signal. A second communication circuit (1) receives the output signal. The one signal line (3) connects the first communication circuit (2) and the second communication circuit (1). Particularly the first communication circuit (2) transmits the output signal as a pulse signal (57) to the second communication circuit (1). The second communication circuit (1) transmits a voltage signal (56) generated in the second communication circuit (1) to the first communication circuit (2). The first communication circuit (2) and the second communication circuit (1) communicate the pulse signal (57) and the voltage signal (56) bidirectionally via the signal line (3).
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: February 12, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Mineaki Isoda, Masahito Hidaka, Koji Kuyama
  • Patent number: 10168381
    Abstract: The present disclosure relates to power semiconductor modules. The teachings thereof may be embodied in modules with a power semiconductor component and methods, as well as a circuit arrangement. For example, a method may include: developing a thermal model of the power semiconductor module at a reference time point; establishing a reference temperature based on the thermal model; measuring a temperature-sensitive electrical parameter of the power semiconductor module during operation of the power semiconductor module; determining a current temperature from the measured temperature-sensitive electrical parameter of the power semiconductor module; calculating a temperature difference between the current temperature and the reference temperature; and determining a deterioration of the power semiconductor module based on the calculated temperature difference.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: January 1, 2019
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Jimmy-Alexander Butron-Ccoa, Andreas Lindemann, Gerhard Mitic
  • Patent number: 10153073
    Abstract: In one example, a method of compensating resistance in an integrated circuit includes providing a four terminal resistor in a semiconductor substrate. The resistor includes a first resistor and a second resistor coupled in series, a first terminal at a first end of the resistor, a second terminal at a second end of the resistor, a test terminal at a node connecting the first resistor and the second resistor, and a tuning terminal. The first resistor has a first conductivity type and the second resistor has a second conductivity type opposite to the first conductivity type. The first resistor includes a first portion extending along a first direction and a second portion extending along a second direction perpendicular to the first direction. The method further includes computing a voltage to be applied at the tuning terminal to compensate the difference between the resistance of the first and the second resistors.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: December 11, 2018
    Assignee: STMicroelectronics S.R.L.
    Inventors: Alberto Pagani, Alessandro Motta
  • Patent number: 10128750
    Abstract: A switched-mode power converter includes an inductive storage element and a cascode circuit. The cascode circuit includes a double-gate field effect transistor. A switchable load path of the double-gate field effect transistor is electrically connected in series with the inductive storage element.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: November 13, 2018
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Steffen Thiele
  • Patent number: 10103714
    Abstract: Apparatuses and methods to adjust voltage for thermal mitigation are provided. The apparatus includes a circuit, a plurality of switches configured to provide power of a power domain to the circuit, a plurality of thermal sensors disposed at different locations about the circuit and configured to detect temperatures at the different locations, and a control circuit configured to determine that one of the detected temperatures at one of the locations exceeds a temperature threshold, and in response, adjust one or more of the plurality of switches in proximity with the one location to reduce power provided to the circuit. The method includes providing power of a power domain through a plurality of switches, detecting a temperature at a location exceeding a temperature threshold, and adjusting the plurality of switches in proximity with the location to reduce the power provided, in response to the detecting the temperature exceeding the temperature threshold.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: October 16, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Palkesh Jain, Manoj Mehrotra, Yuancheng Chris Pan, Shih-Hsin Jason Hu
  • Patent number: 10018515
    Abstract: A device includes a source contact, a drain contact, a gate contact, and a body contact. The body contact is electrically coupled to a temperature sensing circuit. The source contact, the drain contact, the gate contact, and the body contact are included in a fin field-effect transistor (finFET).
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: July 10, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Yanxiang Liu, Haining Yang, Kern Rim
  • Patent number: 10003304
    Abstract: Disclosed are an operational amplifier and a method for reducing an offset voltage of the operational amplifier, which control an auxiliary circuit to generate a first auxiliary current and a second auxiliary current by adjusting the resistance of a resistance regulator, thereby adjusting a first current and a second current outputted from an input-stage circuit and further adjusting the offset voltage of the operational amplifier. Therefore, the operational amplifier and the method for reducing the offset voltage of the operational amplifier use the resistors to adjust the offset voltage so as to reduce the Least Significant Bit (LSB) distribution, thereby enhancing the accuracy of the offset voltage.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: June 19, 2018
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Hsin-Tai Lin, Chih-Yuan Chen
  • Patent number: 9970838
    Abstract: Provided is a pressure measuring device including a first electric resistor that is exposed to gas; a second electric resistor that is exposed to gas and has the same structure as that of the first electric resistor; a first measuring unit that measures a first voltage drop generated across the first electric resistor; a second measuring unit that measures a second voltage drop generated across the second electric resistor; a third measuring unit that measures a third voltage drop generated across the first electric resistor; a calculating unit that calculates a correction value that corrects the third voltage drop, based on a difference between the first voltage drop and the second voltage drop; and an output unit that corrects the third voltage drop using the calculated correction value and outputs a pressure value according to the third voltage value after the correction.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: May 15, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Tomohide Minami
  • Patent number: 9915568
    Abstract: A circuit device including: a detection circuit (10) that performs A/D conversion of a first detection voltage (VD1) that is detected by using a thermopile (2), and outputs a first detection value (DT1) that is a digital value, and performs A/D conversion of a second detection voltage (VD2) that is detected by using a thermistor (4), and outputs a second detection value (DT2) that is a digital value; and a control unit (50) that obtains a self-temperature by using the second detection value (DT2), obtains a second electromotive voltage that corresponds to the self-temperature by using the self-temperature, obtains a first electromotive voltage that corresponds to an object's temperature by using the first detection value (DT1) and the second electromotive voltage, and obtains the object's temperature by using the first electromotive voltage.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: March 13, 2018
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Kota Onishi, Tsutae Hinata, Yukinari Shibata, Chihiro Fukumoto, Naoki Nishigaki, Koji Kawaguchi
  • Patent number: 9900000
    Abstract: A drive device for controlling a power switching element to turn on and off includes: an on-side circuit performing an on operation of the power switching element; an off-side circuit performing an off operation of the power switching element; and a temperature detector detecting a temperature. At least one of the on-side and off-side circuits includes a current path for supplying or drawing a gate current of the power switching element and a switch circuit for switching the gate current. The switch circuit transitionally changes the gate current based on the temperature of the power switching element when the switching circuit switches the gate current.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: February 20, 2018
    Assignee: DENSO CORPORATION
    Inventors: Atsushi Kanamori, Sadahiro Akama, Kiyoshi Yamamoto, Atsushi Kobayashi
  • Patent number: 9870807
    Abstract: A reference current generating circuit includes a positive temperature coefficient current source configured to generate a first current, a value of which increases with an increase of an ambient temperature thereof, a negative temperature coefficient current source configured to generate a second current, a value of which decreases with the increase of the ambient temperature thereof, a first current adjustment circuit configured to adjust the first current in accordance with a first adjustment setting value, to thereby generate a positive temperature characteristic current, a second current adjustment circuit configured to adjust the second current in accordance with a second adjustment setting value, to thereby generate a negative temperature characteristic current, and a current amplifier configured to amplify a combined current of the positive temperature characteristic current and the negative temperature characteristic current, to thereby generate a reference current.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: January 16, 2018
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Tetsuya Ono