Abstract: An electronic circuit for current generation includes a source-follower based current source and a voltage compensation semiconductor device. The source-follower based current source is configured to output a reference current, the current source including a main transistor which is configured to derive the reference current from a reference voltage, wherein the main transistor has a voltage drop that varies with temperature and process variations. The voltage compensation semiconductor device is configured to be biased with bias currents that increase the reference voltage provided to the main transistor by an offset voltage that matches the voltage drop of the main transistor across at least part of the temperature and process variations, thereby pre-compensating for the voltage drop of the main transistor.

Abstract: An electric power converter (100) which is provided with a switching element (101) and a rectifying element (102) that is connected in series to the switching element (101). This electric power converter (100) has a configuration wherein an external electrical load (103) is connected to the connection point of the switching element (101) and the rectifying element (102). The switching element (101) is composed of an insulating gate type semiconductor element that has a first gate terminal (105) and a second gate terminal (106). The rectifying element (102) is composed of a diode that has a Schottky junction which uses silicon carbide as a semiconductor base. Different driving signals are applied to the first gate terminal (105) and the second gate terminal (106), respectively.

Abstract: Methods for operating electronic modules with small and flexible interfaces are disclosed. In accordance with an embodiment, an electronic module is configured for operation in a first operating mode. The electronic module receives a first signal that includes a first component and a second component, where the first component of the first signal serves as a first source of operating potential for the electronic module and the second component of the first signal is for configuring the electronic module. The electronic module is configured for operation in a second operating mode in response to a first set of criteria being satisfied, wherein the first set of criteria comprises the second component of the first signal being at a first signal level for a first amount of time. The electronic module generates an output signal in response to the electronic module being in the first operating mode.

Abstract: A communication apparatus (100) of the present invention includes a first communication circuit (2), a second communication circuit (1), and one signal line (3). The first communication circuit (2) transmits a collector voltage of an open collector circuit as an output signal. A second communication circuit (1) receives the output signal. The one signal line (3) connects the first communication circuit (2) and the second communication circuit (1). Particularly the first communication circuit (2) transmits the output signal as a pulse signal (57) to the second communication circuit (1). The second communication circuit (1) transmits a voltage signal (56) generated in the second communication circuit (1) to the first communication circuit (2). The first communication circuit (2) and the second communication circuit (1) communicate the pulse signal (57) and the voltage signal (56) bidirectionally via the signal line (3).

Abstract: The present disclosure relates to power semiconductor modules. The teachings thereof may be embodied in modules with a power semiconductor component and methods, as well as a circuit arrangement. For example, a method may include: developing a thermal model of the power semiconductor module at a reference time point; establishing a reference temperature based on the thermal model; measuring a temperature-sensitive electrical parameter of the power semiconductor module during operation of the power semiconductor module; determining a current temperature from the measured temperature-sensitive electrical parameter of the power semiconductor module; calculating a temperature difference between the current temperature and the reference temperature; and determining a deterioration of the power semiconductor module based on the calculated temperature difference.

Abstract: In one example, a method of compensating resistance in an integrated circuit includes providing a four terminal resistor in a semiconductor substrate. The resistor includes a first resistor and a second resistor coupled in series, a first terminal at a first end of the resistor, a second terminal at a second end of the resistor, a test terminal at a node connecting the first resistor and the second resistor, and a tuning terminal. The first resistor has a first conductivity type and the second resistor has a second conductivity type opposite to the first conductivity type. The first resistor includes a first portion extending along a first direction and a second portion extending along a second direction perpendicular to the first direction. The method further includes computing a voltage to be applied at the tuning terminal to compensate the difference between the resistance of the first and the second resistors.

Abstract: A switched-mode power converter includes an inductive storage element and a cascode circuit. The cascode circuit includes a double-gate field effect transistor. A switchable load path of the double-gate field effect transistor is electrically connected in series with the inductive storage element.

Abstract: Apparatuses and methods to adjust voltage for thermal mitigation are provided. The apparatus includes a circuit, a plurality of switches configured to provide power of a power domain to the circuit, a plurality of thermal sensors disposed at different locations about the circuit and configured to detect temperatures at the different locations, and a control circuit configured to determine that one of the detected temperatures at one of the locations exceeds a temperature threshold, and in response, adjust one or more of the plurality of switches in proximity with the one location to reduce power provided to the circuit. The method includes providing power of a power domain through a plurality of switches, detecting a temperature at a location exceeding a temperature threshold, and adjusting the plurality of switches in proximity with the location to reduce the power provided, in response to the detecting the temperature exceeding the temperature threshold.

Abstract: A device includes a source contact, a drain contact, a gate contact, and a body contact. The body contact is electrically coupled to a temperature sensing circuit. The source contact, the drain contact, the gate contact, and the body contact are included in a fin field-effect transistor (finFET).

Abstract: Disclosed are an operational amplifier and a method for reducing an offset voltage of the operational amplifier, which control an auxiliary circuit to generate a first auxiliary current and a second auxiliary current by adjusting the resistance of a resistance regulator, thereby adjusting a first current and a second current outputted from an input-stage circuit and further adjusting the offset voltage of the operational amplifier. Therefore, the operational amplifier and the method for reducing the offset voltage of the operational amplifier use the resistors to adjust the offset voltage so as to reduce the Least Significant Bit (LSB) distribution, thereby enhancing the accuracy of the offset voltage.

Abstract: Provided is a pressure measuring device including a first electric resistor that is exposed to gas; a second electric resistor that is exposed to gas and has the same structure as that of the first electric resistor; a first measuring unit that measures a first voltage drop generated across the first electric resistor; a second measuring unit that measures a second voltage drop generated across the second electric resistor; a third measuring unit that measures a third voltage drop generated across the first electric resistor; a calculating unit that calculates a correction value that corrects the third voltage drop, based on a difference between the first voltage drop and the second voltage drop; and an output unit that corrects the third voltage drop using the calculated correction value and outputs a pressure value according to the third voltage value after the correction.

Abstract: A circuit device including: a detection circuit (10) that performs A/D conversion of a first detection voltage (VD1) that is detected by using a thermopile (2), and outputs a first detection value (DT1) that is a digital value, and performs A/D conversion of a second detection voltage (VD2) that is detected by using a thermistor (4), and outputs a second detection value (DT2) that is a digital value; and a control unit (50) that obtains a self-temperature by using the second detection value (DT2), obtains a second electromotive voltage that corresponds to the self-temperature by using the self-temperature, obtains a first electromotive voltage that corresponds to an object's temperature by using the first detection value (DT1) and the second electromotive voltage, and obtains the object's temperature by using the first electromotive voltage.

Abstract: A drive device for controlling a power switching element to turn on and off includes: an on-side circuit performing an on operation of the power switching element; an off-side circuit performing an off operation of the power switching element; and a temperature detector detecting a temperature. At least one of the on-side and off-side circuits includes a current path for supplying or drawing a gate current of the power switching element and a switch circuit for switching the gate current. The switch circuit transitionally changes the gate current based on the temperature of the power switching element when the switching circuit switches the gate current.

Abstract: A reference current generating circuit includes a positive temperature coefficient current source configured to generate a first current, a value of which increases with an increase of an ambient temperature thereof, a negative temperature coefficient current source configured to generate a second current, a value of which decreases with the increase of the ambient temperature thereof, a first current adjustment circuit configured to adjust the first current in accordance with a first adjustment setting value, to thereby generate a positive temperature characteristic current, a second current adjustment circuit configured to adjust the second current in accordance with a second adjustment setting value, to thereby generate a negative temperature characteristic current, and a current amplifier configured to amplify a combined current of the positive temperature characteristic current and the negative temperature characteristic current, to thereby generate a reference current.

Abstract: A CMOS voltage reference is disclosed. The CMOS voltage reference may include a PTAT current bias circuit including a start-up circuit, a core module implementing high order non-linear curvature compensation and an output stage supplying the reference voltage. The CMOS voltage reference may include a PTAT current bias circuit having a start-up and a CTAT feedback loop and a PTAT feedback loop and a compensating circuit summing the current from the CTAT feedback loop and the PTAT feedback loop.

Abstract: A monitoring device is provided for monitoring a semiconductor-based switching element having a control input, a power input, and a power output. The monitoring device includes a charge carrier source for charging the control input of the switching element with electric charge carriers, and a measuring device for detecting a charge carrier drain from the control input of the switching element. The measuring device emits a warning signal if the charge carrier drain lies above a specified threshold value. A corresponding method for monitoring a semiconductor-based switching element is also provided.

Abstract: A circuit is disclosed that includes a first differential input pair and a second differential input pair. The first differential input pair is activated according to an output of the second differential input pair, and receives a first temperature-dependent voltage and an output signal. The second differential input pair is activated according to an output of the first differential input pair, and receives a second temperature-dependent voltage and the output signal. The switching circuit couples a capacitive element to a first voltage supply according to the output of the first differential input pair, and the capacitive element to a second voltage supply according to the output of the second differential input pair, to generate the output signal.

Abstract: According to an embodiment, a method of operating a measurement circuit includes biasing a sense transistor to conduct current through a first conduction channel in a first direction during a first mode, injecting a measurement current into a body diode of the sense transistor during a second mode, measuring a first voltage across the sense transistor when the measurement current is injected, and determining a temperature of the sense transistor based on the first voltage. When the measurement current is injected, it is injected in a second direction opposite the first direction. The sense transistor is integrated in a semiconductor body with a load transistor having a second conduction channel, and the first conduction channel and the second conduction channel are coupled to an input node.

Abstract: An electronic circuit includes a circuit to receive an analog input signal responsive to an analog oscillating signal and to generate an analog output signal, AD converters to perform AD-conversion with respect to the analog oscillating signal, the analog input signal, and the analog output signal to generate a digital oscillating signal, a digital input signal, and a digital output signal, at least one first adjustor to adjust a phase of the digital oscillating signal through the Hilbert transform, a second adjustor to adjust a phase of the digital input signal through the Hilbert transform, a third adjustor to adjust a phase of the digital output signal through the Hilbert transform, a first mixer circuit to multiply the output of the first adjustor and the output of the second adjustor, and a second mixer circuit to multiply the output of the first adjustor and the output of the third adjustor.

Abstract: A temperature sensor circuit has a reference voltage generator that is trimmable at two temperatures for increased accuracy. The reference voltage generation section generates a reference voltage, the level of which is trimmable. A voltage divider section is connected to receive the reference voltage from the reference voltage generation section and generate a plurality of comparison voltage levels determined by the reference voltage and a trimmable resistance. An analog-to-digital converter can then be connected to a temperature dependent voltage section to receive the temperature dependent output voltage, such as a proportional to absolute temperature type (PTAT) behavior, and connected to the voltage divider section to receive the comparison voltage levels. The analog to digital converter generates an output indicative of the temperature based upon a comparison of the temperature dependent output voltage to the comparison voltage levels.

Abstract: The disclosure relates to a system and method for controlling a common mode voltage of an output differential signal of a differential signal processing circuit using a replica circuit and feedback control. The differential signal processing circuit includes two load devices, two input transistors, and two current-source transistors coupled in series between voltage rails, respectively. The replica circuit includes replica load device, replica input transistor, and replica current-source transistor coupled in series between the voltage rails. The common mode voltage of the input differential signal is applied to the replica input transistor to generate a replica output common mode voltage. A feedback circuit generates a bias voltage for the replica current-source transistor and the current-source transistors of the differential circuit to set and control the replica output common mode voltage and the output common mode voltage of the differential signal processing circuit to a target common mode voltage.

Abstract: An LED driver circuit has a rectifier circuit including a first input terminal coupled to a first AC voltage line and a second input terminal coupled to a second AC voltage line. The rectifier circuit is configured to convert a first AC voltage on the first AC voltage line and a second AC voltage on the second AC voltage line to a DC voltage. The driver circuit has a switching circuit coupled to the first AC voltage line and to the second AC voltage line and configured to generate a reference AC voltage based on the first AC voltage and the second AC voltage. The driver circuit has a power management circuit configured to provide a current or power to an LED lamp based on the generated AC reference voltage. The driver circuit has a power supply circuit configured to provide a constant current or power to the power management circuit.

Abstract: A circuit arrangement and method of reading the logic state of a memory cell in an array of semiconductor memory cells. A data memory cell selected from the array drives a current on a first data bit line in a read operation. A reference memory cell corresponding to the memory cell is activated after the memory cell is selected, the reference memory cell driving a current through the reference data line at a greater rate than that of the corresponding memory cell regardless of the logic state of the memory cell. A sense amplifier connected to the data line and a reference data line determines the logic state of the selected memory cell. A delay circuit activates the reference memory cell after the memory cell is selected and enables the sense amplifier after the reference memory cell has been activated.

Abstract: In an embodiment, an apparatus may include an amplifier circuit including a first input to receive a signal, a second input to receive a feedback signal, and an output. The apparatus may further include a buffer circuit including an input coupled to the output of the amplifier and including an output coupled to an output node. The apparatus may also include a feedback circuit coupled between the output node and the second input of the amplifier circuit. The feedback circuit may include at least one non-linear resistor configured to define a feedback ratio that changes in response to a voltage at the output node.

Abstract: An integrated circuit includes a first signal generation unit suitable for generating a first enable signal which is activated during an initial setting period; a second signal generation unit suitable for generating a second enable signal which is activated in response to a command for performing a preset operation, after the initial setting period; and a temperature code generation unit suitable for generating temperature codes in response to activation of the first and second enable signals.

Abstract: A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device may output command/address signals and receives temperature codes. The second semiconductor device may sense an internal temperature if a combination of the command/address signals is a first combination, generate and output the temperature codes having a combination corresponding to the internal temperature if a combination of the command/address signals is a second combination, and adjust a period of the temperature codes in accordance with a temperature section of the internal temperature.

Abstract: Memory devices, memory device operational methods, and memory device implementation methods are described. According to one arrangement, a memory device includes memory circuitry configured to store data in a plurality of different data states, temperature sensor circuitry configured to sense a temperature of the memory device and to generate an initial temperature output which is indicative of the temperature of the memory device, and conversion circuitry coupled with the temperature sensor circuitry and configured to convert the initial temperature output into a converted temperature output which is indicative of the temperature of the memory device at a selected one of a plurality of possible different temperature resolutions, and wherein the converted temperature output is utilized by the memory circuitry to implement at least one operation with respect to storage of the data.

Abstract: Temperature sensing circuitry implemented on a semiconductor integrated circuit that senses the temperature at a site, digitizes the sensed temperature, and then outputs a signal representing such a sensed temperature. The temperature sensing circuitry converts a voltage signal that is proportional to the temperature to a frequency-based signal, which is converted to a digital bit value. A scalar factor is applied to another voltage signal that is inversely proportional to the temperature to produce a scaled voltage signal. The scaled voltage signal is converted to a second frequency-based signal, which is converted to a digital bit value, and then the two digital bit values are compared. The temperature is determined when the digital bit values substantially match.

Abstract: A monolithic integrated circuit device may include a supply voltage glitch detector for detecting improper supply voltage conditions. Advantageously, the detection threshold of the supply voltage glitch detector is adaptively set based on the mode of operation of the device or a particular part of the device, which is internally known to the device based on certain inputs received by the device, such as commands, interrupts, control signals, and so forth.

Abstract: A temperature sensor for use in an infrared detector the temperature sensor comprising: a first resistor associated with a first thermal path having a first thermal conductivity between the first resistor and a substrate and a first temperature coefficient of resistance; a second resistor associated with a second thermal path having a second thermal conductivity between the second resistor and the substrate and a second temperature coefficient of resistance, and a measurement circuit responsive to changes in the resistance of the first and second resistors to estimate changes in temperature, and wherein at least one of (a) the first and second thermal conductivities are different or (b) the first and second temperature coefficients of resistance are different.

Abstract: Circuits and method for providing voltage reference circuits that include low drift over time and lower operating voltages are provided. Generally, it is desirable that a reference circuit provide an accurate and precise reference over time. The voltage reference circuits described can provide for good long term stability, operation at lower voltages than prior designs, consistent output voltage with reduced variability due to process changes and mismatches, low noise in the reference voltage, and other advantages.

Abstract: A power semiconductor device includes a semiconductor body including a first surface, an edge delimiting the semiconductor body in a horizontal direction substantially parallel to the first surface, an active area including at least one of several transistor structures connected in parallel and several diode structures connected in parallel, and a peripheral area arranged between the active area and the edge. The power semiconductor further device includes a plurality of word lines, a plurality of bit lines separated from the word lines, and a plurality of temperature sensors arranged on or at the first surface, wherein each of the temperature sensors is connected with one of the bit lines and one of the word lines or each of the temperature sensors is formed by a respective portion of one of the bit lines.

Abstract: Machine-implemented method for a network device is provided. A temperature (T) of an application specific integrated circuit (ASIC) for the network device is compared with a first threshold value. A receive buffer for the network device is placed in an active state, when T is below the first threshold value, and then increasing available credit to store information at the receive buffer. T is also compared with a second threshold value and when T has reached or exceeded the second threshold value, one or more receive buffers are placed in a reduced power state when one or more receive buffers are not currently storing any information.

Abstract: A device includes an array of memory cells, a temperature sensor to provide a temperature output, and a circuit. The circuit provides a bias voltage to bias a node of the array of memory cells based on the temperature output, a first voltage component independent of a temperature coefficient of the memory cells, and a second voltage component dependent on the temperature coefficient of the memory cells. The first voltage component is determined at a first temperature and the second voltage component is determined at a second temperature less than the first temperature.

Abstract: In one embodiment, the present invention includes a processor having a plurality of cores and a control logic to control provision of a voltage/frequency to a first core of the plurality of cores independently of provision of a voltage/frequency to at least a second core of the plurality of cores. In some embodiments, the voltages may be provided from one or more internal voltage regulators of the processor. Other embodiments are described and claimed.

Abstract: A machine for plasma treatment of containers, including a chamber for receiving a container to be treated, the chamber connected to a primary vacuum circuit. A pressure sensor is connected to the chamber. There is a first mechanism for communicating the pressure sensor with the chamber; a secondary vacuum circuit dependent on the first circuit and connected to the pressure sensor; and second mechanism for communicating the pressure sensor with the secondary vacuum circuit.

Abstract: An electronic system is disclosed, which may include a phase pipeline, a data pipeline, an input phase selector, and an output phase selector. The phase pipeline may have latches clocked by a clock signal, and designed to propagate phase signals from a phase input to a phase output. The data pipeline may have latches clocked by the phase pipeline clock signal, and designed to propagate data from a data input to a data output. The input phase selector may be designed to provide an inverted or a non-inverted copy of data from a data input, in response to a value at the phase input, to the data pipeline data input. The output phase selector may be designed to provide an inverted or a non-inverted copy of data from the data pipeline output to an output phase selector data output, in response to a phase pipeline output value.

Abstract: A low-offset bandgap circuit including a core bandgap circuit and an offset-cancelling circuit is provided. The low-offset bandgap circuit provides a reference voltage at an output node. The core bandgap circuit includes a core operational amplifier to generate a core current. The offset-cancelling circuit is coupled to two input terminals of the core operational amplifier. The offset-cancelling circuit is configured to generate a compensation current according to the voltages at the two input terminals of the core operational amplifier so as to compensate for an offset voltage of the core operational amplifier. The reference voltage is generated according to the core current and the compensation current.

Abstract: The present disclosure includes systems and methods for sharing bias current. In one embodiment, shared bias current passes through a first level device to one or more second level devices along a bias current path. Multiple active devices may share bias current along a bias current path and process signal along the same or different signal paths. In one embodiment, bias current from one device is split among multiple devices. In another embodiment, bias current is combined from multiple devices into a device. Embodiments may include an interstage circuit along a signal path that improves stability of the circuit.

Abstract: In one embodiment, a collector current driver is provided that controls the collector current for a bipolar transistor temperature transducer. The collector current driver is configured to use negative feedback to generate an emitter current for the bipolar transistor responsive to target current.

Abstract: A calibration system and method are disclosed that include a first bias current generator configured for generating a first bias current that is proportional to absolute temperature (PTAT) and a second bias current generator configured for generating a second bias current that is complementary to absolute temperature (CTAT). The first and second bias currents are copied, multiplied and then summed into a total output bias current, which can be used to bias an electronic circuit. A temperature coefficient is calibrated by changing a ratio of the first and second bias current contributions to the total output bias current, while maintaining the same total output bias current level for a given temperature.

Abstract: A bidirectional current sensor circuit can be configured to generate a scaled version of a load current using a first transistor from a power regulator output stage and a second transistor that can be a mirror or scaled version of the first transistor. A trim circuit can be provided to correct gain errors under current sinking or current sourcing conditions. In an example, the bidirectional current sensor circuit can be configured to detect a polarity or a magnitude of a current signal that is used to operate a thermoelectric device.

Abstract: A method of controlling an integrated circuit chip including first and second clock sources, the first clock source being more thermally stable and having a higher power consumption, the integrated circuit chip being operable in a first mode in which the first clock source is inactive and the second clock source active and in a second mode in which the first and second clock sources are active, the method including operating the integrated circuit chip in the first mode; taking a measurement indicative of temperature; if the measurement indicates that the temperature is outside of a temperature band: activating the first clock source so as to operate the integrated circuit chip in the second mode; recalibrating the second clock source against the first clock source; and following the recalibration, deactivating the first clock source so as to return the integrated circuit chip to the first mode.

Abstract: Embodiments of complementary biasing circuits and related methods are described herein. Other embodiments and related implementations are also disclosed herein.

Abstract: Provided is a circuit for generating a reference voltage. The circuit includes a band gap circuit generating a first current having a size that increases in proportion to an absolute temperature and a second current having a size that decreases in proportion to the absolute temperature, and outputting a reference voltage based on the first current and the second current; a mirroring circuit mirroring a sum of the first current and the second current and outputting a mirroring voltage that is in proportion to the sum of the first current and the second current; and a start-up circuit receiving the mirroring voltage from the mirroring circuit and providing a driving current for generating the first current or the second current to the band gap circuit until a time when the first current starts to be generated in the band gap circuit.

Abstract: A thermal controller for driving a gate control unit of a gate-driven semiconductor switching device, the thermal controller comprising a junction temperature estimation module for generating an estimated junction temperature for the switching device, a gate voltage control module for modifying a gate voltage of the switching device, a switching frequency control module for modifying a switching frequency of the switching device, and a duty cycle control module for modifying the duty cycle of the switching device. In use, the thermal controller is adapted to activate one of the gate voltage control module, switching frequency control module and duty cycle control module dependent upon the estimated junction temperature in order to maintain the actual junction temperature below a pre-determined limit.

Abstract: A front-end circuit for measurement devices, for example oscilloscopes or digitizers, may implement DC gain compensation using a programmable variable resistance. A MOS transistor may be configured and operated as a linear resistor with the ability to self-calibrate quickly, while compensating for temperature variations. An integrated CMOS-based variable resistor may be thereby used for an analog adjustable attenuator. Master and slave CMOS transistors may be operated in linear mode, and temperature effects on the linear transistors may be compensated for by using an integral loop controller (current controller) configured around the master MOS transistor. Circuits implemented with the compensated variable resistance have a wide range of adjustment with a control voltage, and may be used in the front-end (circuits) of an oscilloscope or digitizer, or in any other circuit and/or instrumentation benefitting from an adjustable attenuator.

Abstract: An integrated circuit die includes multiple temperature sensor units each for measuring the temperature of respective regions of a semiconductor substrate of the integrated circuit die. The temperature sensor units are each coupled to a multiplexer by respective groups of signal lines. The signal lines include resistance compensation areas for maintaining a particular ratio of resistances of the signal lines of each group.

Abstract: A unified bandgap voltage waveform compensation amplifier is arranged having shared input transistor pairs, a shared load resistor, and shared current sources. For example, a first amplifier structure is arranged to produce a negative-going bias correction signal when a bandgap voltage reference increases as operating temperatures rise and a second amplifier structure is arranged to produce a positive-going bias correction signal when the bandgap voltage reference increases as operating temperatures rise. The unified amplifier is arranged to combine the positive- and negative-going signals to generate a combined compensation current that is used to compensate for temperature instability of the bandage voltage reference.

Abstract: An electronic device includes a first circuit, and a delay circuit electrically connected to the first circuit. The delay circuit includes a resistor, a capacitor, and a process, voltage or temperature (PVT) compensation circuit electrically connected to the capacitor.