Abstract: Disclosed is a distance measuring apparatus for measuring a distance to a target object also its shape precisely without influence of noise, which is applied to a invader monitoring system. This apparatus comprises a clock signal generator unit, a modulated light projector unit, a light receiver unit, and a demodulator unit, and obtains a range image presenting signal levels changing according to the distances to the objects including the target object by irradiating light onto the objects and receiving reflected light. In the demodulator unit, the range image is processed for evaluating and removing noise components, for interpolating and averaging noise removed region, and for selecting the target object region. Those processes are carried out from the following point of view, the variation of the distance signal levels, the received quantity of light, and the variation of the received quantity of light.

Abstract: A peak hold circuit that can operate to follow changes in peak value even if the changes are abrupt. The peak hold circuit (1) of the present invention has current control circuit (31), auxiliary switch element (25), and auxiliary constant current circuit (26). Current control circuit (31) counts the number of reference clock pulses RCK after output signal Vout becomes higher than analog voltage DI. When the number of clock pulses counted reaches a prescribed number or larger, auxiliary switch element (25) is turned on to operate auxiliary constant current circuit (26) to increase the amount of drop of output signal Vout per unit time. Consequently, even if output signal Vout becomes higher than the peak value of analog voltage DI, it is possible, by increasing the amount of drop of output signal Vout to make output signal Vout lower than analog voltage DI in a shorter amount of time than in the case in the conventional technology.

Abstract: A peak detector circuit for detecting a peak output signal including an input circuit for inputting an input signal, a comparator for comparing the input signal and said peak output signal to generate a difference signal, a current source to generate a current in response to the difference signal, and a comparator to generate the peak output signal based on said current.

Abstract: A method and concomitant apparatus for adapting a logic threshold level in response to a background noise level in an information signal. Information signal excursions beyond the logic threshold are indicative of the presence of an information packet in the information signal. In this manner, a relatively low dynamic range information packet processor may reliably receive information packets.

Abstract: The present invention provides an amplitude detector comprising: a first peak holding means for generating a first peak voltage signal for holding a peak voltage of a detected signal; a differential signal generating means for generating a differential signal between the first peak voltage signal and the detected signal; and a second peak holding means for generating an amplitude detect signal holding a peak voltage of the differential signal.

Abstract: A magnetic sensing device comprising a magnetic sensor and a digital circuit is disclosed. The magnetic sensor is operable to output an analog signal as an indication of any movement of an object. The digital circuit can include a dynamic reference threshold generator to output a reference signal in response to a detection of a signal feature of the analog signal and to a detection of a diametric signal feature of the analog signal, and an output format generator to output a digital signal in response to a comparison of the analog signal and the reference signal. The digital circuit can include a dynamic reference threshold generator to output a reference signal in response to a detection a first pair of quadrants of the analog signal and a detection of a second pair of quadrants of the analog signal, and an output format generator to output a digital signal in response to a comparison of the analog signal and the reference signal.

Abstract: A circuit arrangement for monitoring a load operated with a clock signal is provided. The circuit arrangement may be applied to the field of automotive engineering. The circuit arrangement includes a comparator having at least two inputs and one output. The circuit arrangement further includes a D-flip-flop having one clock input, one signal input, and one output. At least a first input of the comparator is coupled to the load signal. The output of the comparator is coupled to the signal input of the D-flip-flop. The clock input of the D-flip-flop is coupled to the clock signal. The output of the D-flip-flop delivers a monitoring signal.

Abstract: There is provided a current mirror circuit which suppresses variations in an output current resulting from the Early effect. A pair of transistors (T1, T2) of a conventional current mirror circuit have gates connected to each other, and sources connected to each other, with the gate and drain of one of the transistors short-circuited. The source and drain of the other transistor (T2) on an output current side are connected to the source and gate of a transistor (T3), respectively. The sources of all of the transistors (T1, T2, T3) are commonly connected to a constant current circuit comprised of a bias voltage generating circuit (VB1) and a transistor (T4). A bias point is determined so that the increase/decrease in a current (Iout) causes the increase/decrease in a current (Icom), and the sizes of the respective transistors are designed.

Abstract: To decode an attenuated multi-level signal (42) in a receive interface (120) of communication apparatus, first (134) and second (150) diode pumps co-operate with a biasing chain to ensure that threshold reference levels used by respective positive (52) and negative (54) data comparators are dynamically adjusted to a level dependent upon the attenuated multi-level signal (42) applied to the diode pumps. Particularly, a voltage divider (138-144) acts dynamically to bias differential inputs to the respective positive (52) and negative (54) data comparators, with a ratio between a biasing chain of resistors (138-144) and a common input resistor 128 determining the threshold reference levels used to assign logical levels for the reconstruction of symbols encoded within the multi-level signal (42).

Abstract: An A/D converting circuit for realizing a stable performance without being influenced by variations in characteristic values of each inverter. The A/D converting circuit includes a quantizing inverter which is constructed by a number of unit inverters parallelly connected.

Abstract: A latchable comparator including a comparator and a circuit having a reset input. When the comparator produces a first state, it is latched when the reset input is in the non-reset state. In this state, the comparator receives a comparison signal having a high or low value and a latch signal being outside the range of voltages extending between the low and high values. A reset signal causes the latch signal to be replaced by a comparator reference signal. Further disclosed is a latchable comparator including a comparator and a flip-flop. The comparator has a ramp input, a control input, a first reference input and a second reference input. The flip-flop provides latch signals to each of the first and second reference inputs when its reset input is in the non-reset state and said comparator is generating a first state and maintains the latch signals until a reset signal is received.

Abstract: A playback signal is supplied to a delay amplifier and a noise comparator. The delayed playback signal is supplied to a comparator, which compares the delayed playback signal with the playback signal and provides a first comparison signal to a pulse adjustment circuit. The noise comparator compares the playback signal with threshold signals and provides a second comparison signal to the pulse adjustment circuit. The pulse adjustment circuit generates the peak detection signal at each point when the signal level of the first comparison is inverted, and determines the peak detection signal to be invalid when the signal level of the playback signal falls within the range between the threshold signals. A read signal is generated based on the valid peak detection signal.

Abstract: A pulse detection system for detecting pulses of sufficient magnitudes using a control detector providing crossing indications of pulses going beyond a threshold value, a stored threshold crossing adjustable actuator representing at least portions of selected crossing indications previously stored therein but reduced in magnitude as controlled by a magnitude reduction controller acting over time. An output detector may be used to detect signals going beyond another threshold.

Abstract: A correlation peak detector including an envelope detector, a peak-holder, a peak scaler, and a comparator detects the envelope of a correlator output signal, derives a peak threshold signal from the peak signal level produced by the correlator output signal, and compares the envelope of the correlator output signal to the peak threshold signal to produce a correlation peak detector output signal which indicates detection of a correlation peak. A minimum threshold signal is generated and provided to the comparator to inhibit detection of false peaks or noise. The comparator produces a correlation peak detector output signal which indicates occurrence of a correlation peak by producing a pulse whenever the magnitude of the envelope of the correlator output signal exceeds the sum of the magnitude of the peak threshold signal and the magnitude of the minimum threshold signal. Pulses in the correlation peak detector output signal may be used to synchronize receiver timing signals with a received signal.

Abstract: An apparatus for detecting off-track positioning of a disk read/write head seeking a selected data track on a disk having data tracks with embedded servo burst patterns recorded thereon. The apparatus comprises a compare and select component, a charge redistribution A/D converter circuit and an off-track controller. The compare and select component compares and selects from among voltage values corresponding to the servo bursts a pair best representing track centerline as a first servo signal and a second servo signal and determines which of the servo signals is greater. The charge redistribution analog-to-digital (A/D) converter circuit determines if the normalized track position exceeds a position threshold representing a percentage of the normalized track position distinguishing on-track from off-track position through the use of an internal binary-weighted, switched capacitor array DAC and a comparator.

Abstract: A circuit is described for processing an input signal received from a bus of a computer. The circuit includes level identification circuitry to characterize the magnitude of the input signal and to generate a corresponding level identification signal. Level toggle circuitry is connected to the level identification circuitry to process the level identification signal and generate a level hold signal during spurious signal transitions in the input signal. The level toggle circuitry generates a level toggle signal at a predetermined point of the input signal after the spurious signal transitions have subsided. Level hold circuitry, connected to the level identification circuitry and the level toggle circuitry, processes the level identification signal, the level hold signal, and the level toggle signal. During spurious signal transitions in the input signal, the level hold circuitry maintains a high digital circuit output value in response to the level hold signal and the level identification signal.

Abstract: A method and apparatus for detecting a peak value of a waveform signal continuously inputted during a predetermined time period.

Abstract: An automatic offset control circuit comprises a differential output preamplifier having an offset adjustment function, further comprising an average detector, a peak detector, and a differential input amplifier. The average detector generates a reference voltage representing an average value of a positive output and a negative output of the preamplifier. The peak detector outputs a peak voltage representing a peak of the negative output of the preamplifier. The differential input amplifier compares the peak voltage with the reference voltage to output an offset adjustment signal to the preamplifier. The offset adjustment signal is obtained based on a difference between the reference voltage and the peak voltage. A bottom detector may be used instead of the peak detector, provided a bottom value is detected using the positive output of the preamplifier.

Abstract: A geartooth sensor is provided with a circuit which determined a threshold magnitude as a function of the minimum value of a first output signal from a magnetically sensitive component and an average output signal from a magnetic sensitive component. Circuitry is provided to determine the average signal. The minimum signal is then subtracted from the average signal and the resulting signal is doubled before being scaled by a predetermined fraction and then compared to the original output signal from the magnetically sensitive component. This circuit therefore determines a threshold signal as a function of both the minimum signal value and the average signal value and, in addition, enables the resulting signal to be scaled to a predetermined percentage of this difference for the purpose of selecting a threshold value that is most particularly suitable for a given application.

Abstract: The present invention is a closed loop peak detection circuit comprising switching means, comparing means, control means, two current sources, and a holding capacitor. The switching means selectively provides one of a plurality of input signals to the comparing means. The control means is coupled to the comparing means. The control means receives first and second control signals for selecting one of three modes: reset, peak detect, and hold. First and second current sources are coupled to the control means. A capacitor is coupled to the first and second current sources for generating an output signal. The output signal is feedback coupled to the comparing means. The comparing means determines when one of the plurality of input signals exceeds the output signal. The control means enables and disables the current sources in response to the comparing means and to the first and second control signals.

Abstract: A circuit which detects the median peak of a burst of pulses. The peak value of each pulse in a pulse burst is detected and stored. The peak value of each pulse is then compared to the peak value of every other pulse and the results of the comparison are used to determined the median peak.

Abstract: A maximum likelihood sequence metric calculator for use in a sequence decoder for processing sequences of sampled values from a communication channel or recording device. The metric calculator can be used in a maximum likelihood decoder, where the sequence can be based upon a 2-state trellis. This would include duobinary, dicode, or partial response class IV signalling. The survivor metrics for the two states is proportional to the peak amplitude detected for that state. Thus, the peak amplitude for a state is stored by a peak detector, until an opposite polarity amplitude is detected to switch the trellis path to the opposite polarity state. The path switching threshold to a state is determined by the opposite polarity state's peak amplitude and the maximum likelihood threshold value. Since only the peak amplitude of the state is stored, unbounded metric absolute value growth is not a problem.

Abstract: A peak detector for use in a fiber optic receiver has a capacitor, an input amplifier driving the capacitor, and a feedback differential amplifier coupled between the capacitor and an input of the input amplifier. The input amplifier is a complementary buffer with unity gain modified to include an additional transistor on one rail that receives an inverter voltage generated by the differential amplifier. The inverter voltage equals the difference between twice the capacitor voltage and an input voltage applied to the peak detector. The input amplifier in a positive peak detector functions so that the capacitor voltage tracks the input voltage when it exceeds the inverter voltage, and equals the average of the input voltage and inverter voltage when the input voltage is less than the inverter voltage. A negative peak detector operates similarly but with opposite polarity. The peak detector also contains transistors used to reset the capacitor voltage upon assertion of a reset signal.