Abstract: A comparator circuit with low current consumption for driving a sawtooth generator includes two differential amplifiers connected back to back, which control the bias current of an operational amplifier through a current measuring device and a means for impressing bias current. During normal operation, that is to say outside a switch-over point of the operational amplifier, the means for impressing bias current is supplied by a comparatively small standby current. Near the switch-over point of a sawtooth signal, the bias current of the operational amplifier is increased. Since the bias current source supplies a current pulse only at the switch-over point of the sawtooth signal, but remains switched off for the remainder of the time, the comparator circuit current consumption is minimized.

Abstract: An automatic threshold control circuit includes a bottom detection circuit, a relative peak detection circuit, and a voltage divider circuit. The bottom detection circuit detects an absolute minimum level of an input signal, and the relative peak detection circuit detects, in accordance with the input signal, a maximum level relative to the minimum level detected by the absolute bottom detection circuit. Further, the voltage divider circuit generates a threshold level by dividing the absolute minimum level and the relative maximum level in a predetermined ratio. Using this configuration, a signal amplifying circuit can be constructed that is capable of accurately reproducing digital signals at all times regardless of variations in the amplitude or the DC level of the input signal.

Abstract: An electrical network creates a differential voltage signal and comprises a plurality of first impedance elements of substantially equal values which are connected to form an impedance bridge. The impedance of at least one of the first impedance elements changes in response to at least one selected external condition to which the first impedance elements are exposed. The network also comprises a second impedance element which has two nodes. The second impedance element is connected at these nodes between a first pair of the first impedance elements. The differential voltages are measured between these nodes and between another node or nodes with magnitudes and signs being dependent upon the change in the impedance of the first impedance elements.

Abstract: A differential comparison circuit obtains an improved common mode range with respect to the voltages on first and second inputs. A first comparator is activated when the first and second input voltages are above a first level. A second comparator is activated when the first and second input voltages are below a second level. The output of the comparator that is activated is selected for providing the comparison output signal. In this manner, the comparator having improved performance, typically in terms of differential input voltage sensitivity, may be selected for the voltages present at the inputs. In a typical embodiment, the first comparator uses n-channel input devices, and the second comparator uses p-channel input devices. The activation is provided by voltage level-sensing circuitry, and may include hysteresis to help ensure reliable operation.

Abstract: A circuit for power arbitration, low battery voltage detection, and the operation of battery backed circuitry for systems in which the system power supply voltage range overlaps that of a battery source. A voltage regulator is used to regulate the battery voltage so that the voltage range of the battery source is below the voltage range of the system supply. The regulator is based on a silicon-bandgap referenced methodology and consumes an insignificant amount of current so that the battery life is not appreciably affected. The regulator also has a smaller variation in its output voltage than the battery. A temperature and supply voltage compensated voltage is produced by the combination of a subthreshold current source, parasitic bipolar devices, and voltage buffering, and used to provide a voltage source for the battery backed circuitry of the system. The regulated voltage is set to a value lower than the system supply and serves as the battery supply input for the power arbitration circuitry.

Abstract: A CMOS differential to single-ended converter is implemented. A differential input stage comprised of a pair of N-channel transistors draws current through two fixed current P-channel load transistors. A first N-channel differential transistor provides negative feedback bias control of a current source transistor coupled to the differential input stage. The negative feedback control provides increased current gain in the second N-channel transistor, which drives a CMOS inverter to a full rail-to-rail voltage swing on its output.

Abstract: A switching circuit for switching between a main power supply and a battery power supply only after first power up includes a switch, a first power up transfer transistor and a first power up latch. The switch switches between the main and battery power supplies and provides one of the main and battery power supplies to a switched power supply node. The first power-up transfer transistor is connected on input to the switched power supply node. The first power up latch is powered by a switched power supply from the switched power supply node and is connected on output to a gate of the first power-up transfer transistor. The first power up latch produces an activation signal to the gate upon and after first power up of the main power supply.

Abstract: A magnetoresistive sensor and preamplifier system has an excess differential imbalance detector, (a) for detecting magnitude differences between a pair of signals occurring at the output of a preamplifier subsystem due to modal transitions, and (b) for initiating action to overcome same. The excess imbalance detector changes a threshold therein to become more sensitive to smaller imbalances in the output signals being monitored after detection of a modal transition imbalance.

Abstract: A voltage reference circuit includes at least a first and a second voltage supply having different operating temperature ranges. Output voltages of the two voltage supplies are compared and one of the supplies is selected to provide an optimum voltage reference.

Abstract: A signal processing circuit (10) performs a sample and hold (16) of an input signal (14) and stores a maximum value of the input signal (18). A guardband signal (21) is developed that is less than the maximum value that is stored. The input signal is compared to the guardband signal to determine if the input signal is above or below the guardband signal. A threshold signal (25) is developed by taking a percentage of the maximum value that is stored. The input signal is compared to the threshold signal to regenerate the input waveform. If the input signal is below the guardband signal and above the threshold signal, the sample and hold circuit is reset to acquire a new maximum value of the input signal so that a new threshold can be used for regenerating the input signal.

Abstract: A multi-channel readout chip is provided in which each channel has an analog section and a digital section. Each channel of the readout chip employs low noise charge amplifiers with self trigger and calibration capabilities to provide timing information with better than 20 nanosecond precision. The trigger threshold can be adjusted to provide energy discrimination. The chip has a sparse readout function in which only the channels which have received signals greater than a preselected threshold value are readout, thus providing fast data acquisition capabilities.

Abstract: A driver circuit for a semiconductor test system that can reduce power consumption significantly, set the power-supply voltage to low level, and can facilitate mearsurments against temperature increases. The invention is able to respond to higher amplitudes and high speeds in the semiconductor test system. The driver circuit provides an output for a semiconductor test system by switching the high and low voltage levels, and configuring a current-source device 703 to supply an output current at a period set by a switch. The invention also comprises a driver circuit that consumes less power by adapting a circuit that drastically reduces current consumption during no-load operation. To accomplish this, after receiving the positive differential-switching signal and negative differential-switching signal, the analog-voltage signal is supplied to an output-stage transistor by switching diode bridges. Output is provided by buffering and amplifying by means of forming a current mirror.

Abstract: A stress mode circuit is provided to generate a voltage that is either equal to a reference voltage or is a proportion of an external voltage (VCCEXT). The circuit includes two voltage divider circuits to provide the proportion voltage. Two differential amplifiers are provided to generate outputs corresponding to a comparison to the proportion voltage and the reference voltage. The outputs operate switches that couple the reference voltage or the proportion voltage to an output terminal.

Abstract: A comparator (10) operates in comparator mode or in static leakage current test mode as determined by a control signal. In the comparator mode, the comparator receives a differential input signal for amplification through an analog differential front-end comparator input stage (31). The output of the comparator input stage is presented as a single-ended signal that is applied to an input of a buffer (32). The buffer amplifies the single-ended signal to digital logic levels. In test mode, the control signal enables a feedback circuit (36-42) from the output of the buffer back to its input and disables the differential front-end comparator input stage by removing the power supply. The last valid data state present at the output of the buffer is thus latched back to its input to allow static leakage current testing of down-stream circuitry without interference from the comparator drawing large static currents.

Abstract: A comparator device is designed for comparing the signal levels of first and second input signals to provide respective resultant comparator outputs independently, which comparator device is featured in avoidance of occurrence of simultaneous low levels of the comparator signals at all possible conditions of the comparator outputs. The comparator device includes first and second comparator which independently output resultant comparator outputs having either a high (H) level or a low (L) level as results of comparison of the signal levels of the first and second input signals while taking one of the input signals as a reference, and have offset characteristics and hysteresis characteristics so that the comparator outputs, either H level or L level, can be fixedly determined when the first and second input signal levels are equal to each other.

Abstract: The low power voltage comparator with hysteresis includes a comparator (10) that is operable to receive the output from a battery (14) on the positive input thereof and the output of a battery (16) on the negative input thereof. An offset circuit (22) is provided in series with the voltage of the battery (14) and the comparator (10), and an offset circuit (24) is provided between the battery (16) and the comparator (10). The offset circuits (22) and (24) are adjustable by a hysteresis control circuit (26) to offset the voltage thereof for the non-selected battery to be higher than that for the selected battery such that the voltage drop across the offset for the non-selected battery is greater than that for the selected battery. When the voltage on the selected battery falls below the offset voltage of the non-selected battery, the hysteresis control then decreases the offset upon selecting the other battery and increases the offset or the battery that is deselected.

Abstract: A switching circuit has input terminals, switching MOS transistors, and a control circuit having a control terminal. Diodes are connected between the respective input terminals and the control circuit. When input voltage (V1, V2) are applied to the input terminals, the output terminal is selectively put in either a fixed or a floating state according to the voltage applied to the control terminal.