Abstract: Receiver and digital demodulation circuitry for an external controller for communicating with an implantable medical device (IMD) is disclosed. A Digital Signal Processor (DSP) is used to sample received analog data transmitted from the IMD at a lower rate than would otherwise be required for the frequency components in the transmitted data by the Nyquist sampling criteria. To allow for this reduced sampling rate, the incoming data is shifted to a lower intermediate frequency using a switching circuit. The switching circuit receives a clock signal, which is preferably but not necessarily the same clock signal used by the DSP to sample the data. The switching circuit multiplies the received data with the clock signal to produce lower intermediate frequencies, which can then be adequately sampled at the DSP at the reduced sampling rate per the Nyquist sampling criteria.

Abstract: A low noise detection system is disclosed in which a modulator located in a transmitter or a receiver is configured to convert a voltage data signal to a frequency signal, to modulate a baseband signal with the voltage data, and to output the modulated data signal. The receiver further includes a log detection amplifier configured to receive the modulated data signal and to regeneratively demodulate the modulated data signal to extract the data in an amplified analog data signal while not significantly amplifying any noise in the modulated data signal. The receiver further includes a digital conversion circuit for converting the amplified analog signal into a digital data signal.

Abstract: Provided are a bandpass sampling receiver and a filter design and reconfiguration method thereof. The bandpass sampling receiver includes: an analog-digital converter converting an analog wireless signal into a digital baseband signal; and a complex baseband signal extraction unit generating a first path signal and a second path signal from the digital baseband signal and extracting a complex baseband signal using a relative sample delay difference between the first and second path signals, wherein the first path signal is a down sampled signal after the digital baseband signal is sample-delayed and the second path signal is a down sampled signal without sample-delaying the digital baseband signal.

Abstract: A method and a device for determining an amplitude noise and/or phase noise contained within a signal performs a quadrature mixing of the signal containing the amplitude noise and/or the phase noise into the baseband or intermediate-frequency band and an amplitude demodulation downstream of the quadrature mixing in order to determine the amplitude noise contained within the signal and a phase demodulation downstream of the quadrature mixing in order to determine the phase noise contained within the signal.

Abstract: A multi-stimulus controller for a multi-touch sensor is formed on a single integrated circuit (single-chip). The multi-stimulus controller includes a transmit oscillator, a transmit signal section that generates a plurality of drive signals based on a frequency of the transmit oscillator, a plurality of transmit channels that transmit the drive signals simultaneously to drive the multi-touch sensor, a receive channel that receives a sense signal resulting from the driving of the multi-touch sensor, a receive oscillator, and a demodulation section that demodulates the received sense signal based on a frequency of the receive oscillator to obtain sensing results, the demodulation section including a demodulator and a vector operator.

Abstract: The method includes selecting, by control hardware, a first output from a phased locked loop, sending, by the control hardware, the first output from the phased locked loop to a first device under test and a second device under test, and adjusting, by the control hardware, a first phase rotator connected to the first device under test to a first rotator phase value of zero; determining a collection of phase detector values of a phase detector connected to the second device under test by adjusting a second phase rotator connected to the second device under test to sweep through a phase range and measuring the phase detector values of the phase detector; determining a phase detector gain of the phase detector by averaging the collection of phase detector values and storing, by the control hardware, the phase detector gain in memory hardware.

Abstract: The invention provides a receiver associated with a body, e.g., located inside or within close proximity to a body, configured to receive and decode a signal from an in vivo transmitter which located inside the body. Signal receivers of the invention provide for accurate signal decoding of a low-level signal, even in the presence of significant noise, using a small-scale chip, e.g., where the chip consumes very low power. Also provided are systems that include the receivers, as well as methods of using the same.

Abstract: A receiver unit comprising a mixer, a test signal unit, a multiplexer unit, an amplifier unit, a signal strength unit, and a digital control unit is described. The mixer may be arranged to downconvert a received radio-frequency signal to an intermediate frequency, thereby generating a reception signal having the intermediate frequency. The multiplexer unit may be connected to the mixer and to the test signal unit and arranged to select, among the reception signal and a test signal, a multiplexer output signal in dependence on an operating signal. The amplifier unit may be connected to the multiplexer unit and arranged to amplify the multiplexer output signal, thereby generating an amplified signal. The signal strength unit may be connected to the amplifier unit and arranged to generate a signal strength indicator indicative of a signal strength of the amplified signal.

Abstract: A storage unit stores a first lookup table including a plurality of correction coefficients for I codes, and stores a second lookup table including a plurality of correction coefficients for Q codes. Each of the correction coefficients for I codes and each of the correction coefficients for Q codes are complex numbers. A distortion compensation unit compensates, with one of the plurality of correction coefficients for I codes, distortion of an I code of a transmission signal to generate a first input signal, outputs the first input signal to an SCPA for I codes. The distortion compensation unit compensates, with one of the plurality of correction coefficients for Q codes, distortion of a Q code of the transmission signal to generate a second input signal, and outputs the second input signal to an SCPA for Q codes.

Abstract: Apparatus and method for performing entirely digital timing recovery for high bandwidth radio frequency communications. The received digital data source can be sampled from any (minimum 2×) non-integer oversampled transmitted data. This method re-samples the data through interpolation and phase adjustment. The output phase error adjusts the receiver's Analog-to-digital Convertor sampling clock to improve synchronization with the transmitter's Digital-to-analog Convertor clock phase, thus improving transmitted symbol recovery.

Abstract: In one aspect, the invention provides a method implemented by an analog hardware circuit for fast frequency estimation. The analog circuit may be implemented a main oscillator circuit block [100], a P matrix circuit block [102], a K matrix circuit block[104], and a sigma integrator circuit block [106]. From input signals [108] having unknown frequency, amplitude and phase, the analog hardware circuit generates estimates of state variables xi, x2, x3 of a model oscillator, and outputs a sinusoidal estimate [110] of the model oscillator signal. The analog hardware circuit generates the estimates by implementing in continuous time an extended Kalman filter that relates a generating frequency 107 of the model oscillator to x3 by an affine transformation ?=?0+£x3, where k is a slope of a frequency error estimate and coo is a best estimate input signal frequency.

Abstract: Apparatus and method for performing entirely digital timing recovery for high bandwidth radio frequency communications. The received digital data source can be sampled from any (minimum 2×) non-integer oversampled transmitted data. This method re-samples the data through interpolation and phase adjustment. The output phase error adjusts the receiver's Analog-to-digital Convertor sampling clock to improve synchronization with the transmitter's Digital-to-analog Convertor clock phase, thus improving transmitted symbol recovery.

Abstract: Disclosed herein are a system and method for three-dimensional vibration measurement. The method includes measuring vibration components and shape information at a vibration measurement point of a measurement target by sequentially emitting laser beams to the vibration measurement point of the measurement target at each of three measuring positions for measuring vibration of the measurement target; obtaining transformation matrices between first to third coordinate systems with respect to each of the measuring positions and a local coordinate system with respect to the vibration measurement point of the measurement target, based on the shape information; measuring angles between unit vectors of respective axes of the local coordinate system and direction vectors of the laser beams emitted with reference to the first to third coordinate systems upon measuring the vibration components; and measuring three-dimensional vibration of the measurement target based on the vibration components and the angles.

Abstract: A method of digital modulation comprises generating a stream of modulation symbols in order to produce a modulated signal. The modulation symbols belong to a multi-ring digital signal constellation having all signal points placed on at least two concentric rings. The total number of signal points is larger than 8, and at least one ring has unequally spaced points constructed to form together with at least one neighbouring ring a subset of neighbouring rings. Each signal point of the subset has a unique angular coordinate modulo 2? and the angular spacing of the signal points of the subset is uniform.

Abstract: A low voltage quadrature phase wideband relaxation oscillator. An ultra-wideband tuning range from Mega to Giga Hz order is also realized by tuning the I/Q coupling factor, zeros and poles. Preferably, a novel synchronous quadrature injection lock is proposed to validate low noise performance.

Abstract: A UWB receiver with time drift correction. After a frequency translation by a quadrature demodulator, a pulsed UWB signal received is integrated on successive time windows, and then sampled. A phase shift estimator determines a phase difference between samples separated by a multiple of the sampling period approaching the period of the pulses of the signal. A controller deduces from this phase difference a time offset to be applied to integrators to synchronize the receiver on the signal received.

Abstract: A receiver (100) has an ln-phase path (l-path) (101) that delivers a digital l-path signal x1(t) and a Quadrature path (Q-path) (103) that delivers a digital Q-path signal xQ(t). The receiver (100) includes a compensation stage (124) arranged to compensate for gain error g and phase error ? between the digital l-path signal x1(t) and the digital Q-path signal xQ(t). The compensation stage (124) has a compensation coefficient generation stage (200), a compensation coefficient application stage (202), a gain control stage (208), a relative gradient generation stage (214) and a step parameter generation stage (224).

Abstract: An encoder can convert a stream of data into three or four synchronized 4-PSK signals, for 64-QAM and 256-QAM, respectively. Three or four mixers can combine the three or four synchronized PSK signals with a common local oscillator signal to form three or four respective amplifiable signals, which can all have the same amplitude. One amplifier receives a first of the amplifiable signals and powers one radiator. Two amplifiers both receive a second of amplifiable signals and power two respective radiators. Four amplifiers receive a third of the amplifiable signals and power four respective radiators. The amplifiers can all operate in near or full saturation. Each radiator radiates in one of a plurality of discrete, specified states. The radiated states from the radiators combine through far-field electromagnetic propagation and effectively sum at the receiver to mimic transmission from a single amplifier.

Abstract: A wireless communication apparatus receives a wireless signal whose phases represent data values and determines the data values represented in the phases of the wireless signal. The apparatus includes a counter that updates a count value at a frequency higher than a frequency of the wireless signal, and resets the count value to an initial value when the phase of the wireless signal changes or when the counter overflows, a capture timing setting unit that sets a phase capture value in response to a resetting of the count value, and a phase capturing unit that captures the phase of the wireless signal when the count value reaches the phase capture value.

Abstract: A method for applying test patterns to scan chains in a circuit-under-test. The method includes providing a compressed test pattern of bits; decompressing the compressed test pattern into a decompressed test pattern of bits as the compressed test pattern is being provided; and applying the decompressed test pattern to scan chains of the circuit-under-test. The actions of providing the compressed test pattern, decompressing the compressed test pattern, and applying the decompressed pattern are performed synchronously at the same or different clock rates, depending on the way in which the decompressed bits are to be generated. A circuit that performs the decompression includes a decompressor such as a linear finite state machine adapted to receive a compressed test pattern of bits. The decompressor decompresses the test pattern into a decompressed test pattern of bits as the compressed test pattern is being received.

Abstract: A multi-stimulus controller for a multi-touch sensor is formed on a single integrated circuit (single-chip). The multi-stimulus controller includes a transmit oscillator, a transmit signal section that generates a plurality of drive signals based on a frequency of the transmit oscillator, a plurality of transmit channels that transmit the drive signals simultaneously to drive the multi-touch sensor, a receive channel that receives a sense signal resulting from the driving of the multi-touch sensor, a receive oscillator, and a demodulation section that demodulates the received sense signal based on a frequency of the receive oscillator to obtain sensing results, the demodulation section including a demodulator and a vector operator.

Abstract: An important component in digital circuits is a phase rotator, which permits precise time-shifting (or equivalently, phase rotation) of a clock signal within a clock period. A digital phase rotator can access multiple discrete values of phase under digital control. Such a device can have application in digital clock synchronization circuits, and can also be used for a digital phase modulator that encodes a digital signal. A digital phase rotator has been implemented in superconducting integrated circuit technology, using rapid single-flux-quantum logic (RSFQ). This circuit can exhibit positive or negative phase shifts of a multi-phase clock. Arbitrary precision can be obtained by cascading a plurality of phase rotator stages. Such a circuit forms a phase-modulator that is the core of a direct digital synthesizer that can operate at multi-gigahertz radio frequencies.

Abstract: Methods, apparatuses, and systems are provided for generating a candidate search set for ML detection of 2n-QAM signals transmitted on two or more MIMO spatial streams. A method includes estimating an initial solution yq for a received 2n-QAM symbol value b0b1 . . . bn-1, wherein all possible 2n-QAM symbol values are Gray-mapped constellation points; and performing an iteration for each hypothetical value of each bit position i of the initial solution yq, wherein each iteration comprises: determining a search center as: if ith bit of the initial solution equals the hypothetical value assumed for the current iteration, the initial solution yq; or if ith bit of the initial solution does not equal the hypothetical value assumed for the current iteration, a mirror constellation point yqc to the initial solution yq; and searching outward from the determined search center for candidate constellation points.

Abstract: A system and method including a parity bit encoder for encoding each n bits of data to be transmitted with a parity check bit to produce blocks of n+1 bits (n information bits plus one parity bit associated with the n information bits). Each of the blocks of n+1 bits are Gray mapped to a plurality of associated QAM symbols that are modulated onto an optical wavelength and transmitted to a receiver. A maximum a posteriori (MAP) decoder is used at the receiver to correct for cycle slip. Phase errors of 180 degrees may be detected by independently encoding odd and even bits prior to Gray mapping, and identifying errors in decoding odd numbered bits at the receiver.

Abstract: Communication systems are described that use geometrically shaped constellations that have increased capacity compared to conventional constellations operating within a similar SNR band. In several embodiments, the geometrically shaped is optimized based upon a capacity measure such as parallel decoding capacity or joint capacity. In many embodiments, a capacity optimized geometrically shaped constellation can be used to replace a conventional constellation as part of a firmware upgrade to transmitters and receivers within a communication system. In a number of embodiments, the geometrically shaped constellation is optimized for an Additive White Gaussian Noise channel or a fading channel. In numerous embodiments, the communication uses adaptive rate encoding and the location of points within the geometrically shaped constellation changes as the code rate changes.

Abstract: An apparatus for demodulating an input signal that includes a frequency detector for tracking a frequency of the input signal, an oscillator and a mixer is disclosed. The input signal and an output signal of the oscillator can constitute the incoming signals for the mixer and the output signal of the mixer can constitute the demodulated input signal, wherein an arithmetic unit is arranged downstream of the frequency detector and upstream of the oscillator, wherein the tracked frequency of the input signal and a predefined second frequency constitute the incoming signals of the arithmetic unit and the arithmetic unit is designed such that it computes a control signal for the oscillator from the tracked frequency of the input signal and the predefined second frequency with the output signal of the oscillator depending on the control signal.

Abstract: Demodulation circuits and processes for demodulating touch signals from a touch sensor using the demodulation circuits are provided. The demodulation circuits can include circuitry configured to determine an adjustable phase delay based at least in part on a quadrature component of the touch signal or the phase-adjusted touch signal. The demodulation circuit can further include circuitry for applying the adjustable phase delay to the touch signal to compensate for phase delays in the touch signal caused by the touch sensor and/or other components. The demodulation circuit can dynamically change the adjustable phase delay to compensate for time-varying phase delays caused by the touch sensor and/or other components.

Abstract: Systems and methods are disclosed for feeder link configurations to layered modulation. One feeder link system employs feeder link spot beam to antennas in distinct coverage areas to enable frequency reuse. Another system employs narrow beam width feeder link antenna to illuminate individual satellites also enabling frequency reuse. Yet another system uses layered modulation in the feeder link. Another feeder link system employs a higher order synchronous modulation for the satellite feeder link than is used in the layered modulation downlink signals.

Abstract: A digital data signal, such as a digital video signal, is intentionally pre-distorted before being sent over a network. In one embodiment, this pre-distortion may be performed in accordance with a pre-distortion pattern or algorithm which is shared with only intended receivers. The pre-distortion pattern may be used to vary the pre-distortion on a periodic basis, as frequently as on a symbol-by-symbol basis. The pre-distortion function may include distorting the phase and/or the amplitude of the digital signal's modulation.

Abstract: A method and system is provided for communicating distinct data over a single frequency using on-off keying, a form of amplitude modulation, or phase changes timed to the zero crossing point of the carrier. A data signal is synchronized with the carrier by adding padding bits so that the number of bits is equal to the frequency of the carrier. The carrier is then modified by attenuating the carrier as needed once per cycle. Said carrier is then transmitted. The resulting transmitted carrier carries a number of bits equal to the transmit frequency. At the receive end, the received signal is compared to a sine wave to determine if the incoming signal is at full strength or at reduced strength, allowing for the detection of encoded digital information. In a another embodiment, the phase of the carrier is changed instead of attenuating the carrier, timed to the carrier cycles, once or twice per cycle.

Abstract: A phase-shift keying (PSK) demodulator and a smart card including the same are disclosed. The PSK demodulator includes a delay circuit and a sampling circuit. The delay circuit generates a plurality of clock signals by delaying the input signal. The sampling circuit samples the input signal in response to the clock signals, and generates output data.

Abstract: A method for transmitting, by a transmitting terminal, data to a receiving terminal in a wireless communication system includes: generating a first detection field including symbols modulated by using a BPSK data tone; generating a second detection field including symbols modulated such that an even numbered subcarrier and an odd numbered subcarrier have a phase difference of 90 degrees; generating a data packet including the first detection field, the second detection field, and the data; and transmitting the data packet.

Abstract: Methods, systems and software are provided for high order signal modulation based on improved signal constellation and bit labeling designs for enhanced performance characteristics, including decreased power consumption. According to the improved signal constellation and bit labeling designs for enhanced performance characteristics, designs for 8-ary, 16-ary, 32-ary and 64-ary signal constellations are provided. According to an 8-ary constellation, improved bit labeling and bit coordinates are provided for a 1+7APSK signal constellation. According to a 16-ary constellation, improved bit labeling and bit coordinates are provided for a 6+10APSK signal constellation. According to three 32-ary constellations, improved bit labeling and bit coordinates are provided for a 16+16APSK signal constellation and two 4+12+16APSK signal constellations.

Abstract: A receiver system for early detection of a segment type of an input signal based on BPSK and DBPSK modulated carriers is provided. The receiver system includes a tuner that converts the input signal into an intermediate frequency (IF) signal, a signal conditioning module that converts the IF signal into a baseband signal, a Frequency Domain Synchronization (FDS) block that detects the segment type of the input signal based on a carrier powers, a Transmission and Multiplexing Configuration Control (TMCC) decode block that performs a decoding operation on the received signal, a channel estimation block that estimates a channel and obtains a channel information. The TMCC decode block uses the channel information obtained from channel estimation block to correct a fast-frequency selective fading on the received signal before the decoding operation.

Abstract: A method includes demodulating a load modulated signal at an initiator device based at least partially on a phase adjusted comparison value corresponding to the load modulated signal.

Abstract: Apparatus and methods for QAM modulation are disclosed using dual polar modulation. QAM modulation of a signal is accomplished by translating a QAM signal into two phasors having the same or constant amplitude and then phase shifting one of the phasor by 180 degrees for a differential load. The phasors are then polar modulated such that, when differentially combined in the load through summation or superposition, a QAM modulated symbol results. The use of constant amplitude phasors when power amplified for transmission of QAM modulated signals allows amplifiers to be operated in a saturation mode with greater efficiency than conventional amplifiers used in QAM modulation, which operate in a less efficient linear mode to effect amplitude modulation. Additionally, differential combining of the phasors affords relaxation of the turns of a transformer used in amplifying the phasors.

Abstract: A receiving circuit, a transmitting circuit, a micro-controller, and a method for power line carrier communication. The receiving circuit includes: an analog amplifier, a receiving filter, an analog-to-digital converter, a digital mixer, a digital filter, and a digital demodulator connected successively. The transmitting circuit includes: a digital modulator, a gain controller, a digital-to-analog converter, a transmitting filter, and a transmitting amplifier connected successively. The micro-controller includes a central processor and the receiving circuit or the transmitting circuit. The method for power line carrier communication can be implemented based on the receiving circuit or the micro-controller.

Abstract: A remote data acquisition, transmission and analysis system including handheld wireless equipment to obtain operational data and the status of remote machines is disclosed. A plurality of application controllers are interfaced with the remote machines from which operation data is acquired by the application controllers. The application controllers communicate with an application host via a local area network. The application host may communicate with a network operations center using a wide area network. The handheld wireless equipment may be used to obtain operational information for each remote machine from the network operations center.

Abstract: In a symbol mapping method, transmission data is encoded to generate information bits and redundancy bits. An average LLR value of bits on which the information bits are mapped is different from an average LLR value of bits on which the redundancy bits are mapped.

Abstract: A method (500) of demodulation, the method comprising the steps of receiving (510) a radio frequency signal, converting (520) the received radio frequency signal to a baseband signal, performing (530) symbol timing recovery on the baseband signal, and demodulating (540) the baseband signal. The baseband signal comprises alternating symbols spaced therebetween at an alternating first interval length and a second interval length, where the first interval length and second interval length are dissimilar. Communication units and a method of modulation are also described.

Abstract: The device is used for decoding convolution-encoded reception symbols. In this context, transmission data are modulated with a modulation scheme to form symbols, which are encoded with a transmission filter to form convolution-encoded transmission symbols. A convolution-encoded transmission symbol contains components of several symbols arranged in time succession. These transmission symbols are transmitted via a transmission channel and received as reception symbols. The Viterbi decoder decodes the reception symbols by use of a modified Viterbi algorithm. Before running through the Viterbi decoder, the reception symbols are processed by a state-reduction device, which determines additional items of information relating to possible consequential states of the decoding independently of the decoding through the Viterbi decoder in every state of the decoding. The state-reduction device uses the additional items of information to restrict the decoding through the Viterbi decoder to given consequential states.

Abstract: A modulation apparatus performs modulation in which a signal wave form is positioned at the front part of an entire symbol duration or the latter part of the entire symbol duration based on a first bit of the bit information to generate a modulation symbol including a silent signal duration in which there is no signal waveform. Particularly, the method delays a signal corresponding to a quadrature-phase signal axis by a predetermined time, thereby cancelling a phase difference between symbols.

Abstract: A multi-carrier linear equalization receiver, e.g., a RAKE receiver or chip equalization receiver, is described herein. The multi-carrier receiver distributes processing delays among a plurality of received carriers based on a comparison between the signal-to-interference ratios (SIRs) determined for each carrier. The receiver initially allocates a minimum number of processing delays to each carrier. In one embodiment, any remaining additional processing delays are distributed evenly between the carriers when a comparison between the largest and smallest SIR is less than or equal to a threshold. In another embodiment, the remaining additional processing delays are distributed to favor the carrier(s) with the strongest SIR(s) when the comparison between the largest and smallest SIR exceeds the threshold.

Abstract: A signal modulator includes a discriminator for discriminating a modulation technique through which a carrier signal was modulated to a quasi audio signal and a signal demodulation module for reproducing a continuous data stream from the quasi audio signal through a demodulating technique corresponding to the discriminated modulation technique; the discriminator includes a sampling circuit for extracting groups of samples from the quasi audio signal during each period of the carrier signal, an integrator calculating an integrated value on each group of samples, a comparator comparing the integrated value with a threshold for a neighborhood of zero so as to determine the groups of samples with the integrated value less than the threshold and a determiner measuring the time period between the groups of two modulation period and discriminating 16DPSK when the time period is equal to the modulation period.

Abstract: The present invention discloses a transmission method and apparatus for a wireless communication system. The data transmission method comprises the following steps. A first data mapped in a QAM constellation pattern is transmitted in a first transmission. And a second data, which is reversion of the first data and mapped in said QAM constellation pattern, is retransmitted. In embodiment, the interleaved data is partially swapped based on a predetermined swapping pattern. In another embodiment, first interleaved data and second interleaved data are multiplexed per N bits, N is an integer larger than 1. Therefore, improvement of reliability at first transmission or retransmission in a wireless communication system can be achieved.

Abstract: A combination equalizer and automatic gain control (AGC) is provided for high-speed receivers. The combination circuit comprises a first AGC having an input to accept a communication signal and an input to accept a first control signal. The first AGC modifies the communication signal gain in response to the first control signal, to supply a first stage signal at an output. An equalizer has an input to accept the first stage signal and an input to accept a second control signal. The equalizer modifies the frequency characteristics of the first stage signal in response to the second control signal, to supply an equalized signal at an output. A second AGC has an input to accept the equalized signal and an input to accept a third control signal. The second AGC modifies the equalized signal gain in response to the third control signal, to supply a second stage signal at an output.

Abstract: A receiver is provided. The receiver includes a differential amplifier amplifying differential input signals input to input terminals and outputting differential output signals through output terminals and an oscillator connected to the output terminals of the differential amplifier. The differential amplifier and the oscillator operate alternatively in response to an enable signal.

Abstract: A system and method for signal mismatch compensation in a wireless receiver is disclosed. The method includes receiving an in-phase (I) signal and a quadrature (Q) signal corresponding to the I signal, the Q signal having an ideal phase offset of 90 degrees from the I signal, where there is a phase and gain mismatch between the I signal and Q signal. The method adjusts the phase offset between the I signal and the Q signal to minimize the IQ power, where the IQ power is the average-time power of a digital baseband in-phase (DB-I) signal and a digital baseband quadrature (DB-Q) signal, corresponding to the I signal and Q signal, respectively. The method adjusts the gain of the Q signal to minimize the IQ power, whereby the phase and gain mismatch between the I signal and Q signal is minimized.

Abstract: In one embodiment, a circuit provides two quadrature components, I and Q, from a received modulated signal, from three mutually phase-shifted components of the received signal. The circuit can demodulate three mutually phase-shifted components of a baseband signal, in order to provide two quadrature demodulation components. The circuit includes three circuit inputs, each designed to received said three components, respectively. The circuit further includes a first and second adder circuit. The circuit also includes a bank of weighting circuits linked, at input, to the three circuit inputs and linked, at output, to the inputs of the first and second adder circuits so as to transmit to each adder input, with a determined weighting, a particular one of said three components, the weightings being chosen so that the first and second adder circuits provide said two quadrature demodulation components.

Abstract: A radio receiver comprising: an antenna for receiving a radio frequency signal amplitude modulated with an audio frequency signal; a digitizer for periodically sampling the radio frequency signal and generating a digital reception signal representative of the amplitude of the radio frequency signal; and a demodulator for demodulating the digital reception signal to generate a representation of the audio frequency signal.