With Parallel Signal Combiners (e.g., Costas Loop) Patents (Class 329/308)
  • Patent number: 10365749
    Abstract: An example a processing system for a capacitive sensing device includes a reference transmitter coupled to a reference capacitance. The processing system further includes a charge accumulation circuit having an input coupled to the reference transmitter through the reference capacitance and configured to generate an integrated signal, a demodulator circuit having an input coupled to an output of the charge accumulation circuit and configured to demodulate the integrated signal to generate at least one demodulated signal, a sampling circuit having an input coupled to an output of the demodulator circuit and configured to sample the demodulated signal(s), a first reference buffer coupled to an output of the sampling circuit, the first reference buffer outputting a first voltage reference for the capacitive sensing device, and a second reference buffer coupled to the output of the sampling circuit, the second reference buffer outputting a second voltage reference for the capacitive sensing device.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: July 30, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Farzaneh Shahrokhi, Adam L. Schwartz
  • Patent number: 10333565
    Abstract: A transmitter for a high speed serial communications link, a serial communications link, and a receiver for a high speed serial communications link are disclosed herein. In one embodiment, the transmitter includes: (1) a communications interface connected to a transmission medium having multiple lanes, and (2) a safe mode circuit coupled to the communications interface and configured to send data over the transmission medium in a safe mode, wherein in the safe mode at least one of the lanes is dedicated to transmitting a link detect signal for link detection.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: June 25, 2019
    Assignee: Nvidia Corporation
    Inventors: Dennis Ma, Marvin Denman, Eric Tyson, Stephen D. Glaser
  • Patent number: 10326584
    Abstract: A device, a circuit and a method are disclosed herein. The device includes a data receiving circuit and an oscillating signal generator. The data receiving circuit is configured to output a first output signal, a second output signal, and a phase error signal according to an oscillating signal and a modulated signal, in which the phase error signal indicates a phase difference between the oscillating signal and the modulated signal. The oscillating signal generator is configured to delay a phase of a first reference signal according to the phase error signal, to generate the oscillating signal.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: June 18, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Neng Chen, William Wu Shen, Lan-Chou Cho, Feng-Wei Kuo, Chewn-Pu Jou
  • Patent number: 10286735
    Abstract: A reliable and precise measurement of tire tread wear, by using wide-band (UWB) pulses and analyzing the signature obtained by reflection of these pulses from the tread, in order to deduce its state of wear therefrom. The tire wear monitoring device (100) includes a control unit (110) for signal control and data processing, this control unit (110) being coupled to a generator of ultra wide band or UWB signals (120), which is itself coupled to an antenna for incident UWB pulse transmission (140), and an antenna for receiving the UWB pulses (150) reflected from at least one interface of the tire tread, the reception antenna (150) being coupled to a pulse signal receiver (180) which is itself coupled to the control unit (110).
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: May 14, 2019
    Assignees: CONTINENTAL AUTOMOTIVE FRANCE, CONTINENTAL AUTOMOTIVE GMBH
    Inventors: Nicolas Guinart, Rachid Benbouhout, Jean-Charles Huard
  • Patent number: 10219179
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for determining, by a first device, that a second device is within range for direct communications and that the second device is capable of performing transpositional modulation (TM) communications. Determining to use transpositional modulation to send data to the second device. Sending the data to the second device using a TM signal.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: February 26, 2019
    Assignee: TM IP Holdings, LLC
    Inventors: Richard C. Gerdes, Daniel L. Hodges, Quinn Colin McIntosh
  • Patent number: 10009167
    Abstract: A device, a circuit and a method are disclosed herein. The device includes a data receiving circuit and an oscillating signal generator. The data receiving circuit is configured to output a first output signal, a second output signal, and a phase error signal according to an oscillating signal and a modulated signal, in which the phase error signal indicates a phase difference between the oscillating signal and the modulated signal. The oscillating signal generator is configured to delay a phase of a first reference signal according to the phase error signal, to generate the oscillating signal.
    Type: Grant
    Filed: November 11, 2015
    Date of Patent: June 26, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Neng Chen, William Wu Shen, Lan-Chou Cho, Feng-Wei Kuo, Chewn-Pu Jou
  • Patent number: 9923741
    Abstract: A signal detection method that allows characterization of a modulated signal to be efficiently determined. The method comprises the steps of receiving a data signal, processing the data signal to determine its value squaring the value of the signal; filtering the squared signal value to remove DC content; evaluating the resulting signal to determine if a single sinusoidal value remains; and determining that the presence of a single sinusoidal value as the resulting signal from the squaring and filtering steps indicates that the received data signal is a phase-shift key signal or conversely that the absence of such after a given number of cycle of squaring and filtering indicates a different modulation technique is present in the signal.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: March 20, 2018
    Assignee: The United States of America as represented by Secretary of the Navy
    Inventors: Michael P. Civerolo, Nicholas T. Johnson, Nicholas A. Lumsden
  • Patent number: 9893916
    Abstract: Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: February 13, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Subhashish Mukherjee, Abhijit Anant Patki, Madhulatha Bonu, Kumar Anurag Shrivastava
  • Patent number: 9780756
    Abstract: Embodiments of radio frequency (RF) front-end circuitry are disclosed where the RF front-end circuitry includes a tunable RF filter structure and a calibration circuit. The tunable RF filter structure includes (at least) a pair of weakly coupled resonators and defines a transfer function with a passband. The calibration circuit is configured to shape the passband so that the passband defines a center frequency. Additionally, the calibration circuit is configured to detect a phase difference at the target center frequency between the pair of weakly coupled resonators and adjust the phase difference of the pair of weakly coupled resonators at the target center frequency so as to reduce a frequency displacement between the center frequency of the passband and the target center frequency. In this manner, the calibration circuit calibrates the tunable RF filter structure to correct for errors in the center frequency of the passband due to component manufacturing variations.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: October 3, 2017
    Assignee: Qorvo US, Inc.
    Inventors: George Maxim, Dirk Robert Walter Leipold, Baker Scott
  • Patent number: 9774364
    Abstract: A method for operating a transceiver includes generating, by the transceiver, a first signal that includes an estimate of an interference signal leaked from a transmit path to a receive path of the transceiver. Generating the first signal includes obtaining a baseband transmit signal that includes a baseband of a transmit signal transmitted via the transmit path. Generating the first signal also includes calculating a harmonic phase that includes a phase of a harmonic of the baseband transmit signal. Generating the first signal also includes estimating a phase shift in accordance with an envelope of the baseband transmit signal. Generating the first signal also includes determining a phase of the first signal in accordance with the estimated phase shift and the calculated harmonic phase such that interference of a receive signal received via the receive path is reduced according to the first signal.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: September 26, 2017
    Assignee: FUTUREWEI TECHNOLOGIES, INC.
    Inventor: Huei Yuan Shih
  • Patent number: 9602241
    Abstract: A computing system includes: an inter-device interface configured to communicate content; and a communication unit, coupled to the inter-device interface, configured to process the content based on a polar communication mechanism utilizing multiple processing dimensions for communicating the content, including: generating a node result with a first orthogonal mechanism, and processing the node result from the first orthogonal mechanism with a second orthogonal mechanism.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: March 21, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hessam Mahdavifar, Mostafa El-Khamy, Jungwon Lee, Inyup Kang
  • Patent number: 9473983
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for determining, by a first device, that a second device is within range for direct communications and that the second device is capable of performing transpositional modulation (TM) communications. Determining to use transpositional modulation to send data to the second device. Sending the data to the second device using a TM signal.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: October 18, 2016
    Assignee: TM IP Holdings, LLC
    Inventors: Richard C. Gerdes, Daniel L. Hodges, Quinn Colin McIntosh
  • Patent number: 9467246
    Abstract: Component signal values are derived from component signals and fed to at least one fixed equalizer which generates equalizer output signals. The signals are fed to phase error detectors generating phase error signals. The phase error signals are combined with further phase error signals derived by further error detectors receiving signal values from further equalizers and/or the component signal values directly from sample units.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: October 11, 2016
    Assignee: Xieon Networks S.a.r.l.
    Inventors: Alessandro Bianciotto, Bernhard Spinnler, Antonio Napoli, Christina Hebebrand
  • Patent number: 9455852
    Abstract: Methods, systems, and apparatus for detecting a center frequency of an input signal, the input signal including a carrier signal modulated with a modulation signal. Detecting a frequency of a second signal. Determining a difference signal between the center frequency of the input signal and the frequency of the second signal. Modifying the frequency of the second signal based on the difference signal to provide the carrier signal. And, outputting the carrier signal.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: September 27, 2016
    Assignee: TM IP Holdings, LLC
    Inventor: Richard C. Gerdes
  • Patent number: 9444470
    Abstract: A double phase-locked has a first phase-locked loop including a first narrowband loop filter configured to reduce phase noise in a first input clock, and a second phase-locked loop including a second loop filter configured to receive a second input clock from a stable clock source. The second clock has a frequency close to said first clock. The first loop has a bandwidth at least an order of magnitude less than the second loop. A coupler couples the first and second phase-locked loops to provide a common output. The double phase-locked loop can be used, for example, to provide time-of-day information in wireless networks or as a fine filter for cleaning phase noise from clock signals recovered over telecom/datacom networks.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: September 13, 2016
    Assignee: Microsemi Semiconductor ULC
    Inventor: Slobodan Milijevic
  • Patent number: 9401825
    Abstract: A channel estimation apparatus includes a de-map circuit to map multiple preambles corresponding to multiple channels into real part (I) and imaginary part (Q) in QPSK coordinate. The costas channel estimation circuit receives the real part (I) and the imaginary part (Q) to operate corresponding to one of the BPSK structure and the QPSK structure to proceed calculation of (Q?I)*Sign (I+Q) or Q*Sign (I)?I*Sign (Q) for outputting an output value, wherein Sign(x) represents a sign circuit taking a sign of the x value. The loop filter circuit filters the output value under time domain. The smooth circuit receives the output of the loop filter circuit to perform smooth processing under frequency domain and then feeds back the same to the de-map circuit to continue channel estimation of a next loop, wherein the phases of the preambles are adjusted according to a direction of the output value approaching to zero.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: July 26, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Ho Lu, Chi-Tien Sun
  • Patent number: 9385731
    Abstract: A phase-locked loop (PLL) is provided. The PLL comprises a clock adjuster configured to receive an initial clock signal having an initial frequency and a mode control signal. The clock adjuster is configured to modify the initial clock signal into a modified clock signal based on the mode control signal. The PLL is configured such that a loop bandwidth is equal to a specified bandwidth. When the modified clock signal is changed, a loop gain of a loop filter is adjusted such that the loop bandwidth is substantially equal to the specified bandwidth. When the modified clock signal is changed, an oscillator tuning word (OTW) signal is modified into a normalized OTW signal such that the loop bandwidth is substantially equal to the specified bandwidth.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: July 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Feng Wei Kuo, Kuang-Kai Yen, Huan-Neng Chen, Lee Tsung Hsiung, Chewn-Pu Jou, Robert Bogdan Staszewski
  • Patent number: 9313018
    Abstract: Apparatus and method for performing low cost analog clock recovery within a high bandwidth radio frequency communications system. An analog data source is passed through a squaring loop typically utilized for carrier recovery. A squaring loop consists of an analog mixer to multiply one component of the complex signal with itself, a bandpass filter and phase lock loop. The addition of nonlinear gain compression enables clock recovery for higher order modulation schemes to exploit the fundamental phase differences of the individual components that construct the received signal. The output of the phase lock loop drives the Analog-to-Digital converter. It is desired that this signal converges to the symbol clock's frequency and phase of the transmitter, thereby sampling the received baseband signal at the desired symbol levels.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: April 12, 2016
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Stephen C. Tyler, Nathaniel W. Rowe, Gerard F. Wohlrab, III
  • Patent number: 9264054
    Abstract: An apparatus includes a lock detect circuit configured to receive a phase detect signal and generate a lock signal according to the phase detect signal. The phase detect signal is a single bit signal having a first value or a second value. A method includes receiving a phase detect signal using a lock detect circuit, and generating a lock signal according to the phase detect signal. The phase detect signal is a single bit signal having a first value or a second value.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: February 16, 2016
    Assignee: MARVELL INTERNATIONAL LTD.
    Inventor: Ross Swanson
  • Patent number: 9203667
    Abstract: A circuit and a method for removing a frequency offset and a communication apparatus including the circuit, capable of removing the frequency offset by tracking rapidly and accurately in a payload section. A sequence of sample levels is obtained by sampling a frequency level of the baseband signal at every 0.5 symbol interval. Absolute values of differences between the frequency levels adjacent to each other at every 1 symbol are calculated as first difference absolute values. Absolute values of differences between the frequency levels adjacent to each other at every 1 symbol are calculated as second difference absolute values. When the first difference absolute values are greater than a predetermined first determination value or the second difference absolute values are less than a predetermined second determination value, the average value calculated is set as the frequency offset.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: December 1, 2015
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Koutaro Mizuno
  • Patent number: 8824606
    Abstract: A receiver unit of a communication device can employ multiple correlators for decoding the access address of a packet received from another communication device. A dynamically determined primary frequency offset is applied to a phase difference signal that is determined from an RF signal that comprises the packet. For each of a plurality of access address decoding chains of the receiver unit, a secondary frequency offset associated with the access address decoding chain is applied to the phase difference signal, the phase difference signal is correlated with a predetermined access address of the communication device, and a resultant correlation output is compared against a correlation threshold. One of the access address decoding chains that generated the correlation output that is greater than the correlation threshold is selected and the packet is demodulated based, at least in part, on the phase difference signal corresponding to the selected access address decoding chain.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: September 2, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Hao-Jen Cheng, Qinfang Sun
  • Patent number: 8576963
    Abstract: A non-coherent detection apparatus includes, inter alia, a correlation unit, a frequency offset estimator, and a signal detector. The correlation unit obtains a differential phase signal by multiplying a complex conjugate value of a delay signal obtained by delaying a received signal by (N+1) chips by the received signal, sums-up resultant values obtained by multiplying each component of the differential phase signal by each component of a correlation sequence and outputs a correlation signal. The frequency offset estimator estimates a frequency offset based on a value obtained by accumulatively summing-up the correlation signals corresponding to preamble portions of the received signal. The signal detector detects an original signal from the received signal based on a size of a real-number part of a resultant value obtained by multiplying the frequency offset estimated by the frequency offset estimator by the correlation signal corresponding to a PHY payload portion of the received signal.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: November 5, 2013
    Assignee: Chung-Ang University Industry-Academy Cooperation Foundation
    Inventors: Tae-Gyu Chang, Hyeon-Jin Jeon, Tanee Demeechai
  • Patent number: 8265192
    Abstract: A multilevel QAM demodulator includes a phase difference calculation unit calculating a phase difference signal based on the common phase signal and orthogonal signal after the phase rotation compensation, a phase shift amount calculation unit calculating a phase shift amount indicating a degree of a phase shift based on the common phase signal and orthogonal signal after the phase rotation compensation and phase noise compensation, and a correction unit correcting the phase difference signal based on the phase shift amount. A phase rotation is performed for the phase noise compensation based on the phase difference signal corrected by the correction unit.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: September 11, 2012
    Assignee: NEC Corporation
    Inventor: Yuuzou Suzuki
  • Patent number: 7956694
    Abstract: A modified Costas control loop (80) using switched analog low pass filters (R2, C1, C2) (R3, C3, C4) and rectangular to polar conversion (341) computes an angular phase reference error that is processed by a digital loop filter (342) to control a counter (441) and a state machine (442) that are used to control the gating of a controllably conductive circuit (84) interposed between an AC source (81) and a phase-controlled load (83) such as a dimmable lamp.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: June 7, 2011
    Inventor: Jeffrey D. Wilson
  • Patent number: 7899137
    Abstract: A Global Positioning System (GPS) receiver integrated with a cellular phone system, comprising a single-balanced mixer, a poly phase filter, a channel select filter, an analog-to-digital converter, a reference frequency source, and a PLL unit is disclosed. The single-balanced mixer downconverts a GPS signal to generate an in-phase signal I and a quadrature signal Q. The poly phase filter generates an IF signal based on the in-phase signal I and the quadrature signal Q. The channel select filter receives the IF signal to filter unwanted channel signals. The analog-to-digital converter converts the signal from the channel select filter to a digital output signal. The reference frequency source provides a reference frequency to the analog-to-digital converter. The PLL unit receives the reference frequency for generating a clock signal to the single-balanced mixer for downconversion.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: March 1, 2011
    Assignee: Mediatek Inc.
    Inventors: Chang-Fu Kuo, Min Jie Wu, Beng Hwee Ong, Wee Liang Lien
  • Patent number: 7728657
    Abstract: A Phased Locked Loop (PLL) circuit includes: a clock signal generating unit for generating a first clock signal and a second clock signal of which the phase differs from the first clock signal by ?/2; a computing unit for computing first phase comparison results showing the results of comparing the phases of a signal wherein the first clock signal is subjected to phase shifting with the PSK modulation signal and second phase comparison results showing the results of comparing the phases of a signal wherein the second clock signal is subjected to phase shifting with the PSK modulation signal based on first and second parameters, the first clock signal, the second clock signal, and the PSK modulation signal; a control direction setting unit for virtually controlling the control angle; a parameter control unit; and a reading control unit for controlling the timing of reading data from the PSK modulation.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: June 1, 2010
    Assignee: Sony Corporation
    Inventor: Masato Kita
  • Patent number: 7561638
    Abstract: A demodulation apparatus that can support various oscillation frequencies. The portable phone device includes a frequency synthesizer for generating a local-oscillation signal having a local oscillation frequency for converting the frequency of an input receiving signal into an intermediate frequency based on an oscillation signal generated by an TCXO and a synchronization hold portion provided with an NCO for generating a signal having a predetermined frequency based on the oscillation signal generated by TCXO. The frequency synthesizer makes the local oscillation frequency variable by setting the dividing ratio variable in accordance with an arbitrary oscillation frequency so that the intermediate frequency remains within a predetermined range regardless of the oscillation frequency, and an NCO makes the frequency of the signal variable by setting the dividing ration variable in accordance with the oscillation frequency.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: July 14, 2009
    Assignee: Sony Corporation
    Inventors: Katsuyuki Tanaka, Masayuki Sawada, Hideki Takahashi, Koichiro Teranishi
  • Patent number: 7486131
    Abstract: In a receiving section, a first mixer and a second mixer generate an I signal and a Q signal from a modulated reception signal, a local signal, and a local signal obtained by shifting a phase by 90 degrees. These I signal and Q signal are supplied to a digital signal processing section via a low path filter, a capacitor, a variable gain amplifier, and an ADC. In addition, the generated I signal and Q signal are directly supplied to the digital signal processing section. The digital signal processing section detects a sign of the I signal and a sign of the Q signal, the signals being directly input. In addition, the detected sign of the I signal is multiplied with the I signal input from the ADC, and then, the detected sign of the Q signal is multiplied with the Q signal input from the ADC, whereby the signs are commonly established in a positive state. Then, the I signal and the Q signal are added, and decoded into two-values.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: February 3, 2009
    Assignee: Toshiba Tec Kabushiki Kaisha
    Inventors: Nobuo Murofushi, Sadatoshi Oishi
  • Patent number: 7469022
    Abstract: Methods and apparatuses employing symmetrical phase-shift keying (SPSK) for data modulation and demodulation. Each symbol in a transmission signal carries n-bit information and is transmitted with one of 2n+1 directions. Half directions among the 2n+1 directions are regarded as default directions and the remaining are regarded as complementary directions. Each default direction has a corresponding complementary direction with a phase difference of ? and representing the same n-bit information as the default direction. The phase difference between any two successive symbols after modulation is less than or equal to ?/2.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: December 23, 2008
    Assignee: Via Technologies, Inc.
    Inventor: Chin Lee
  • Patent number: 7463692
    Abstract: A device and method for a symbol recovery in a digital television are disclosed. The device includes a symbol clock recovery device includes a remained phase error remover operating a digital baseband real/imaginary number component signals, and removing remained phase error, a timing error detector nonlinearly operating the real/imaginary number component signals having the remained phase error removed, and detecting symbol clock phase error information therefrom, and an oscillating part generating a symbol clock frequency compensated to at least two times from the detected symbol clock phase error information and outputting the compensated frequency.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: December 9, 2008
    Assignee: LG Electronics Inc.
    Inventors: Jung Sig Jun, Tok Kim
  • Patent number: 7456682
    Abstract: The exemplary demodulator of the present invention can eliminate effectively a phase fluctuation which cannot be fully eliminated by a carrier recovery loop (feedback loop), with subsequent feed-forward phase compensation loop which shares a phase detector of the carrier recovery loop. A carrier recovery loop receives a digital signal after a semi-synchronous detection, detects a phase shift of the digital signal to a predefined phase position in rectangular coordinate, and compensates for the phase of the received digital signal by a first compensation value on the basis of the detected phase shift to generate an output signal. A feed-forward phase compensation loop generates an average value of the phase shift, and compensates for the phase of the output signal by a second compensation value on the basis of the averaged phase shift value.
    Type: Grant
    Filed: February 15, 2006
    Date of Patent: November 25, 2008
    Assignee: NEC Corporation
    Inventor: Takahiro Adachi
  • Patent number: 7426243
    Abstract: Systems and methods for receiving non-coherent layered modulation signals are presented. An exemplary apparatus comprises a tuner for receiving a layered signal and producing a layered in-phase signal and a layered quadrature signal therefrom, an analog-to-digital converter for digitizing the layered in-phase signal and the layered quadrature signal, a processor for decoding the layered in-phase signal and the layered quadrature signal to produce a single layer in-phase signal and a single layer quadrature signal, a digital-to-analog encoder for converting the single layer in-phase signal and the single layer quadrature signal to a single layer in-phase analog signal and a single layer quadrature analog signal and a modulator for modulating the single layer in-phase analog signal and the single layer quadrature analog signal to produce a single layer signal.
    Type: Grant
    Filed: January 2, 2007
    Date of Patent: September 16, 2008
    Assignee: The DIRECTV Group, Inc.
    Inventors: Ernest C. Chen, Tiffany S. Furuya, Philip R. Hilmes, Joseph Santoru
  • Patent number: 7394874
    Abstract: A multi-channel RF receiver uses an image rejection mixer (e.g. double quadrature mixer) in the IF down conversion stage for image side band rejection (whereby use of an IF narrow band filter for image rejection may be omitted if desired) and comprises a simplified frequency synthesizer which generates both a “wandering” IF oscillator frequency and an RF oscillator frequency for the up/down conversion stages (being, for down conversion, from RF to IF and from IF to base band. The IF used for a particular RF carrier (channel) is selected so as to be both an integer (N) sub-harmonic of that RF carrier and within the operating frequency band of the image rejection mixer. Advantageously, the synthesizer comprises only one loop and one VCO, wherein the IF oscillator signal is produced from the RF oscillator signal by means of a frequency divider.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: July 1, 2008
    Assignee: Zarbana Digital Fund LLC
    Inventors: Alexander Neil Birkett, James Stuart Wight
  • Publication number: 20080024208
    Abstract: A quadrature demodulator includes a reception section which receives a signal transmitted by an RFID tag and containing a specific pattern and data following the specific pattern and multiplies the reception signal by a local signal to generate an I-signal, while multiplying the reception signal by the local signal shifted in phase by 90 degrees to generate a Q-signal, a first demodulating circuit which squares the I- and Q-signals and adding the resulting I- and Q-signals together to generate data on the basis of the addition result, a second demodulating circuit which detects the specific pattern in the I- and Q-signals to decode the data following one of the detected specific patterns, and a control section which selects one of the first and second demodulating circuits in accordance with a gain determined by the result of the addition between the values of the squared I- and Q-signals.
    Type: Application
    Filed: July 30, 2007
    Publication date: January 31, 2008
    Inventors: Sadatoshi Oishi, Nobuo Murofushi, Masakazu Kato
  • Patent number: 7194044
    Abstract: A multi-channel RF receiver uses an image rejection mixer (e.g. double quadrature mixer) in the IF down conversion stage for image side band rejection (whereby use of an IF narrow band filter for image rejection may be omitted if desired) and comprises a simplified frequency synthesizer which generates both a “wandering” IF oscillator frequency and an RF oscillator frequency for the up/down conversion stages (being, for down conversion, from RF to IF and from IF to base band. The IF used for a particular RF carrier (channel) is selected so as to be both an integer (N) sub-harmonic of that RF carrier and within the operating frequency band of the image rejection mixer. Advantageously, the synthesizer comprises only one loop and one VCO, wherein the IF oscillator signal is produced from the RF oscillator signal by means of a frequency divider.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: March 20, 2007
    Inventors: Alexander Neil Birkett, James Stuart Wight
  • Patent number: 7109787
    Abstract: A demodulation circuit for demodulating a received signal including carriers in quadrature modulated by digital signals and/or in which the processing is performed on two carriers in quadrature. The circuit includes a demodulator, an analog-to-digital converter, a correcting circuit, and a derotator. The correcting circuit provides signals to the derotator based on the derotator output signals and on signals provided by the analog-to-digital converter.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: September 19, 2006
    Assignee: STMicroelectronics S.A.
    Inventor: Jacques Meyer
  • Patent number: 7019599
    Abstract: An apparatus for continuous phase quadrature amplitude modulation and demodulation to continuously process phases and amplitudes at symbol change points in an M-ary quadrature amplitude modulation method.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: March 28, 2006
    Assignee: Utstarcom Inc.
    Inventor: Dong Weon Yoon
  • Patent number: 6980059
    Abstract: A data-directed frequency-acquisition loop capable of generating a frequency error having a magnitude and direction from a double sideband suppressed signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier is convolved by a second multiplier. The I output of the second multiplier passes through a first low-pass filter. The filtered I output and the Q output are then multiplied by a third multiplier. The output of the third multiplier is filtered through a second low-pass filter, amplified, and return to the VCO to complete the feedback loop.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: December 27, 2005
    Assignee: Micronas Semiconductors, Inc.
    Inventors: Richard W Citta, Scott M LoPresto, Jingsong Xia, Wenjun Zhang
  • Patent number: 6931082
    Abstract: A technique that enables the sine and cosine branches within a PLL module to be obtained relatively easily and efficiently is described. According to the technique, the computation operations requiring a computation load, such as calculation of sine and cosine functions, are performed mostly once per a digital sampled signal, while relatively simple operations, such as multiplication and accumulations, are performed for every frame.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: August 16, 2005
    Assignee: Netmor Ltd.
    Inventors: Harel Primack, Netzer Moriya
  • Patent number: 6895063
    Abstract: A zero or near zero IF frequency changer for use in a digital tuner comprises multipliers which receive the RF input signal from an input. The multipliers receive quadrature local oscillator signals from a first oscillator of an arrangement which comprises first and second phase-locked loops. The first phase-locked loop comprises a programmable divider, a comparator and a control loop so that the first oscillator is phase-locked to a second oscillator. A second phase-locked loop comprises the second oscillator and a synthesizer containing a reference oscillator to which the second oscillator is phase-locked. The output frequency of the second oscillator is in a frequency band which is outside the RF input frequency band of the frequency changer.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: May 17, 2005
    Assignee: Zarlink Semiconductor Limited
    Inventors: Nicholas P Cowley, Mark S. J Mudd
  • Patent number: 6771713
    Abstract: Data aided carrier phase and symbol timing synchronizers are implemented at baseband as digital modulators isolating input signal inphase and quadrature component signals fed into inphase and quadrature Laurent transforms that function as data detector to provide odd and even data bit multiplexed output data signal while cross coupling the inphase and quadrature transformed outputs for removing data modulation in error signals to correct phase errors and timing errors in the received signal so as to provide reliable data demodulation of noisy received signals having dynamic carrier phase and symbol timing errors as found in continuous phase modulation communications systems such as Gaussian minimum shift keying communications systems.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: August 3, 2004
    Assignee: The Aerospace Corporation
    Inventors: Gee L. Lui, Kuang Tsai
  • Patent number: 6757336
    Abstract: A method of receiving a signal and performing a carrier recovery, the method comprising the steps of: (a) receiving a signal Xk. (b) rotating Xk by a previous correction angle &thgr;k−1 to generate a rotated signal Qk, wherein the rotation is based upon a sine and cosine of the previous correction angle. (c) mapping the rotated signal Qk to a valid decision Ak out of a constellation. (d) generating a normalized error signal &Dgr;&thgr;k,k−1 that reflects an angular difference between a correction angle &thgr;k and the previous correction angle &thgr;k−1. (e) calculating and storing a sine and a cosine of the correction angle &thgr;k, wherein the calculation is based upon &Dgr;&thgr;k,k−1, the sine of the previous correction angle &thgr;k−1 and the cosine of the previous correction angle.
    Type: Grant
    Filed: May 4, 2000
    Date of Patent: June 29, 2004
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Vladislav Elgart, Avishay Moscovici, Gideon Naor
  • Patent number: 6717462
    Abstract: A system for recovering and demodulating a carrier includes a carrier recovery loop and a data detector. The carrier recovery loop receives the carrier as an input and produces a recovered carrier at a frequency approximately equal to that of the carrier. The carrier recovery loop includes a downconverting mixer, a ×5 multiplier, a ×4 multiplier, and a phase locked loop. The downconverting mixer receives the carrier input, and the phase locked loop provides a VCO reference frequency through the ×5 multiplier to the downconverting mixer, which provides a frequency shifted signal. The frequency shifted signal is passed through the ×4 multiplier as input to the phase locked loop. The data detector receives the carrier and the recovered carrier as inputs and uses the recovered carrier to demodulate the carrier and detect I channel data and Q channel data.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: April 6, 2004
    Assignee: The Boeing Company
    Inventors: Kurt Loheit, James D. Cooper, Leah N. Burk, Suzanne E. Kubasek
  • Patent number: 6707863
    Abstract: A multidetector (40) circuit for use in a plurality of carrier recovery systems (10, 70) for recovery for a suppressed carrier modulated signal. The multidetector (40) receives demodulated, in-phase x and quadrature phase y components of a baseband signal (sn(t)) and generates output signals for use in a plurality of carrier recovery systems (10, 70). The multidetector (40) generates a lock detection signal that varies primarily in accordance with a lock signal x2y2 and a fourth-order amplitude detection signal (x2+y2)2 for use in either system. The multidetector particularly generates a phase error signal xy(x2−y2) for use in a Costas carrier recovery system (10). The multidetector also generates a second-order amplitude detection signal (x2+y2) for use in either system which can be used to adjust the amplitude of the incoming, modulated signal in order to control the loop gain of the carrier recovery phase locked loop.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: March 16, 2004
    Assignee: Northrop Grumman Corporation
    Inventors: Eric M. Mrozek, Craig A. Hornbuckle
  • Publication number: 20030214350
    Abstract: A data-directed frequency-acquisition loop capable of generating a frequency error having a magnitude and direction from a double sideband suppressed signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier is convolved by a second multiplier. The I output of the second multiplier passes through a first low-pass filter. The filtered I output and the Q output are then multiplied by a third multiplier. The output of the third multiplier is filtered through a second low-pass filter, amplified, and return to the VCO to complete the feedback loop.
    Type: Application
    Filed: April 1, 2003
    Publication date: November 20, 2003
    Inventors: Richard W. Citta, Scott M. LoPresto, Jingsong Xia, Wenjun Zhang
  • Patent number: 6597900
    Abstract: A circuit arrangement for providing impedance translation filtering comprises a first path and a second path. In a base band variant the first path is a feed forward path which comprises first and second series connected transconductance gain stages (10, 12), and the second path is a feedback which comprises third and fourth transconductance gain stages (18, 20), each having an inverting output. An output of the first gain stage is coupled to an input of the fourth gain stage. In operation, the impedance presented at its output determines the impedance presented at an input of the circuit arrangement.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: July 22, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Christopher B. Marshall, Brian J. Minnis
  • Patent number: 6570441
    Abstract: A demodulator includes a pair of analog mixers for incoherently demodulating modulated orthogonal signals with orthogonal local carriers to produce a pair of analog baseband signals, there being a phase rotation in the analog orthogonal baseband signals resulting from the incoherent demodulation. The analog baseband signals are converted to first and second digital signals. One of these is scaled by a gain controlled circuitry so that a difference between the average power values of the scaled first digital signal and the second digital signal is zero. The inter-channel rotating phase contained in the outputs of the gain controlled circuitry is removed by a phase shifter.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: May 27, 2003
    Assignee: NEC Corporation
    Inventor: Eisaku Sasaki
  • Patent number: 6563894
    Abstract: Apparatus for providing an optimized sampling phase to a received signal in a given channel, the received signal including inter-symbol interference.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: May 13, 2003
    Assignee: D.S.P.C. Technologies Ltd.
    Inventor: Doron Rainish
  • Patent number: 6535560
    Abstract: A receiver is adaptively calibrated by using a coherent reference signal. The reference signal is selected to be offset from a center frequency of the calibration signal such that the resultant product is offset from baseband by some small amount. The resultant product is used to determine a next value of the calibration parameters.
    Type: Grant
    Filed: June 3, 1999
    Date of Patent: March 18, 2003
    Assignee: Ditrans Corporation
    Inventor: Wesley K. Masenten
  • Patent number: 6466086
    Abstract: A quadrature demodulator applicable to digital communication and digital broadcast is provided, which simplifies the circuit configuration of a quadrature demodulator section and which reduces the labor or man-hours and the time required for adjusting the demodulation characteristic.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: October 15, 2002
    Assignee: NEC Corporation
    Inventor: Akihiko Syoji