Abstract: A digital phase locked loop circuit includes a phase frequency detector, a bandwidth calibrator, a digital loop filter, and a digital controlled oscillator. The phase frequency detector generates a first detection value and a second detection value of which each is associated with order between a phase of a reference signal and a phase of a fed-back signal. The bandwidth calibrator amplifies a signal level of the second detection value by a gain value to generate an amplified detection value, and adjusts the gain value based on the first detection value. The digital loop filter generates a digital code based on the amplified detection value. The digital controlled oscillator generates an output signal having a frequency which corresponds to the digital code. The fed-back signal is generated based on the output signal and is fed back to the phase frequency detector.

Abstract: The invention provides a demodulation PLL wherein: the first position of a switch, which is controlled by a control circuit, respectively connects the outputs of a mixer and a LP filter to high gain and low gain inputs of an oscillator when frequency signals at the inputs of the mixer have not converged sufficiently, i.e. during the PLLs tuning mode; the second position of the switch respectively connects the outputs of the mixer and the LP filter to the low gain and high gain inputs of the oscillator when the frequency signals at the inputs of the mixer and the signal levels on the input and output of the filter have converged sufficiently, i.e. during the PLLs demodulation mode.

Abstract: Device of the phase-locked loop type for demodulating a frequency-modulated signal. Device for frequency demodulation, using a phase-locked loop. According to the invention, for linearizing the variation of the frequency of a local oscillator (11) as a function of its control signal (Vb), a variable capacitance (Cv) is formed by an electronic module (20) which supplies the equivalent of a capacitance whose variation as a function of the control voltage (Vb) has a linearity deviation which is established for compensating the linearity deviation of the frequency of the oscillator as a function of the value of the capacitance (Cv).

Abstract: An impedance-generating device that provides a resistance and a reactance that are non-linear functions of a signal over a wide impedance range (VariablE Non-Linear Impedance Circuit Electronics, "VENICE"). An electronic component that has a gain characteristic with a unity gain frequency that is directly proportional to that signal can be configured to generate such an impedance. Such an electronic component configured to provide a negative effective resistance and a variable non-linear reactance can be used to implement a high frequency harmonic generator. This generator can provide high order harmonics which can be used in high frequency communications systems. The electronic component can also be configured to provide only a voltage-variable non-linear reactance which can be used to implement a reactive mixer to frequency shift a high frequency signal to an intermediate frequency signal, from mixing the high frequency signal with a local oscillator signal.

Abstract: An FM demodulator formed on a semiconductor chip generates a demodulated audio-frequency signal from an audio intermediate frequency signal through a phase locked loop constituted by a multiplier, a low-pass filter and a voltage-controlled oscillator. A variation of amplitude of the demodulated audio-frequency signal due to a temperature variation is compensated by a temperature compensating amplifier and a de-emphasis filter through first and second reference currents flowing out therefrom through an internal resistor fabricated on the same semiconductor chip and an external resistor.

Abstract: A demodulator circuit (100) and method for producing a demodulated signal V.sub.OUT from an input signal V.sub.IN. A frequency detection circuit (101) produces a quadrature signal V.sub.QUAD which is compared to the input signal V.sub.IN to produce a detected output signal. The phase and frequency of the quadrature signal V.sub.QUAD are responsive to a control signal I.sub.CONTROL. The demodulator circuit (100) has an output terminal (114) which provides the demodulated signal V.sub.OUT. Nonlinearity in the demodulated output signal V.sub.OUT in relation to a modulating signal is reduced by a linearizing feedback circuit (102). Automatic tuning is provided by a tuning feedback circuit (103). The output signals produced at the respective output terminals (114) and (113) of the linearizing feedback circuit (102) and tuning feedback circuit (103) are summed to produce the control current I.sub.CONTROL.

Abstract: An FM demodulator demodulating an FM modulated input signal through a PLL circuit, which includes a phase comparator a loop filter, a DC amplifier, a BB amplifier, and a VCO, and outputting the demodulated signal further includes a feedback circuit connected in parallel to DC amplifier and having a resistance which is a function of an external control voltage. The feedback circuit may be connected in parallel to both DC amplifier and BB amplifier. A PIN diode is typically used as a resistance variable element in the feedback circuit.

Abstract: An oscillator provided with an oscillation circuit provided with two oscillation transistors comprising a differential pair and a resonance circuit connected in common to the bases of the oscillation transistors. The bases of the oscillation transistors are short-circuited by a coil, a center tap coil is connected in parallel to the resonance circuit, and variable capacitive diodes in the resonance circuit are driven by a coil connected to a mixing circuit. Due to this, it is possible to prevent the occurrence of low frequency noise, possible to realize a completely balanced operation, possible to avoid the oscillation carrier flowing into the power source and ground, and possible to reduce the noise in a television picture.

Abstract: An oscillator capable of setting a desired frequency by using only two resonators without setting up any additional adjustment processes, and a synthesizer tuner circuit with an AM synchronous detect circuit.

Abstract: Video noise reduction is achieved by limiting the loop response bandwidth in a phase locked loop demodulator with a high-pass RC network connected between two oppositely phased video signals in the phase detector for out-phasing a high frequency component of the loop response bandwidth. Easy user adjustment allows viewable video images to be obtained from very noisy signals in deep fringe reception areas.

Abstract: A signal delay device comprises a CMOS gate circuit having an input terminal to which a binary input signal to be delayed is applied, an output terminal from which a delayed signal is derived and power voltage supply terminals to which operation power voltages are applied. The delay time of the CMOS gate circuit depends upon voltage applied to it and, utilizing this phenomenon, voltage control means is provided in a power supplying path for the CMOS gate circuit for controlling voltage applied to the CMOS gate circuit. The signal delay device using the CMOS gate circuit is applied to various circuits including a FM modulator or FM demodulator. The signal delay device will assure undistorted signals.

Abstract: A FM detection system using a phase locked loop (PPL 20) and including: a wave shaping comparator (7) for accepting a signal V.sub.CO2 from a voltage controlled oscillator (4) which is 90.degree. out of phase with a control signal V.sub.CO1 from the voltage controlled oscillator (4), the comparator reshaping the signal to a square wave; an in-lock detector (8) for accepting the square wave and a frequency modulated input signal (VFM) to provide a sum frequency and a difference frequency; a low-pass filter (9) cutting off the sum frequency component, and filtering out the difference frequency signal when the PLL (20) is unlocked; a comparator (10) for comparing the output of the low-pass filter (9) with a reference voltage (V.sub.