Abstract: In order to increase the order of a frequency of an AC signal to be applied between a vibration section and a sample to an order at substantially the same level as the order of a vibration frequency of the vibration section in measuring a vibration component of the vibration control section, a vibration component measuring device (2) includes: a vibration section (4); a first AC signal generator (20) configured to generate a first AC signal; a second AC signal generator (44) configured to generate a second AC signal having a frequency which is (a) more than one time and less than two times or (b) more than two times and less than three times as high as a frequency of the first AC signal; a signal applying section (14, 56) configured to apply the second AC signal between the vibration section and a sample (X); a vibration control section (10) configured to cause the vibration section to vibrate; and a measuring section (16, 18, 20, 22, 42, 44, 50) configured to measure a varying component of vibration of the v

Abstract: In accordance with some embodiments, polarity-coincidence, adaptive time-delay estimation (PCC-ATDE), mixed-signal techniques are provided. In some embodiments, these techniques use 1-bit quantized signals and negative-feedback architectures to directly determine a time-delay between signals at analog inputs and convert the time-delay to a digital number.

Abstract: A quadrature detection unit subjects an FM signal to quadrature detection using a local oscillation signal and outputs a base band signal. A first correction unit and a second correction unit correct the base band signal using a DC offset correction value. A DC offset detection unit subjects the corrected base band signal to rectangular to polar conversion and derives the DC offset correction value such that amplitudes in a plurality of phase domains defined in an IQ plane approximate each other. An FM detection unit subjects the corrected base band signal to FM detection and generates a detection signal. An addition unit adds an offset to the detection signal. An AFC unit generates a control signal for controlling a frequency of a local oscillation signal based on the detection signal to which the offset is added.

Abstract: A phase adjustment device includes: a detection signal generator configured to generate a pair of first and second detection signals for detecting a phase difference between two signals whose phases have been adjusted by two phase adjusters, respectively, a maximum sensitivity phase difference of one of the first and second detection signals being not overlap with that of the other, and detection sensitivity of the phase difference becoming maximum at the maximum sensitivity phase difference; a detection signal selector configured to select one of the first and second detection signals whose predetermined range around the maximum sensitivity phase difference covers a preset phase difference; and a phase controller configured to control an amount of phase-adjusting by at least one of the two phase adjusters based on a difference between the phase difference detected within the predetermined range using the selected detection signal and the preset phase difference.

Abstract: According to an embodiment, an auto frequency control circuit includes a peak time detector, a first time shifter a zero-crossing time detector, and a second time shifter. The peak time detector detects, from the digital signal, a first time at which the digital signal exhibits one of a maximal value and a minimal value. The first time shifter adds or subtracts a first natural number multiple of the predetermined period to or from the first time. The zero-crossing time detector detects, from the digital signal, a second time at which the digital signal exhibits one of a positive zero-crossing and a negative zero-crossing. The second time shifter adds or subtracts the first natural number multiple of the predetermined period to or from the second time.

Abstract: Provided are a receiver and a receiving method for a scalable bandwidth in a mobile station of an Orthogonal Frequency Division Multiplexing (OFDM) system. The receiving method includes the steps of: (a) filtering a received RF signal; (b) oscillating a frequency according to a center frequency control signal to output a local oscillation frequency; (c) down-converting the filtered RF signal by using the local oscillation frequency; (d) scalable-filtering the down-converted signal while adjusting a bandwidth according to a bandwidth control signal; (e) controlling gain of the scalable-filtered signal; (f) converting the gain-controlled analog signal into a digital signal by using a sampling frequency matching with a corresponding bandwidth according to an ADC control signal; and (g) demodulating the converted digital signal, outputting the center frequency control signal, the bandwidth control signal, and the ADC control signal according to control information received from an upper layer.

Abstract: A transmitter includes an encoding module, an adaptive hierarchical signal mapping module and a transceiver module. The encoding module receives an input signal and encodes the input signal. The input signal includes data to be transmitted. The adaptive hierarchical signal mapping module modulates the encoded signal according to one or more hierarchical level distance ratios to obtain modulated symbols. The hierarchical level distance ratio defines distances between the modulated symbols. The transceiver module generates a radio frequency signal according to the modulated symbols and transmits the radio frequency signal to an air interface.

Abstract: Provided are a receiver and a receiving method for a scalable bandwidth in a mobile station of an Orthogonal Frequency Division Multiplexing (OFDM) system. The receiving method includes the steps of: (a) filtering a received RF signal; (b) oscillating a frequency according to a center frequency control signal to output a local oscillation frequency; (c) down-converting the filtered RF signal by using the local oscillation frequency; (d) scalable-filtering the down-converted signal while adjusting a bandwidth according to a bandwidth control signal; (e) controlling gain of the scalable-filtered signal; (f) converting the gain-controlled analog signal into a digital signal by using a sampling frequency matching with a corresponding bandwidth according to an ADC control signal; and (g) demodulating the converted digital signal, outputting the center frequency control signal, the bandwidth control signal, and the ADC control signal according to control information received from an upper layer.

Abstract: The invention relates to an apparatus (300; 400; 500; 600) for demodulating an input signal (306; 402; 520), comprising a frequency detector (302; 403; 502.1, . . . , 502. N; 603) for tracking a frequency (f2; fd1, . . . , fdN) of the input signal (306; 402; 520), an oscillator (304; 410; 505; 605, 606) and a mixer (305; 408; 507; 608, 609), wherein the input signal (306; 402; 520) and an output signal (307; 409) of the oscillator (304; 410; 505; 605, 606) constitute the incoming signals for the mixer (305; 408; 507; 608, 609) and the output signal of the mixer (305; 408; 507; 608, 609) constitutes the demodulated input signal, wherein an arithmetic unit (303; 404; 504; 604) is arranged downstream of the frequency detector (302; 403; 502.1, . . . , 502. N; 603) and upstream of the oscillator (304; 410; 505; 605, 606), wherein the tracked frequency (f2; fd1, . . . , fdN) of the input signal (306; 402; 520) and a predefined second frequency (f1; faux1, . . .

Abstract: The invention discloses a dual frequency multiplexer by which a first and second coaxial harmonic oscillator type band pass filters are disposed in a box. The box includes a base body, a cover plate and a cover body. The two coaxial harmonic oscillator type hand pass filters are located on the base body and spaced each other by a metal plate; the multiplexer port, first and second ports are positioned on lateral side of the base body. The blocking capacitors are contained in the coaxial chamber of the two coaxial harmonic oscillator type band pass filters. The cover plate is secured on the base body; the first and second direct current circuits are placed on the cover plate; the low pass filters of the first and second direct current circuits are fixed on an edge of a top surface of the coaxial chamber by means of a support member; the cover body and the base body are fastened with each other. The blocking capacitors each are of distributed parameter capacitor.

Abstract: Apparatus and methods for demodulation are provided. In one embodiment, a method includes receiving an input signal having a frequency that varies in relation to a state of the signal, calculating a sine and cosine of a phase control signal, generating a first signal proportional to the sine of a product of a first quantity and the frequency of the input signal, generating a second signal proportional to the cosine of a product of the first quantity and the frequency of the input signal, and summing a product of the first signal and the cosine of the phase control signal with a product of the second signal and the sine of the phase control signal to generate a demodulator output for resolving the state of the input signal. In certain implementations, the phase control signal is controlled so as to reduce a frequency error of the input signal.

Abstract: A carrier offset detection circuit is offered, which is provided to a demodulation circuit which demodulates a received signal subjected to FSK (Frequency Shift Keying) modulation, and which detects the offset of the carrier frequency between the transmitting side and the receiving side. A zero-crossing detection unit receives a digital base band signal indicating the level of the frequency shift (frequency deviation) of the received signal using the carrier frequency on the receiving side as a reference frequency, and detects a zero-crossing point of the base band signal and a base band signal obtained by delaying the former base band signal by one symbol, which occurs in a preamble period. A carrier offset detection circuit sets the offset value of the carrier frequency to the value of the base band signal at a timing of the zero-crossing point thus detected.

Abstract: A receiver includes a band-pass filter that limits a passband of an IF (Intermediate Frequency) signal, an FSK detector that detects the IF signal passing through the band-pass filter to generate a detection signal, and a control block that controls a modulation sensitivity of the FSK detector and a pass bandwidth of the band-pass filter, in which the control block controls the modulation sensitivity of the FSK detector according to the pass bandwidth of the band-pass filter.

Abstract: A radio receiver including a reception processing system that uses discrete-time frequency conversion to acquire a signal having a sampling rate corresponding to a local frequency, wherein the reception characteristic is improved when the reception processing system is applied to a system having a wide reception channel band. The radio receiver comprises an A/D converting part that quantizes a discrete-time analog signal to a digital value to output a received digital signal; a channel selection filtering part that uses a tap coefficient value to perform a digital filtering process of the received digital signal; and a frequency response characteristic correcting part that generates the tap coefficient in accordance with the sampling rate.

Abstract: A device mitigates reduction in reception performance caused by a harmonic component of a clock used for demodulation. The device includes a tuner performing frequency conversion by multiplying a received signal by a signal having a frequency corresponding to a frequency of a desired signal included in the received signal, and outputting the obtained frequency-converted signal; and a demodulation section generating a demodulated signal by demodulating the frequency-converted signal. The demodulation section operates in response to a master clock having a frequency corresponding to the frequency of the desired signal.

Abstract: A method and apparatus for automatic frequency correction in a demodulation circuit. The apparatus includes a demodulator, a frequency offset estimator, a frequency controller, and an oscillator. The oscillator provides a receiver clock signal which the demodulator employs to demodulate a modulated signal. The frequency offset estimator estimates an offset between a carrier wave frequency of the modulated signal and a frequency of the receiver clock signal. The frequency controller provides a frequency control signal to the oscillator for adjusting the frequency of the receiver clock. While the estimated offset is outside of an adjustment range, the frequency controller maintains the frequency control signal at its previous value. The frequency controller also adjusts the adjustment range based on past error signal values.

Abstract: A tuner and a demodulating unit thereof are provided. A trap filter for a specific frequency is installed in the IF demodulating unit so as to eliminate a frequency signal acting as a beat component.

Abstract: An electronic receiver for decoding data encoded into electromagnetic radiation (e.g., light) is described. The light is received at an ultra-small resonant structure. The resonant structure generates an electric field in response to the incident light and light received from a local oscillator. An electron beam passing near the resonant structure is altered on at least one characteristic as a result of the electric field. Data is encoded into the light by a characteristic that is seen in the electric field during resonance and therefore in the electron beam as it passes the electric field. Alterations in the electron beam are thus correlated to data values encoded into the light.

Abstract: In an I/Q demodulation circuit, an offset amount determined in an offset detection mode is previously stored so that, in a normal reception mode, an offset is corrected for based on the data thus stored. With this configuration, a DC offset and a phase offset can be corrected for without a delay in an I/Q demodulation operation.

Abstract: An apparatus comprising a first circuit, a second circuit, a third circuit and a fourth circuit. The first circuit may be configured to generate a demodulated signal in response to (i) a modulated signal and (ii) a seed value. The second circuit may be configured to generate a first control signal in response to the demodulated signal. The third circuit may be configured to generate a second control signal in response to (i) the first control signal and (ii) a compensation signal. The fourth circuit may be configured to generate the seed value in response to the second control signal.

Abstract: The present invention discloses a new type of extremely low-noise phase-frequency detector (PFD) 500, broadband from DC to multi-GHz RF frequencies for PLL synthesizer applications. Free of any feedback mechanisms, thus inherently fast, it operates close to transition frequency fT of IC processes or frequency limits of discrete mixers. The PFD 500 utilizes complex SSB conversion in both the in-phase and quadrature arms, delaying the in-phase arm in 530, beating the delayed signal 124 with the un-delayed quadrature signal 122 in mixer 126. The output 128 contains both the frequency difference and the phase difference information between the two signals 118 and 520, providing both the frequency-discrimination (FD) and the phase detection (PD) functions. Utilizing standard mixers the PFD 500 can achieve superior CNRs of 180 dBc/Hz at multi-GHz RF. Additionally, utilizing the FD/FM demodulation capability, the present invention improves phase noise of various signals and linearity of FM modulators.

Abstract: A demodulation apparatus that can support various oscillation frequencies. The portable phone device includes a frequency synthesizer for generating a local-oscillation signal having a local oscillation frequency for converting the frequency of an input receiving signal into an intermediate frequency based on an oscillation signal generated by an TCXO and a synchronization hold portion provided with an NCO for generating a signal having a predetermined frequency based on the oscillation signal generated by TCXO. The frequency synthesizer makes the local oscillation frequency variable by setting the dividing ratio variable in accordance with an arbitrary oscillation frequency so that the intermediate frequency remains within a predetermined range regardless of the oscillation frequency, and an NCO makes the frequency of the signal variable by setting the dividing ratio variable in accordance with the oscillation frequency.

Abstract: A signal processing device includes a conversion device configured to output a differential current signal at two taps on the basis of an input signal and an oscillator signal. A respective controllable current source is coupled to one of the two taps. An amplification device having a current signal input has a first connection to the first tap and a second connection coupled to the second tap of the conversion device. The amplification device has two output taps; a first charge store is connected to a connection of the amplification device and to the second tap of the amplification device, and a first resistive load is connected in parallel with said first charge store. A second charge store is connected to the second connection of the amplification device and to the first tap of the amplification device, and a second resistive load is connected in parallel with said second charge store.

Abstract: A demodulator has a resistor and a capacitor that may be subject to tolerances. For tolerance correction, the FM demodulator is preferably supplied with a reference frequency, which corresponds to the nominal mid-frequency of the demodulator, which is a function of the resistor and the capacitor. Any discrepancy between the actual mid-frequency of the demodulator and its nominal mid-frequency leads to the production of a voltage that differs from a nominal voltage at the output. A detector detects this error and adjusts the values of the resistor or capacitor until the error between the nominal voltage and the voltage is zero or is a minimum. The described principle can be used, for example, in integrated mobile radio receivers.

Abstract: A frequency discriminators (FD) and frequency modulation (FM) demodulators, utilizing single sideband (SSB) complex conversion directly to zero IF, suitable for direct demodulation at high frequencies of analog FM or digital FSK modulated signals, as well as for high speed frequency discrimination (or frequency comparison) in applications such as frequency acquisition in frequency synthesizers. The complex SSB down-converter consists of a quad of mixers and quadrature splitters in both the signal path and local oscillator (LO) path. Each mixer receives both the signal and the LO, each either in-phase or quadrature. The outputs of mixers are combined in pairs, to produce the SSB in-phase (I) baseband signal and the SSB quadrature (Q) baseband signal. Both I and Q signals are then delayed, each multiplied by un-delayed version of the other one. The multiplication products are summed together, to produce an FD error signal, or an FM demodulated signal at the output.

Abstract: A frequency discriminators (FD) and frequency modulation (FM) demodulators, utilizing single sideband (SSB) complex conversion directly to zero IF, suitable for direct demodulation at high frequencies of analog FM or digital FSK modulated signals, as well as for high speed frequency discrimination (or frequency comparison) in applications such as frequency acquisition in frequency synthesizers. The complex SSB down-converter consists of a quad of mixers and quadrature splitters in both the signal path and local oscillator (LO) path. Each mixer receives both the signal and the LO, each either in-phase or quadrature. The outputs of mixers are combined in pairs, to produce the SSB in-phase (I) baseband signal and the SSB quadrature (Q) baseband signal. Both I and Q signals are then delayed, each multiplied by un-delayed version of the other one. The multiplication products are summed together, to produce an FD error signal, or an FM demodulated signal at the output.

Abstract: In a circuit arrangement for demodulating signals, particularly frequency-modulated signals, in which a limiter, to whose input the signals to be modulated can be applied, is followed by a demodulator from whose output the demodulated signals can be derived, the outputs of the demodulator and the limiter are connected to a respective input of a mixer whose output is connected to the input of the limiter via a low-pass filter.

Abstract: A system and method for carrier recovery independent of a pilot signal uses the frequency and phase information in the upper and lower band edges of a signal to generate a signal for correcting the frequency and phase of the local oscillator. A particular combination of raised-root cosine filters, low-pass filters, multipliers, and adders effectively uses the tails of a received signal in the frequency domain to correct phase errors.

Abstract: An FM demodulator in accordance with the present invention receives a composite signal from an antenna and corresponding processing circuitry. The composite signal includes a carrier signal having a voice/data signal modulated thereon. The composite signal is processed to separate the voice/data signal from the carrier signal. The voice/data signal is separated into an in-phase (I) signal and a quadrature (Q) signal. The Q signal is differentiated and then divided by the I signal to obtain the voice/data signal. Alternatively, I signal is differentiated and then divided by the Q signal to obtain the voice/data signal.

Abstract: An FM demodulator in accordance with the present invention receives a composite signal from an antenna and corresponding processing circuitry. The composite signal includes a carrier signal having a voice/data signal modulated thereon. The composite signal is processed to separate the voice/data signal from the carrier signal. The voice/data signal is separated into an in-phase (I) signal and a quadrature (Q) signal. The Q signal is differentiated and then divided by the I signal to obtain the voice/data signal. Alternatively, I signal is differentiated and then divided by the Q signal to obtain the voice/data signal.

Abstract: A filter configuration for a demodulated QAM signal has a first channel for a cosine demodulated component of the QAM signal, a second channel for a sine demodulated component of the QAM signal, a filter circuit, which receives the two signal components and for each signal component has one transfer function that is composed of terms in phase with this signal component and terms phase-shifted from it by &pgr;/2 and/or −&pgr;/2. The circuit configuration also includes a cross branch for picking up signal portions from the respectively other channel that correspond to the phase-shifted terms of the transfer function. In a first state, the circuit configuration connects the input of the cross branch to the first channel and the output of the cross branch to the second channel, and in a second state connects the input of the cross branch to the second channel and the output of the cross branch to the first channel. A slope detector especially suitable for use with this filter configuration is also provided.

Abstract: Apparatus and method for digital frequency discrimination are provided that only require one sample per data symbol (e.g. one bit for BPSK or 2 bits for QPSK). This is accomplished by determining the difference between the carrier phase error on successive data symbols. The difference in phase error is then used as an approximation to the derivative of the phase error, which is the frequency error between the carrier and the local oscillator of the receiver. An important advantage of this apparatus and method is that they allow the maximum symbol rate to be processed by the receiver for a given digital technology. In other words, maximum symbol rate can now be equal to the maximum clock rate of the digital technology, if so desired by the user. In contrast, conventional digital frequency discriminators limit the maximum symbol rate to one-half or one-fourth of the maximum clock rate for a given digital technology.

Abstract: A digital implementation for a carrier detector. The detector determines if the carrier frequency at any instant is within a predetermined frequency band. The detector further determines if the detected frequency remains within the predetermined frequency band for a predetermined period of time. The detector also provides an indication that there has not been any loss of carrier for another predetermined period of time.

Abstract: In order to process an input signal exhibiting a frequency modulation about an intermediate frequency, the demodulator includes a first mixer for producing a first signal exhibiting the frequency modulation about a transposition frequency lower than the intermediate frequency; a switched-capacitor phase-shifter receiving the first signal so as to produce a second signal exhibiting, with respect to the first signal, a phase-shift varying substantially linearly with frequency about the transposition frequency; two substantially identical low-pass filters receiving the second signal and the first signal respectively; and a second mixer for mixing the signals produced by the first and second low-pass filters, in order to deliver a baseband output signal.

Abstract: The invention provides a quadrature demodulator which removes unnecessary higher harmonic signals included in a demodulation output without giving rise to increase in number of externally connected parts and increase in current consumption. The quadrature demodulator includes a first double differential circuit to which a modulated signal and a first local signal are inputted, a first emitter follower circuit for effecting impedance conversion, a second double differential circuit to which the modulated signal and a second local signal having a phase shifted by 90-degrees from the first local signal are inputted, and a second emitter follower circuit connected to a pair of outputs of the second double differential circuit for effecting impedance conversion.

Abstract: A micropower RF transdponder employs a novel adaptation of the superregenerative receiver wherein the quench oscillator is external to the regenerative transistor. The quench oscillator applies an exponentially decaying waveform rather than the usual sinewave to achieve high sensitivity at microampere current levels. Further improvements include circuit simplifications for antenna coupling, extraction of the detected signal, and a low-voltage bias configuration that allows operation with less than a 1-volt rail voltage. The inventive transponder is expected to operate as long as the battery shelf life.

Abstract: An FM signal phase-shifted by 90.degree. and an FM signal not phase-shifted are supplied to a multiplier to demodulate a stereo composite signal. A 90.degree. phase shifting circuit has a first oscillation circuit whose phase shift amount varies according to a timing at which the amount of a current flowing through a charging and discharging capacitor is changed. A multiplexer is provided to process the stereo composite signal to output left and right channel signals. The multiplexer has a second oscillation circuit for generating a signal multiplied by the stereo composite signal to extract the left and right channel signals from the composite signal. The first and second oscillation circuits each have a differential amplifier. The constant current of the constant current source of each differential amplifier is set by trimming-regulate it by a regulating circuit.

Abstract: A complex baseband signal as long as one period of PN signal is divided into three sequences. The three partial signals are input to three correlators which then calculate the correlations between the three partial signals and three partial PN signals. The squares of the absolute values of outputs from the three partial correlators are summed and the peak of the resultant summed signal is detected, thereby performing initial acquisition and tracking of synchronization of PN signal. Outputs from the three partial correlators are added together by an adder for generating a correlation signal used for data demodulation. Since partial correlation signals output from three partial correlators have a phase difference corresponding to a frequency offset, and error signal corresponding to the frequency offset is provided by performing complex conjugate product operations on the partial correlation signals.

Abstract: A frequency-controlled circuit for automatically detecting a center frequency of a received signal whose frequency is shifted includes a frequency control unit for receiving the input signal and changing the frequency of the received signal into another frequency, a demodulating unit for demodulating a signal outputted from the frequency control unit, an incoming detecting unit for detecting whether a demodulated signal outputted from the demodulating unit is proper or improper and a level detecting unit for dividing a frequency band of the signal, obtained in the frequency control unit by adding a receive frequency band of the received signal to the center frequency of the received signal or subtracting the center frequency thereof from the receive frequency band thereof, into a plurality of narrower frequency bands and detecting respective power values of the divided frequency bands.

Abstract: A method and apparatus utilizing the techniques of frequency shifting and filtering for converting an input signal having a desired signal at intermediate frequency and an undesired DC offset to a baseband frequency signal in which the undesired DC offset is eliminated. The apparatus includes a first multiplier for multiplying the input signal by a signal having substantially the same intermediate frequency plus an offset frequency (.DELTA.f) to produce a first output signal wherein the desired signal is shifted in frequency to the offset frequency (.DELTA.f) and the undesired DC offset is unaffected. The apparatus also includes a second multiplier coupled to the first multiplier for multiplying the first output signal by a signal having substantially the same offset frequency (.DELTA.f) to produce a second output signal having the desired signal shifted to baseband frequency and the undesired DC offset shifted in frequency to the offset frequency .DELTA.f.

Abstract: A communication device (100) includes mixers (104) and (108) which mix a local oscillator (112, 106) with a received signal to produce in-phase (i) and quadrature (q) components. The direction of the phase of the signal is detected as it crosses the i and q axes. The direction of the phase rotation is kept track of by a bi-directional counter (123) in order to demodulate multi-level digital signals. A positive rotation increments the bi-directional counter (123). Conversely, a negative direction decrements the counter (123). The final count of the counter (123) is used by a decision device 124 to establish the content of the received information signal.

Abstract: Digital frequency demodulation is accomplished by monitoring similar transitions in an FM radio signal to determine frequency. Time intervals between similar transitions in the FM signal are established by selecting anticipated transition times and accumulating error values relative to actual transition times. Accumulated error values provide a basis for further selecting anticipated transition times in such manner that a reported sequence of anticipated transition times provides a basis for inferring signal frequency. In one illustrated embodiment, the chosen transition times are positive transitions in the FM signal and the anticipated times of transition are taken from a set of two time periods, an early transition and a late transition relative to a valid transition window. In one embodiment of the invention, accumulated error is stored in an integrator device while in another embodiment accumulated error is stored in the phase of a bi-frequency oscillator.

Abstract: An apparatus and method is provided of recovering a frequency modulated signal having a first component of the frequency modulated signal at a zero-RF spectral location and a second component of the frequency modulated signal at a zero-RF spectral location in quadrature relationship to the first component. The method includes the steps of: upconverting and summing the first and second components to produce a reference signal (100), time delaying the first and second components, upconverting and summing the delayed, upconverted first and second components to produce a delayed reference signal (101) in quadrature relationship to the reference signal; limiting the reference and delayed signal (102); and exclusive or-ing (103) the limited reference and limited delayed signal.

Abstract: Digital frequency demodulation is accomplished by monitoring similar transitions in an FM radio signal to determine frequency. Time intervals between similar transitions in the FM signal are established by selecting anticipated transition times and accumulating error values relative to actual transition times. Accumulated error values provide a basis for further selecting anticipated transition times in such manner that a reported sequence of anticipated transition times provides a basis for inferring signal frequency. In one illustrated embodiment, the chosen transition times are positive transitions in the FM signal and the anticipated times of transition are taken from a set of two time periods, an early transition and a late transition relative to a valid transition window.

Abstract: Upon transmission, when the digital transmission mode is set, an analog audio signal is A/D converted, the digital audio signal is coded, a first carrier is modulated by the coded signal and multiplied by a first multiplier, and the multiplied signal is sent to an orthogonal modulating and D/A converting circuit. When the analog transmission mode is set, a second carrier is modulated by the digital audio signal and multiplied by a second multiplier, and the multiplied signal is sent to the orthogonal modulating and D/A converting circuit. A signal of a frequency which is equal in both of the digital transmission mode and the analog transmission mode is given to the orthogonal modulating and D/A converting circuit. Upon reception, when the digital transmission mode is set, an output of an A/D converting and orthogonal demodulating circuit is frequency divided by a first frequency divider and demodulated and decoded.

Abstract: An analog angle modulated signal is converted into a digital signal within an A/D converter using a sampling clock having a frequency an integer times higher than the carrier of the angle modulated signal. The digital signal is delayed by one sampling slot within each of four delay circuits connected in series to the A/D converter. The output of the A/D converter and that of the fourth delay circuit are multiplied by -1/2 within respective digital weighting circuits, and the multiplied outputs as well as the output of the second delay circuit are added together to generate an I component level signal. The output of the first delay circuit is multiplied by -1 within another weighting circuit and this multiplied output as well as the output of the third delay circuit are added together to generate a Q component level signal.

Abstract: Electronic receive arrangement for receiving a modulated carrier signal, which arrangement comprises a mixer/demodulator driven with the carrier frequency fc, at least one adder included in a closed signal loop, a low-pass filter, and a pulse shaper constituted by a sigma-delta (one-bit) signal converter and driven with the sampling frequency fs and also comprises a digital decimation filter. The signal loop includes the mixer/demodulator so that the modulated carrier signal is applied to the adder and the output signal of the adder is applied to the mixer/demodulator. The signal loop also comprises a second mixer driven with frequency fc, and the frequencies fs and fc present a common multiple.

Abstract: The invention provides a digital radio link receiving device consisting of a microwave frequency part with a device for signal downconversion to an intermediate frequency, an intermediate frequency part limited to direct demodulation of the signal at intermediate frequency, and a baseband part responsible for processing the signal.

Abstract: A method of demodulating multi-standard TV signals consists of providing a plurality of signals at a frequency which is a multiple of a reference frequency whose value is a common submultiple of the frequencies of the multi-standard signals. Thereafter, the signal to be demodulated is multiplied by one of said plural signals having a frequency which differs therefrom by a value equal to the reference frequency; by filtering the result of the multiplication, a signal is obtained at the reference frequency but corresponding in amplitude to the one to be demodulated.

Abstract: A Josephson junction (100) is employed as a very-high-speed frequency demodulator for detecting a frequency-shift-keyed (FSK) modulated signal (201) in a microwave or lightwave communication system. The voltage induced across the junction in response to an incident FSK modulated radiation signal follows the frequency variations in the incident wave thereby directly demodulating the information signal from its carrier. In the disclosed embodiment an FSK modulated optical signal is mixed with a local oscillator (303) signal, which is then incident on a photodetector (305). The resultant microwave-frequency signal is then applied over a two-wire transmission line (308) to the Josephson junction (307) for direct demodulation.