Different Bias Control Means For Different Stages Of Cascade Amplifier Patents (Class 330/133)
  • Patent number: 11121681
    Abstract: Bias circuitry is disclosed with a bias drive device having a first current terminal coupled to a voltage supply node, a bias control terminal coupled to a control node, and a second current terminal coupled to a bias output node. An impedance control device has a third current terminal and an impedance control terminal that are coupled together and a fourth current terminal coupled to ground. An output impedance resistor is coupled between the third current terminal and the bias output node. A pull-down device is coupled between the bias output node and the fixed voltage node, wherein a higher voltage applied to the control node sets an output impedance at the bias output node to approximately a lower impedance of the pull-down device and a lower voltage applied to the control node sets the output impedance to approximately the resistance of the output impedance resistor.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: September 14, 2021
    Assignee: Qorvo International PTE. LTD.
    Inventor: Michael Nielsen
  • Patent number: 11101773
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: August 24, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Hidetoshi Matsumoto
  • Patent number: 11050392
    Abstract: A bias device includes a transistor, a bias circuit, and an impedance unit. The transistor has a first terminal, a second terminal for providing a first bias voltage to an input terminal of an amplifier, and a control terminal. The bias circuit has a first terminal, a second terminal coupled to a first system voltage terminal for receiving a first system voltage, and a third terminal coupled to the control terminal of the first transistor for providing a second bias voltage to the control terminal of the first transistor. The impedance unit has a first terminal for receiving a first reference voltage, a second terminal coupled to the first terminal of the bias circuit. The first impedance unit adjusts the input impedance looking into the second terminal of the first transistor according to a frequency of a radio frequency signal received from the input terminal of the amplifier.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: June 29, 2021
    Assignee: RichWave Technology Corp.
    Inventor: Yi-Fong Wang
  • Patent number: 11038374
    Abstract: A wireless power transfer (WPT) system that efficiently transfers power to portable devices over a wide range of load conditions and power output demands. The WPT system of this disclosure includes a full bridge topology. Changing the number of devices or the position and orientation of a device on the transmitter charge area may change the impedance and/or the load on the power transmitting unit (PTU). The WPT system of this disclosure may detect load impedance and/or power requested from the PTU. When the load exceeds a threshold, the WPT system will activate a second half bridge to operate in full-bridge mode. Similarly, the WPT system may detect the power requested and received and when the power drops to a certain threshold of power transmitted the WPT may turn off the second leg and operate in half-bridge mode.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: June 15, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Venkata Anand Prabhala, Stephan Schaecher
  • Patent number: 11038476
    Abstract: The method and system for converging a 5th-generation (5G) communication system for supporting higher data rates beyond a 4th-generation (4G) system with a technology for internet of things (IoT) are provided. The method includes intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. The system includes a power amplification device capable of minimizing the effect of envelope impedance. The power amplification device may be incorporated in a terminal and a base station.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: June 15, 2021
    Assignees: Samsung Electronics Co., Ltd., Postech Academy-Industry Foundation
    Inventors: Jihoon Kim, Bumman Kim, Kyunghoon Moon, Seokwon Lee, Daechul Jeong, Byungjoon Park, Juho Son
  • Patent number: 10992267
    Abstract: A PA module includes: a multilayer substrate having a ground pattern layer connected to a ground of a power source; amplifier transistors disposed on the multilayer substrate; a bypass capacitor having one end connected to the collector of the amplifier transistor; a first wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a second wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a third wiring line connecting the other end of the bypass capacitor and the ground pattern layer to each other; and a fourth wiring line formed between the amplifier transistor and the ground pattern layer and between the bypass capacitor and the ground pattern layer and connecting the first wiring line and the third wiring line to each other.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: April 27, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Isao Takenaka
  • Patent number: 10911000
    Abstract: A power amplifier module includes first and second amplifiers, a first bias circuit, and an adjusting circuit. The first amplifier amplifies a first signal. The second amplifier amplifies a second signal based on an output signal from the first amplifier. The first bias circuit supplies a bias current to the first amplifier via a current path on the basis of a bias drive signal. The adjusting circuit includes an adjusting transistor having first, second, and third terminals. A first voltage based on a power supply voltage is supplied to the first terminal. A second voltage based on the bias drive signal is supplied to the second terminal. The third terminal is connected to the current path. The adjusting circuit adjusts the bias current on the basis of the power supply voltage supplied to the first amplifier.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: February 2, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kenichi Shimamoto
  • Patent number: 10911008
    Abstract: A power amplifier module includes an output-stage amplifier, a driver-stage amplifier, an input switch, an output switch, an input matching circuit, an inter-stage matching circuit, an output matching circuit, and a control circuit. The input switch selectively connects one of a plurality of input signal paths to an input terminal of the driver-stage amplifier. The output switch selectively connects one of a plurality of output signal paths to an output terminal of the output-stage amplifier. The control circuit controls operations of the driver-stage amplifier and the output-stage amplifier. The input switch, the output switch, and the control circuit are integrated into an IC chip. The control circuit is disposed between the input switch and the output switch.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: February 2, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hiroshi Okabe
  • Patent number: 10903795
    Abstract: A semiconductor amplifier 1 includes transistors 21a and 21b mounted side by side on a bottom plate 2 in a space in a package 6, a matching circuit 22a mounted between the transistors 21a, 21b on the bottom plate 2, a matching circuit 22b mounted on an opposite side of the transistor 21b from the transistor 21a on the bottom plate 2, an input terminal TIN installed on one side of a wiring substrate 3, an output terminal TOUT installed on the other side of the wiring substrate 3, and gate bias terminals T1G and T2G and drain bias terminals T1D and T2D installed at positions with the input terminal TIN and the output terminal TOUT of the wiring substrate 3, and the transistor 21a, the matching circuit 22a, the transistor 21b, and the matching circuit 22b are linearly placed between the input terminal TIN and the output terminal TOUT.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: January 26, 2021
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Naoyuki Miyazawa
  • Patent number: 10892719
    Abstract: A multistage power amplifier comprises a first amplification circuit which receives a first bias current; a second amplification circuit which receives a second bias current; an envelope detection circuit which outputs a direct current (DC) detection voltage based on an envelope of an input radio frequency (RF) signal; and a bias compensation circuit which compensates for the first bias current based on the second bias current in response to the DC detection voltage.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: January 12, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Kyu Jin Choi, Je Hee Cho
  • Patent number: 10892720
    Abstract: A control circuit includes a first output unit configured to output a constant bias current for setting an electrical bias state of a bias circuit to the bias circuit; a second output unit configured to output a bias control current or constant voltage for controlling the electrical bias state of the bias circuit to the bias circuit; a resistor having one end connected to a reference potential; and a switch provided between another end of the resistor and an output terminal of the second output unit.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: January 12, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takeyuki Okabe, Fuminori Morisawa, Mizuho Ishikawa, Yuri Honda
  • Patent number: 10879853
    Abstract: A bias circuit includes a current source to generate a reference current, a temperature compensation portion in an off-state in an initial start period in response to a first control signal, and in an on-state in a normal driving period, subsequent to the initial start period, and to receive a first current of the reference current, and a bias output portion to generate a warm up current based on the reference current in the initial start period and to generate a bias current based on a second current, which is lower than the reference current by an amount of the first current, in the normal driving period.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: December 29, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Byeong Hak Jo, Jong Ok Ha, Young Wong Jang, Jeong Hoon Kim
  • Patent number: 10601374
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: March 24, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Hidetoshi Matsumoto
  • Patent number: 10601386
    Abstract: An automatic gain control circuit for controlling an LNA for inputting signals carrying packets, the automatic gain control circuit can perform a background calibration in the non-preamble time region of a first packet for pre-determining a gain adjustment to the LNA before the next preamble of a second packet arrives, so that the gain of the LNA can be adjusted immediately according to the pre-determined gain adjustment when the next preamble of the second packet arrives.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: March 24, 2020
    Assignee: Rafael Microelectronics, Inc.
    Inventors: Meng-Ping Kan, Kuan-Ming Chen, Benjamin Chiang, Tzy-Yun Wang
  • Patent number: 10560055
    Abstract: A radio frequency (RF) power combining amplifier circuit has a circuit input and a circuit output. A first amplifier is connected to the circuit input and to a first bias input. A first output matching network is connected to an output of the first amplifier and to the circuit output. A second amplifier is connected to the circuit input and to a second bias input. A second output matching network is connected to an output of the second amplifier, and to the circuit output. A voltage level of an input signal applied to the circuit input, together with the respective first bias input and the second bias input, selectively activates the first amplifier and the second amplifier.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: February 11, 2020
    Assignee: Skyworks Solutions, Inc.
    Inventor: Qiang Li
  • Patent number: 10523260
    Abstract: Base station antennas utilize RF transmitters and receivers, which operate with enhanced bias control to achieve very high speed switching during TDD operation. A radio frequency communication circuit for TDD includes a transmit/receive amplifier (e.g., MMIC) having first and second input terminals, which are responsive to a bias control voltage and radio frequency input signal. A bias control circuit is provided, which is electrically coupled to the first input terminal and a current receiving terminal of the transmit/receive amplifier. The bias control circuit includes a closed-loop feedback path between the current receiving terminal and the first input terminal, which is configured to regulate a magnitude of the bias control voltage with high precision to thereby achieve a substantially constant quiescent bias current at the current receiving terminal when the transmit/receive amplifier is enabled.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: December 31, 2019
    Assignee: CommScope Technologies LLC
    Inventor: Breck W. Lovinggood
  • Patent number: 10505562
    Abstract: An embodiment circuit includes a first reference source configured to provide a first reference signal to an analog-to-digital convertor (ADC). The circuit also includes a filter coupled to an output of the first reference source and configured to filter the first reference signal to produce a filtered first reference signal. The circuit further includes a second reference source coupled to an output of the filter. The second reference source is configured to provide a second reference signal to the ADC, and the second reference signal is generated based on the filtered first reference signal.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: December 10, 2019
    Assignee: STMicroelectronics International N.V.
    Inventors: Ashish Kumar, Chandrajit Debnath, Pratap Narayan Singh
  • Patent number: 10454450
    Abstract: A high frequency switch module (10) includes a switch device (20), a first inductor (30), and a filter device (40). The switch device (20) includes a shared terminal (P00) and selection target terminals (P02, P03) that are selectively connected to the shared terminal. The filter device (40) includes SAW filters (41, 42) connected to the selection target terminal (P02) and the selection target terminal (P03), respectively. A terminal of the SAW filters (41, 42) on the opposite side to the selection target terminals (P02, P03) is shared and connected to a front-end terminal (Pfe). The first inductor (30) is connected between the selection target terminal (P02) and the selection target terminal (P03).
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: October 22, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takanori Uejima
  • Patent number: 10447215
    Abstract: A current compensation circuit for providing a current to an amplifier circuit includes a first amplifier, a first transistor and a first bias circuit. The first bias circuit provides a first bias current to the first amplifier. The current compensation circuit includes a power detection circuit, an operational amplifier circuit and a current-to-voltage converter. The power detection circuit detects and converts an input power or an output power of the first amplifier to a first detection voltage. The operational amplifier circuit generates a second detection voltage according to the first detection voltage and a calibration voltage. The current-to-voltage converter converts the second detection voltage to a compensation current. A first compensation current flows to the first amplifier through the first transistor according to the compensation current, such that the first amplifier is driven by the first bias current plus the first compensation current.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: October 15, 2019
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Chang-Yi Chen
  • Patent number: 10439568
    Abstract: A transmission amplifier is provided for amplifying the signal in a wire-free transmission system. The transmission amplifier includes a pre-amplifier stage and an amplifier output stage that is coupled to the pre-amplifier stage. The amplifier output stage is configured with gate components and is configured to provide a signal fed in as an amplified output signal on the output side.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: October 8, 2019
    Assignee: Siemens Aktiengesellschaft
    Inventors: Franz Eiermann, Ralph Oppelt
  • Patent number: 10439560
    Abstract: Provided is a power amplification module that includes: a first power amplifier that amplifies a first signal and outputs a second signal; and a first noise removing circuit that is inputted with a first voltage supplied from a DC-DC converter, removes noise from the first voltage in order to generate a second voltage, and outputs the second voltage as a power supply voltage of the first power amplifier.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: October 8, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tsuyoshi Sato, Kiichiro Takenaka
  • Patent number: 10404212
    Abstract: The disclosure relates to technology for shifting a frequency range of a signal. In one aspect, a circuit comprises a frequency mixer, a frequency synthesizer configured to generate an oscillator signal, a programmable driver, and a controller. The programmable driver is configured to receive the oscillator signal from the frequency synthesizer and to provide the oscillator signal to the oscillator input of the frequency mixer. The programmable driver is configured to have a variable drive strength. The controller is configured to control the drive strength of the programmable driver based on a frequency of the oscillator signal to adjust a rise time and a fall time of the oscillator signal at the oscillator input of the frequency mixer.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: September 3, 2019
    Assignee: Futurewei Technologies, Inc.
    Inventors: Lawrence E. Connell, Kent Jaeger
  • Patent number: 10382026
    Abstract: A phase shift control circuit for a multi-channel system including a pulse control circuit and a current matching circuit is provided. The pulse control circuit includes first to third transistors, a front operational amplifier, comparers, a current mirror circuit, clock switch circuits and pulse generating circuits. The front operational amplifier has two input terminals connected to a voltage divider circuit and an output terminal of the first transistor respectively, and an output terminal connected to control terminals of all the transistors. One input terminal of the comparer is connected to an output terminal of the third transistor, and another input terminal of the comparer is connected to the output terminal of the first transistor or a reference voltage source. The pulse generators are connected to the comparers and the clock switch circuits respectively. The current mirror circuit is connected to the current matching circuit.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: August 13, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Fu-Chuan Chen
  • Patent number: 10320350
    Abstract: In accordance with an embodiment, a radio frequency (RF) amplifier circuit includes a switchable capacitance circuit having a first terminal configured to be coupled to an input matching inductor. The switchable capacitance circuit is configured to provide a short circuit between the first and second terminals in a first state, and provide a first capacitive impedance between the first and second terminals in a second state. The RF amplifier also includes a low noise amplifier (LNA) having an input terminal coupled to the second terminal of the switchable capacitance circuit; and a bypass switch coupled to an output of the LNA, the second terminal of the switchable capacitance circuit, and an output of the RF amplifier circuit. The bypass switch is configured to select the output of LNA in the first state, and select the second terminal of the switchable capacitance circuit in the second state.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: June 11, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Leitner, Daniel Schroegendorfer, Hans-Dieter Wohlmuth
  • Patent number: 10236834
    Abstract: A power amplifier module includes an amplifier that amplifies an input signal and outputs the amplified signal, a harmonic termination circuit that is disposed subsequent to the amplifier and that attenuates a harmonic component of the amplified signal, the harmonic termination circuit including at least one field effect transistor (FET), and a control circuit that controls a gate voltage of the at least one FET to adjust a capacitance value of a parasitic capacitance of the at least one FET. The control circuit adjusts the capacitance value of the parasitic capacitance of the at least one FET, and thereby a resonance frequency of the harmonic termination circuit is adjusted.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: March 19, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Yuji Shintomi, Satoshi Matsumura
  • Patent number: 10224892
    Abstract: Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: March 5, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Arayashiki, Satoshi Goto
  • Patent number: 10177712
    Abstract: A method and network equipment for controlling power amplification are disclosed. The method for controlling power amplification includes outputting a voltage signal according to the state of network equipment. When the network equipment is in an idle state, at least one power amplifier transistor is switched off according to a voltage signal.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: January 8, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Weimin Yin, Xikun Zhang, Jie Sun, Wei Chen, Yiping Sun, Yijun Sun
  • Patent number: 10171100
    Abstract: An embodiment circuit includes a first reference source configured to provide a first reference signal to an analog-to-digital convertor (ADC). The circuit also includes a filter coupled to an output of the first reference source and configured to filter the first reference signal to produce a filtered first reference signal. The circuit further includes a second reference source coupled to an output of the filter. The second reference source is configured to provide a second reference signal to the ADC, and the second reference signal is generated based on the filtered first reference signal.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: January 1, 2019
    Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
    Inventors: Ashish Kumar, Chandrajit Debnath, Pratap Narayan Singh
  • Patent number: 10164587
    Abstract: An electronically reconfigurable matching network having a plurality of electronically reconfigurable components is disclosed. Each of the plurality of electronically reconfigurable elements includes a plurality of selectable impedance elements coupled together. Each selectable impedance element includes an impedance element coupled between first and second end terminals and a field-effect transistor (FET)-based switch coupled between the first and second end terminals. The FET-based switch includes a first FET having first and second current terminals coupled to a first gate terminal and a second FET having a third current terminal coupled to the first gate terminal, a fourth current terminal, and a second gate terminal coupled to a first control terminal; and a third FET having a fifth current terminal coupled to the first end terminal, a sixth current terminal coupled to the second end terminal, and a third gate terminal coupled to the third current terminal.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: December 25, 2018
    Assignee: Qorvo US, Inc.
    Inventors: Charles Forrest Campbell, Kevin Wesley Kobayashi
  • Patent number: 10153737
    Abstract: A power amplifier module includes an amplifier that amplifies an input signal and outputs an amplified signal, an emitter follower transistor that supplies a bias signal to the amplifier to control a bias point of the amplifier, and a current source that supplies a control current which changes in accordance with a change in control voltage to a collector of the emitter follower transistor. The current source limits the control current to not greater than an upper limit.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: December 11, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Yusuke Shimamune
  • Patent number: 10141890
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: November 27, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Hidetoshi Matsumoto
  • Patent number: 10063144
    Abstract: A multi-phase buck converter comprises a first comparator, a second comparator and a counter. The first comparator has a first node connected to a first voltage reference and a second node. The second comparator has a first node connected to a second voltage reference and a second node. The second node of the second comparator and the second node of the first comparator are together connected to an input voltage from an active phase of the buck converter. The counter is configured to adjust a number of active phases of the buck converter based on the input voltage.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: August 28, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Alan Drake, Eric Soenen, Alan Roth, Russell Kinder
  • Patent number: 10033336
    Abstract: Power amplification system with adaptive bias control. In some embodiments a power amplification system includes a power amplifier including a radio-frequency (RF) input terminal for receiving an RF signal, an RF output terminal for providing an amplified RF signal, a supply voltage terminal for receiving a power amplifier supply voltage to power the power amplifier, and one or more bias terminals for receiving one or more bias signals. The power amplification system also includes a bias controller configured to provide the one or more bias signals to the one or more bias terminals, at least one of the one or more bias signals being based on the power amplifier supply voltage.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: July 24, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventors: Matthew Lee Banowetz, Philip H. Thompson
  • Patent number: 9979367
    Abstract: A circuit having a first amplifier with a variable gain, a second amplifier with a variable gain configured to provide an output signal, a control unit, a memory element, and a switching member. The control unit is configured to adjust the variable gain of the first amplifier and the variable gain of the second amplifier. The memory element is configured to store a sample of the output signal. The switching member is configured to connect an output port of the circuit to either the second amplifier or to the memory element. A method of operating this circuit is also disclosed.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: May 22, 2018
    Assignee: TDK Corporation
    Inventors: Pirmin Hermann Otto Rombach, Niels Marker-Villumsen
  • Patent number: 9941842
    Abstract: A power amplifier bias circuit having high dynamic range and low memory is disclosed. In an exemplary embodiment, an apparatus includes an output stage configured to generate a biased RF signal based on a first DC signal and a filtered signal. The apparatus also includes a low pass filter configured to filter the biased RF signal to generate the filtered signal.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: April 10, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Shu-Hsien Liao, Feipeng Wang, Cheng-Han Wang
  • Patent number: 9906318
    Abstract: An apparatus is disclosed that includes a frequency multiplexer circuit coupled to an input node and configured to receive an input signal via the input node. The frequency multiplexer circuit comprises a first filter circuit, a second filter circuit, and a third filter circuit. The apparatus also includes a switching circuit that is configurable to couple at least two of a first output of the first filter circuit, a second output of the second filter circuit, or a third output of the third filter circuit to a single output port.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: February 27, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Chengjie Zuo, Daeik Daniel Kim, David Francis Berdy, Changhan Hobie Yun, Je-Hsiung Jeffrey Lan, Robert Paul Mikulka, Mario Francisco Velez, Jonghae Kim, Matthew Michael Nowak, Ryan Scott C. Spring, Xiangdong Zhang
  • Patent number: 9887669
    Abstract: A power amplifier module that includes a power amplifier and a controller is presented herein. The power amplifier module may include a set of transistor stages and a plurality of bias circuits. At least one transistor stage from the set of transistor stages may be in electrical communication with a first bias circuit and a second bias circuit from the plurality of bias circuits. The first bias circuit can be configured to apply a first bias voltage to the at least one transistor stage and the second bias circuit can be configured to apply a second bias voltage to the at least one transistor stage. The controller may be configured to activate one of the first bias circuit and the second bias circuit.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: February 6, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventors: Ying Shi, Jinghang Feng
  • Patent number: 9887679
    Abstract: A power amplifier gain switching circuit includes: a gain controller configured to receive an external input signal, output a first input signal, receive an external drive signal, and output a control signal based on the drive signal; an amplifier including: a bias input terminal configured to receive an external bias voltage; a signal input terminal configured to receive the first input signal; a control terminal configured to receive the control signal; and an output terminal configured to output an output signal with a gain; wherein the amplifier is configured to switch a gain factor of the output signal based on the control signal.
    Type: Grant
    Filed: January 29, 2017
    Date of Patent: February 6, 2018
    Assignee: LANSUS TECHNOLOGIES INC.
    Inventors: Qian Zhao, Liyang Zhang, Hua Long, Zhenjuan Cheng, Dongjie Tang
  • Patent number: 9854541
    Abstract: A communication device for power saving and a method for controlling power thereof are provided. The communication device includes a power amplifying unit and a control unit. The power amplifying unit generates an output signal obtained by amplifying a downlink signal, using a supply voltage, and outputs the output signal. The control unit determines a current state by comparing predetermined downlink reference information with output signal information on the output signal, and, if the current state is an active state as a comparison result, controls the supply voltage to correspond to the output signal information. Accordingly, power for amplifying a signal can be controlled according to communication traffic, thereby preventing consumption of unnecessary power.
    Type: Grant
    Filed: November 11, 2015
    Date of Patent: December 26, 2017
    Assignee: SOLiD, INC.
    Inventor: Hwan Sun Lee
  • Patent number: 9837964
    Abstract: The disclosure discloses an amplifier system and a device The amplifier system includes: at least two stages of amplifiers which are sequentially connected, wherein a static working current value of an Nth-stage amplifier in the at least two stages of amplifiers is a value obtained by decreasing a first value by a first pre-set multiple, and a static working current value of an (N?1)th-stage amplifier in the at least two stages of amplifiers is a value obtained by increasing a second value by a second pre-set multiple; the first value is a recommended static working current value corresponding to the Nth-stage amplifier, wherein N is any integer greater than or equal to 2; and the second value is a recommended static working current value corresponding to the (N?1)th-stage amplifier. The solution effectively improves power amplification efficiency in a case of guaranteeing a linearity of a power amplification link.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: December 5, 2017
    Assignee: XI'AN ZHONGXING NEW SOFTWARE CO. LTD.
    Inventors: Huazhang Chen, Fan Zhang, Xiaojun Cui
  • Patent number: 9793864
    Abstract: A voltage detecting apparatus includes a signal extracting circuit configured to extract a coupled signal from a signal output by a power amplifier configured to amplify a signal output by a radio frequency (RF) circuit, and a voltage detecting circuit configured to detect a detection voltage from the coupled signal and provide the detection voltage to the RF circuit. The voltage detecting circuit configured to vary the detection voltage in response to an input control signal.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: October 17, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Goo Won, Youn Suk Kim, Ki Joong Kim, Da Hye Park
  • Patent number: 9762189
    Abstract: Systems and methods are provided for dynamically biasing power amplifiers. In particular, dynamic biasing of a power amplifier may be controlled, with the controlling comprising receiving an input signal that is to be amplified; processing the input signal; generating based on said processing of the input signal input signal, a plurality of control signals comprising at least one biasing control signal; and applying the plurality of control signals to one or more control elements that are used in driving and/or control of the power amplifier. The one or more control elements may comprise at least one biasing component that adjusts biasing applied to power amplifier.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: September 12, 2017
    Assignee: MAXLINEAR, INC.
    Inventors: Rahul Bhatia, Timothy Gallagher, Raja Pullela, Sridhar Ramesh
  • Patent number: 9735745
    Abstract: A power amplifier apparatus includes: an amplifier configured to amplify an input signal; a sensing circuit connected to the amplifier and configured to sense a bias of the amplifier; and a biasing circuit connected to the sensing circuit and configured to provide a biasing current to the amplifier, wherein the sensing circuit is configured to change the biasing current based on the bias of the amplifier.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: August 15, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Kwang Du Lee, Ho Kwon Yoon, Jong Ok Ha, Kyung Hee Hong, Shinichi Iizuka, Jae Hyouck Choi, Suk Chan Kang
  • Patent number: 9735739
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: August 15, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Hidetoshi Matsumoto
  • Patent number: 9685918
    Abstract: A radio frequency (RF) power combining amplifier circuit has a circuit input and a circuit output. A first amplifier is connected to the circuit input and to a first bias input. A first output matching network is connected to an output of the first amplifier and to the circuit output. A second amplifier is connected to the circuit input and to a second bias input. A second output matching network is connected to an output of the second amplifier, and to the circuit output. A voltage level of an input signal applied to the circuit input, together with the respective first bias input and the second bias input, selectively activates the first amplifier and the second amplifier.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: June 20, 2017
    Assignee: Skyworks Solutions, Inc.
    Inventor: Qiang Li
  • Patent number: 9667351
    Abstract: An optical communication system, a linear optical receiver, and an Integrated Circuit (IC) chip are disclosed, among other things. One example of the disclosed IC chip includes a transimpedance amplifier that receives an input electrical signal from a photodiode and provides an amplified version of the input electrical signal as an output, at least one variable gain amplifier that receives the amplified electrical signal output by the transimpedance amplifier and a bandwidth control mechanism that extends a bandwidth of the second amplified output at a maximum gain of the second amplification phase and also reduces a peaking of the second amplified output at a minimum gain of the second amplification phase.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: May 30, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Behrooz Nakhkoob, Georgios Asmanis, Faouzi Chaahoub
  • Patent number: 9660595
    Abstract: Disclosed herein is a linear amplifier using a nonlinear amplifying stage which includes a first amplifier and a second amplifier connected in cascade, including: a bias voltage generator in which a first bias voltage is applied to a gate terminal of the first amplifier, and a second bias voltage higher than the first bias voltage is applied to a gate terminal of the second amplifier, wherein the first amplifier and the second amplifier have a nonlinear gain characteristic in a region of arbitrary output power, and as the output power increases in the region of arbitrary output power, a gain of the first amplifier increases, while a gain of the second amplifier decreases.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: May 23, 2017
    Assignee: SOONGSIL UNIVERSITY RESEARCH CONSORTIUM TECHNO-PARK
    Inventors: Chang Kun Park, Jong Hoon Park
  • Patent number: 9660737
    Abstract: An electronic device which operates in response to multi-frequency bands is provided. The electronic device includes an antenna, a reception module configured to amplify a signal received through the antenna and distribute the amplified signal according to the multi-frequency bands, and a circuit unit configured to process signals included in the multi-frequency bands.
    Type: Grant
    Filed: May 6, 2015
    Date of Patent: May 23, 2017
    Assignee: Samsung Electronic Co., Ltd.
    Inventors: Min Chull Paik, Hyun Hee Kim, Na Young Hwang
  • Patent number: 9628039
    Abstract: Provided is a power amplification module that includes: a first amplification circuit that amplifies a first signal and outputs the amplified first signal as a second signal; a second amplification circuit that amplifies the second signal and outputs the amplified second signal as a third signal; and a feedback circuit that re-inputs/feeds back the second signal outputted from the first amplification circuit to the first amplification circuit as the first signal. The operation of the first amplification circuit is halted and the first signal passes through the feedback circuit and is outputted as the second signal at the time of a low power output mode.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: April 18, 2017
    Assignee: MURATA MANUFACTURING CO., LTD
    Inventor: Shota Ishihara
  • Patent number: 9608571
    Abstract: Aspects of the present disclosure are generally directed to a power supply for generating an output supply voltage. The power supply generally includes a variable voltage supply configured to generate an intermediate supply voltage based on a reference signal, a correction circuit configured to generate an error signal based on the output supply voltage or the intermediate supply voltage, and a combiner configured to combine the intermediate supply voltage and the error signal to provide the output supply voltage.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: March 28, 2017
    Assignee: SNAPTRACK, INC.
    Inventors: Martin Wilson, Shane Flint