Abstract: An amplifier includes a modulation coder receiving an original modulation signal and generating an amplitude signal and a phase signal, a voltage adjusting instrument which generates an amplitude modulation signal from the amplitude signal, a carrier generator generating a phase modulation signal from the phase signal, and an amplification device receiving the phase modulation signal and the amplitude modulation signal serving as a bias voltage and outputting a modulation signal obtained by restoring and amplifying the original modulation signal. The voltage adjusting instrument determines a DC offset voltage on the basis of a level control signal indicating the level of the amplitude modulation signal and generates the amplitude modulation signal to which the DC offset voltage is added.

Abstract: Multi-segment gain control system. Apparatus is provided for a multi-segment gain control. The apparatus includes logic to convert a gain control signal to an exponential signal, and logic to map the exponential signal to multiple control signals that are used to control multiple gain stages to produce linear multi-segment gain control.

Abstract: Provided is a low power consuming mixed mode amplifier.

Abstract: Aspects of a method and system for polar modulating OFDM signals with discontinuous phase may include amplifying an OFDM signal via a plurality of amplifiers such that a combined gain of the plurality of amplifiers comprises a coarse amplitude gain and an amplitude offset gain. A gain of one or more of the plurality of amplifiers may be adjusted to set the coarse amplitude gain, and a gain of one or more remaining ones of the plurality of amplifiers may be adjusted to set the amplitude offset gain. The setting of the coarse amplitude gain and/or the amplitude offset gain may be adjusted dynamically and/or adaptively.

Abstract: Aspects of a method and system for polar modulating QAM signals with discontinuous phase may include amplifying a signal via a plurality of amplifiers such that a combined gain of the plurality of amplifiers comprises a coarse amplitude gain and an amplitude offset gain. A gain of one or more of the plurality of amplifiers may be adjusted to set the coarse amplitude gain, and a gain of one or more remaining ones of the plurality of amplifiers may be adjusted to set the amplitude offset gain. The setting of the coarse amplitude gain and/or said amplitude offset gain may be adjusted dynamically and/or adaptively. The signal may be generated by phase-modulation of a radio-frequency carrier. The combined gain of the plurality of amplifiers may be controlled based on a desired amplitude modulation. The plurality of amplifiers may be integrated within an integrated circuit (IC) or chip.

Abstract: Aspects of a method and system for polar modulation with discontinuous phase for RF Transmitters with power control may include amplifying a signal via a plurality of amplifiers such that a combined gain of the plurality of amplifiers comprises a coarse amplitude gain, a power level gain and an amplitude offset gain. A gain of one or more of the plurality of amplifiers may be adjusted to set the coarse amplitude gain and the power level gain. A gain of one or more remaining ones of the plurality of amplifiers may be adjusted to set the amplitude offset gain. The setting of the coarse amplitude gain, the power level gain and/or the amplitude offset gain may be adjusted dynamically and/or adaptively.

Abstract: Aspects of a method and system for amplitude calibration for polar modulation with discontinuous phase may include amplifying a signal via a plurality of amplifiers such that a combined gain of the plurality of amplifiers comprises a coarse amplitude gain, an amplitude offset gain and a calibration gain. A gain of one or more of the plurality of amplifiers may be adjusted to set the coarse amplitude gain, and a gain of one or more remaining ones of the plurality of amplifiers may be adjusted to set the amplitude offset gain and the calibration gain. The setting of the coarse amplitude gain, the calibration gain and/or said amplitude offset gain may be adjusted dynamically and/or adaptively.

Abstract: A power amplifier is configured to operate in a first gain mode and a second gain mode. A first power amplifier input stage has an input and an output. A second power amplifier input stage has an input and an output, where the output of the second power amplifier input stage is coupled to the output of the first power amplifier input stage. The first input stage is turned on in response to a first bias voltage in the first gain mode and the second input stage is turned on in response to a second bias voltage in the second gain mode. Alternatively, a first input stage and an intermediate stage can be switched off by turning off their respective bias voltages, and a second input stage can be switched on by turning on its respective bias voltage; the intermediate stage and the second input stage sharing a common output.

Abstract: A post-distortion method for cascading amplifier stages in a two-stage microwave power amplifier and a dynamic biasing method using back-end processing for correcting nonlinearity in the power amplifier output. A first or driver stage biased in a near-A region with low distortion is cascaded with a second or power stage biased in a near-C region with high efficiency. The amplitude and phase responses of the two stages compensate another to yield a more linear overall gain for the overall power amplifier. The dynamic biasing scheme modulates the source to drain voltages of the transistors used in the amplifier stages based on the harmonics in amplifier output in order to minimize the harmonics and correct non-linearity in the output.

Abstract: Smart transmitter system that includes apparatus for an automatic gain control circuit. The apparatus includes a circuit translates a transmit power control signal to produce a linear signal, and a first mapping circuit that maps the linear signal to a first control signal that is coupled to a variable gain amplifier (VGA). The apparatus also includes a power amplifier (PA) control circuit that receives the linear signal and a transmit signal to produce a second control signal that is coupled to a power amplifier.

Abstract: Methods and systems for amplifying signals are provided. Embodiments include a three-to-one multiplexer, a multiband RF variable gain amplifier (VGA), a multiband power amplifier driver (PAD), and a one-to three multiplexer. The three-to-one multiplexer receives three input signals from an RF frequency source and outputs an output signal corresponding one input signal. The multiband RF VGA receives the output signal of the three-to-one multiplexer, provides a first level of amplification to the signal received from the three-to-one multiplexer, and outputs an amplified version of the signal. The multiband PAD receives the signal output by the multiband RF variable gain amplifier and provides a second level of amplification to the signal and outputs an amplified version of the signal. The one-to-three multiplexer receives a signal output by the multiband PAD produces three output signals that correspond to each of the three input signals.

Abstract: A bias control circuit for an RF amplifier having an output device for providing an output signal to a load and a driver device for driving the output device includes a current mirror circuit for providing a driver device bias current to the driver device and an output device bias current to the output device. When the amplifier operates in a high power mode, the current mirror circuit supplies the driver device bias current at a level to turn on the driver device at a high current level and an output device bias current to turn on the output device. When the amplifier operates in a low power mode, the current mirror circuit supplies a driver device bias current to turn on the driver device at a reduced current level and an output device bias current to turn off the output device.

Abstract: There are provided an RF power amplifier transistor (2), a bias supply circuit (51) which supplies a bias current to the base of the RF power amplifier transistor and a bias control circuit (52) connected between the base of the RF power amplifier transistor and bias supply circuit, and the bias control circuit is connected to the power supply (32) of the RF power amplifier transistor, thus realizing high efficiency of the RF power amplifier when the power level is low and improving the temperature characteristic of the power amplifier when the power level is low.

Abstract: A fine granularity, wide-range variable gain amplifier (“VGA”) comprises an attenuator, a high gain signal path, a low gain signal path and a gain adjustment control to adjust a gain of the VGA, wherein the gain adjustment control is configured to cause a selective activation of at least a portion of the low gain signal path or the high gain signal path to achieve a desired overall gain.

Abstract: A method and a low noise amplifier are provided such that the low noise amplifier has a power dissipation that is adaptive to the noise interference levels. The low noise amplifer includes (i) first, second and third differential amplifiers connected in series each having a terminal for receiving a power supply current; and (ii) first and second switches responsive to a control signal, the first and second switches configured such that, (a) when the control signal is in a first state, the first switch and the second switch enable independent currents to flow in the terminals for receiving a power supply current; and (b) otherwise, the first switch and the second switch enable the terminal for receiving a power supply current of the second differential amplifier to reuse a current provided to the terminal for receiving a power supply current of the third differential amplifier. The control signal is provided by a radio frequency noise power detector, which senses an output signal of the low noise amplifier.

Abstract: A bias control circuit for an RF amplifier having an output device for providing an output signal to a load and a driver device for driving the output device includes a current mirror circuit for providing a driver device bias current to the driver device and an output device bias current to the output device. When the amplifier operates in a high power mode, the current mirror circuit supplies the driver device bias current at a level to turn on the driver device at a high current level and an output device bias current to turn on the output device. When the amplifier operates in a low power mode, the current mirror circuit supplies a driver device bias current to turn on the driver device at a reduced current level and an output device bias current to turn off the output device.

Abstract: According to an exemplary embodiment, a multimode power amplifier configured to receive an RF input signal and provide an RF output signal in linear and saturated operating modes includes an output stage configured to receive a fixed supply voltage and to provide the RF output signal. The multimode power amplifier further includes at least one driver stage coupled to the output stage, where the at least one driver stage is configured to receive the RF input signal and an adjustable supply voltage. The adjustable supply voltage controls an RF output power of the RF output signal when the multimode power amplifier is in the saturated operating mode. The at least one driver and the output stage are each biased by a low impedance voltage in the linear and saturated operating modes. The adjustable supply voltage can be controlled by a fixed control voltage in the linear operating mode.

Abstract: An amplifier control system for regulating the gain of a controlled amplifier. The control system comprises a first signal source for generating a first reference signal. A replica amplifier representative of the controlled amplifier generates an output signal in dependence on the first reference signal. A second signal source generates a second reference signal representative of the product of the first reference signal and a worst case value of the gain of the controlled amplifier. A comparator generates an error signal in dependence on any difference between the second reference signal and the output from the replica amplifier. A negative feedback loop varies the gain of the controlled amplifier and the replica amplifier in dependence on the error signal.

Abstract: In a high frequency power amplifier circuit in which bias voltages are applied to the transistors for amplification by current mirroring, The power amplifier includes a detection circuit including a transistor for detection which receives the AC component of an input signal to the last-stage transistor for amplification at its control terminal, a current mirror circuit which mirrors current flowing through that transistor, and a current-voltage converter which converts current flowing in the slave side of the current mirror circuit into a voltage. In the detection circuit, a voltage from a bias circuit for generating the bias voltages for the transistors for amplification is applied to the control terminal of the transistor for detections, and output of the detection circuit is applied to the control terminal of the last-stage transistor for amplification.

Abstract: A DC/DC converter capable of controlling an output signal using a broadband signal input is provided. By employing the above DC/DC converter as a power supply, a highly efficient power amplifier can be configured. The above DC/DC converter includes two class-C amplifiers, a rectifier circuit connected between each output of the two class-C amplifiers, and an oscillator of a predetermined frequency signal. The predetermined frequency signal output from the oscillator is input to each of the two class-C amplifiers, and by controlling the phase difference of the predetermined frequency signal input to the two class-C amplifiers, the magnitude of a direct current voltage output from the rectifier circuit is made variable.

Abstract: Aspects of the invention provide a system for a mixed analog-digital automatic gain control. The received analog signal is amplified by the analog amplifier and then converted to a digital value by an ADC. A clamp reference level of the converted signal is removed prior to applying a digital gain to a digital multiplied. Once the digital gain is applied, the clamp reference level is restored to the digital signal. A loop filter determines the system time response from the error between an amplitude parameter of the received signal and an AGC reference level. A gain separation circuit generates the system gain and separates it into a digital gain and an analog gain in a way to maximize the use of the analog amplifier. The analog gain is applied to the analog amplifier and the digital gain is applied to the digital multiplier.

Abstract: By using a radio-frequency power amplifier which turns off an Nth stage radio-frequency amplifying transistor when the level of radio-frequency output power falls below a predetermined value, it is possible to improve the linearity when the level of the radio-frequency output power is so low.

Abstract: A gain adjustment circuit includes a gain varying device for varying the gain of an input signal; and a detection device for detecting a variable output signal of the gain varying device, wherein the detection output signal of the detection device is fed back to the gain varying device.

Abstract: In a base-bias-control-type high-frequency power amplifier with a plural stage configuration, a rising voltage of a base bias current supplied to an initial stage transistor is made lower than a rising voltage of a base bias current supplied to a second stage transistor by a bias circuit, and a difference between the both voltages is set to be smaller than a base-emitter voltage of an amplifying stage transistor. Also, a rising voltage of a base bias current supplied to a third stage transistor is made equal to the rising voltage of the base bias current supplied to an initial stage transistor. Accordingly, a technology capable of improving the power control linearity can be provided in a high-frequency power amplifier used in a polar-loop transmitter or the like.

Abstract: A power amplifier stage has a first amplifier subsection and a second amplifier subsection coupled in a parallel configuration. The first amplifier subsection receives a signal to be amplified and the second amplifier subsection receives the signal to be amplified via a first delay line. The amplified output signal of the first amplifier subsection is passed through a second impedance inverter and is combined with the amplified output signal from the second amplifier subsection. In a low power mode, the first amplifier subsection operates as a linear amplifier and the second subsection is biased off. In a high power mode, both the first and second amplifier subsections operate as linear amplifiers. Selecting the impedances of the second delay element and the first amplifier to be equal is essential for high power mode operation and greatly improves the amplifier efficiency in the low power mode.

Abstract: An analog multistage amplification circuit for keeping the total gain of analog amplifiers constant while automatically controlling gain of the amplifiers in accordance with an input signal level and improving the S/N ratio of the output signal. The amplification circuit includes an input stage amplifier, an output stage amplifier, a filter connected between the input and output stage amplifiers, an auto gain control circuit for generating a control signal for controlling the gain of the input stage amplifier based on the output signal of the input stage amplifier so that the output signal has a maximum level, and a first gain adjustment circuit for generating an adjustment signal for adjusting the gain of the output stage amplifier so that the total gain of the input and output stage amplifiers is kept constant in accordance with the control signal of the auto gain control circuit.

Abstract: A method (200) and radio frequency amplifier circuit (100) for adjusting a gain setting of a power amplifier (102) and a gain setting of a power amplifier driver (106) that form part of the radio frequency amplifier circuit (100). The method (200) includes selecting (220) a power output value for the power amplifier and an associated constant envelope modulated radio frequency signal supplied by the power amplifier driver (106) to the power amplifier (102) and then sensing variations (240) in a power output value of the power amplifier (102). Next there is performed adjusting (250) both the gain setting of the power amplifier (102) and adjusting the gain setting of the power amplifier driver (106) in response to the sensing so that the constant envelope modulated signal is within a linear operating region of the power amplifier (102). The gain settings of the power amplifier (102) and power amplifier driver (106) are concurrently adjusted until the power output value for the power amplifier is achieved.

Abstract: A radio frequency (RF) power amplifier, including an external control loop and a protection circuit, which functions to maintain a constant output power during variations in impedance on the RF load. In the external control loop a collector current from an output transistor is detected and then regulated with respect to a reference current. The regulated signal is utilised to generate a bias control signal which is input to the base electrode of both a driver transistor and the output transistor. The protection circuit detects a voltage envelope at the collector electrode of the output transistor and utilises this signal to form a bias reduction signal which is input to the base electrode of the driver transistor.

Abstract: The present invention discloses an apparatus for generating an output signal according to an input signal, including a signal generating circuit for generating a first and a second control signal according to the input signal; a first output stage has a first amplifying configuration for receiving the first control signal; and a second output stage has a second amplifying configuration for receiving the second control signal, wherein the first amplifying configuration is different from the second amplifying configuration.

Abstract: This invention relates to a method for controlling an amplification within a receiver. The gain of a variable gain amplifier which amplifies an input signal to obtain a gain-controlled signal is set. Said gain controlled signal is analog-to-digital converted. Thereby digital words are generated. Each digital word has a value out of a plurality of possible digital values. Digital words having a value within a first and a second subset of the possible digital values are counted in order to generate a first and a second counter value. The gain is set in accordance with the first and second counter values in a fashion that all counter values are as equal as possible. Furthermore, this invention is related to a circuit to be used within a receiver for adjusting the gain of a variable gain amplifier in order to ensure a proper analog-to-digital conversion.

Abstract: A second single-ended receiver having a first stage for receiving an input signal and outputting a pair of corresponding output signals, and a second stage for receiving the pair of output signals and outputting a corresponding single output signal. First and second pull-down transistors are coupled to first and second inputs to the first stage. A bias circuit electrically biases the first stage, second stage, and first and second pull-down transistors, and a power supply provides power to those components.

Abstract: Systems and techniques are described for applying a polar bias modulation having a phase component and an amplitude component to a signal amplified by a power amplifier. The power amplifier (PA) has a plurality of amplifier gain stages and is configured to amplify an input to create an amplifier output signal. The input to the power amplitude is phase modulated based upon the phase component of the polar bias modulation, but need not be amplitude modulated. Amplitude modulation is provided by logic that includes a detector configured to receive an indication of the amplifier output as a feedback signal, a control module configured to generate a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation, and a bias circuit configured to adjust a bias signal associated with at least one of the plurality of amplifier gain stages in response to the control signal.

Abstract: Systems and methods are disclosed for providing automatic gain control of a multi-stage system. A method can include defining at least one parameter that is adapted to at least one of maximize hardware capacity of each of a plurality of gain stages and mitigate part-to-part variations of the multi-stage system. An order is selected for training the plurality of stages based on relative noise dominance for the plurality of stage. For a given stage of the plurality of stages, which is selected according to the selected order, output signals of the multi-stage system are measured over a plurality of gain settings for the given stage. A gain setting of the given stage of the multi-stage system also is configured based on the measured output signals relative to the at least one parameter defined for the given stage. The plurality of gain stages can include an analog equalizer as well programmable gain amplifiers connected in series.

Abstract: An RF power module in which operating voltage is controlled by a control signal based on amplitude information includes a temperature detecting device which is provided over a semiconductor chip formed with an amplifying transistor or a semiconductor chip formed with a power source circuit; and a detector having a hysteresis characteristic which is provided over the semiconductor chip formed with the device or a different semiconductor chip, applies a bias to the temperature detecting device to compare the state of the device at two reference levels, outputs a signal indicating abnormality when judging that the temperature of the semiconductor chip formed with the temperature detecting device is above a predetermined temperature, and outputs a signal indicating normality when judging that the temperature of the semiconductor chip is below a second predetermined temperature lower than the predetermined temperature.

Abstract: In a high frequency power amplifier circuit in which bias voltages are applied to the transistors for amplification by current mirroring, this invention enables preventing waveform distortion near the peak output power level by allowing sufficient idle currents to flow through the transistors for amplification, while enhancing the power efficiency in a low output power region. The power amplifier includes a detection circuit comprising a transistor for detection which receives the AC component of an input signal to the last-stage transistor for amplification at its control terminal, a current mirror circuit which mirrors current flowing through that transistor, and a current-voltage conversion means which converts current flowing in the slave side of the current mirror circuit into a voltage.

Abstract: A method of controlling output power in a power amplifier having a driver stage and an output stage. The driver current is measured and the output stage biased in dependence upon the measured driver current.

Abstract: A high-frequency circuit device is provided that is conformable to both of the TDMA system and the CDMA system as well as a plurality of frequency bands and achieves low cost and low power consumption. The high-frequency circuit device has a configuration including a transmission amplifier circuit for transmitting high-frequency power from an antenna that is composed of a high-frequency amplifier that is shared in the TDMA system and the CDMA system, a duplexer that is provided for performing simultaneous transmission/reception according to the CDMA system, upstream and downstream switch circuits in the direction of transmission that are provided so as to sandwich the duplexer between the transmission amplifier circuit and the antenna and are switched on when the simultaneous transmission/reception is performed according to the CDMA system, and a bypass switch circuit that bypasses the upstream and downstream switch circuits and the duplexer.

Abstract: A method for compensating a power amplifier based on operational-based changes begins by measuring one of a plurality of operational parameters of the power amplifier to produce a measured operational parameter. The method continues by comparing the measured operational parameter with a corresponding one of a plurality of desired operational parameter settings. The method continues by, when the comparing of the measured operational parameter with the corresponding one of a plurality of desired operational parameter settings is unfavorable, determining a difference between the measured operational parameter and the corresponding one of a plurality of desired operational parameter settings. The method continues by calibrating the one of the plurality of operational settings based on the difference.

Abstract: A method and apparatus for biasing an amplifying device whereby the bias current tracks the input power or the power level of a control signal to thereby efficiently match the bias current with needs of the amplifying device. This method and apparatus overcomes the drawbacks of the prior art by biasing, not for maximum output power, but for the power level of the input signal or the control signal. In one embodiment a current conditioner operates in connection with the self adjusting biasing circuit to scale or adjust, potentially on an exponential basis, the biasing current for one or more amplifier stages. A cancellation current source may be configured within the bias circuit to cancel unneeded current to further minimize current consumption.

Abstract: The receiver is provided which comprises a mixer, a low pass filter coupled to the mixer and a plurality of gain controllers serially coupled to an output of the low pass filter (LPF). A plurality of analog-to-digital converters (ADCs) is coupled so that an input of a first of the ADCs is coupled to the output of the LPF. An input of each of a remaining portion of the ADCs is individually coupled to a corresponding output of each of the serially coupled gain blocks. An output path traced from the output of the LPF to an output of each of the analog-to-digital converters may be referred to as a processing path. Each processing path may comprise a gain controller and an ADC, except for the first processing path, which may have an ADC coupled directly to the output of the LPF.

Abstract: A power amplifier includes amplifier stages. An amplifier stage includes a transistor, and at least one amplifier stage comprises a driver stage. The amplifier stages include a first amplifier stage having a first transistor and associated with a first output power, and a second amplifier stage having a second transistor and associated with a second output power. A current sharing coupling couples the first amplifier stage and the second amplifier stage. The first amplifier stage and the second amplifier stage share a current through the current sharing coupling. The current sharing coupling facilitates scaling of the first output power and the second output power.

Abstract: A linear power efficient radio frequency (RF) driver system (100) includes a pre-driver amplifier (105) for amplifying an RF signal; and an output driver (107) having a substantially high impedance input for amplifying the signal from the pre-driver amplifier (105). A bias controller (109) is used for controlling the RF power output of the output driver (107) where the current drain of the pre-driver amplifier (105) and the bias controller (109) are controlled to a minimum level while maintaining linearity of the output driver (107). The system and method of the invention work to provide minimal current drain in portable products using simultaneous current and power amplifier reduction based on driver input swing to lower signal distortion.

Abstract: A power amplifier with a multi-mode digital bias control circuit is provided. The power amplifier utilizes a complementary reference voltage generation circuit and a bias current-control circuit to generate a plurality of bias current levels for different output power levels. In an embodiment of the present invention, the power amplifier circuit is connected to a reference voltage and two control signals. Depending on the desired output power level, the control signals set the corresponding bias current in the amplifying transistors, to ensure sufficient linearity. The power amplifier is capable of operating at a very low quiescent current level, for example, 5 mA. As a result, a significant improvement in the power amplifier's overall efficiency is achieved, and the battery talk time of a wireless communication device is increased. The invention finds application in wireless communication devices such as CDMA, WCDMA, EDGE and WLAN mobile devices.

Abstract: A bypass circuit is disclosed for use with lower power supply voltage PC cards. The bypass circuit controls the power supply voltage fed to a power amplifier when switching between a lower power 8-PSK modulation mode and a higher power GMSK modulation mode. A step-up DC/DC converter provides a higher voltage to the power amplifier than can be supplied by an original power supply. Switch control logic controls a step-up switch and a battery switch. The step-up switch is turned on when operating in an 8-PSK modulation mode to provide a higher voltage to the power amplifier than the original power supply voltage. The battery switch is turned on when operating in the GMSK modulation mode to provide the original power supply voltage to the power amplifier.

Abstract: Providing a high frequency power amplifier circuit and a radio communication system which can control output power by a power voltage, produce sufficient output power in high regions of demanded output power and improve power efficiency in low regions of demanded output power. In a high frequency power amplifier circuit (RF power module) which comprises two or more cascaded FETs for amplification and controls output power by controlling power voltages of the FETs for amplification to gate terminals of which bias voltages of a predetermined level are applied, different transistors for power voltage control are provided for a last-stage FET for amplification and preceding-stage FETs for amplification. The transistors for power voltage control generate and apply the power voltage so that the preceding-stage FETs for amplification saturate when a demanded output level is relatively low.

Abstract: A multistage high frequency power amplifier-circuit device has a plurality of semiconductor amplification elements connected in a cascade. The circuit device is provided with a bias control circuit used to control the bias voltage or bias current of the output semiconductor amplification element in each stage so as to reduce the variation of the output power with respect to the power control signal voltage in an area around the threshold voltage of the semiconductor amplification elements. This realizes a high frequency power amplifier circuit device provided with excellent controllability of the output power and high efficiency at the time of low power output realized with use of such a control voltage as a power control signal.

Abstract: A digitally programmable gain control circuit and method of operating the same is disclosed. The gain control circuit includes a programmable gain amplifier having an amplifier structure represented by a plurality of overlapping discrete monotonic transfer function segments, wherein at least one point of non-monotonicity occurs among one or more of the plurality of overlapping discrete monotonic transfer function segments, and a gain segment translator circuit operative to translate a monotonic gain value to a segment code to match the non-monotonic characteristics of the programmable gain amplifier. The programmability of the gain amplifier is provided by a coarse gain control circuit and a fine gain control circuit.

Abstract: A CMOS gain stage includes biasing circuitry configured to insure saturation of a subsequent stage without a source follower circuit. The CMOS gain stage is optionally powered by a supply voltage that is greater than a permitted supply voltage for a processes technology that is used to fabricate the CMOS gain stage. In order to protect CMOS devices within the CMOS gain stage, optional drain-to-bulk junction punch-through protection circuitry is disclosed. A variety of optional features can be implemented alone and/or in various combinations of one another. Optional features include process-voltage-temperature (“PVT”) variation protection circuitry, which renders a gain relatively independent of process, voltage, and/or temperature variations. Optional features further include bandwidth enhancement circuitry.

Abstract: An amplification apparatus is provided that includes a plurality of gain stages including a first gain stage having first and second transistors and a second gain stage having third and fourth transistors. A plurality of replica stages may also be provided that includes a first replica stage and a second replica stage. Each replica stage may correspond/match one of the plurality of gain stages. An amplifying device may be provided to adjust a body potential of at least the first transistor of the first gain based on an output of the first replica stage and an output of the second replica stage.

Abstract: A gain-controlled amplifier capable of dealing with the system for performing the receiving operation continuously, and capable of correcting a change of a DC offset owing to an operation condition such as temperature; a receiver circuit using the gain-controlled amplifier; and a radio communication device installing the receiver circuit. In a gain-controlled amplifier composed of three GCA stages (11)–(13) connected by cascade connection, the center value of an output DC of each GCA stage (11)–(13) is kept to be constant by a common feedback circuit (16)–(18) provided correspondingly to each of the GCA stages (11)–(13), and a DC feedback quantity is made to be changed according to a gain control voltage VG by means of a DC feedback circuit (19) provided between an output side of a last stage of the GCA stages and an input side of a first stage of the GCA stages.