Having Attenuation Means In Signal Transmission Path Patents (Class 330/284)
  • Patent number: 10348262
    Abstract: Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths that allow signals in a high gain mode to bypass attenuation. This advantageously reduces or eliminates performance penalties in the high gain mode. The programmable attenuators can be configured to improve linearity of the amplification process through pre-LNA attenuation in targeted gain modes. In addition, described herein are variable gain amplifiers with embedded attenuators in a switching network. The attenuators can be embedded onto switches and can be configured to have little or no effect on a noise factor in a high gain mode because the switching network can provide an attenuation bypass in a high gain mode and an attenuation in other gain modes. The programmable attenuators can be embedded onto a multi-input LNA architecture.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: July 9, 2019
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Junhyung Lee, Rimal Deep Singh, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Bipul Agarwal, Aravind Kumar Padyana
  • Patent number: 10320351
    Abstract: A switch for controlling a gain of an amplifier comprises a first NMOS transistor, a second NMOS transistor, a third PMOS transistor, a fourth NMOS transistor, a fifth PMOS transistor, a first resistor, and an inverter. A source of the first NMOS transistor is connected to a first terminal of the first resistor, a drain of the first NMOS transistor is connected to a drain of the third PMOS transistor, a source of the fourth NMOS transistor and a source of the second NMOS transistor, a gate of the first NMOS transistor is connected to a source of the third PMOS transistor, a drain of the fifth PMOS transistor, a drain of the fourth NMOS transistor, and a gate of the second NMOS transistor; a gate of the third PMOS transistor receives a switch voltage (Vs); a gate of the fourth PMOS transistor receives a negative switch voltage (Vsn).
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: June 11, 2019
    Assignee: Beken Corporation
    Inventors: Jiazhou Liu, Donghui Gao
  • Patent number: 10305433
    Abstract: Temperature compensation circuits and methods for adjusting one or more circuit parameters of a power amplifier (PA) to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the PA. Some embodiments compensate for PA Gain “droop” due to self-heating using a Sample and Hold (S&H) circuit. The S&H circuit samples and holds an initial temperature of the PA at commencement of a pulse. Thereafter, the S&H circuit generates a continuous measurement that corresponds to the temperature of the PA during the remainder of the pulse. A Gain Control signal is generated that is a function of the difference between the initial temperature and the operating temperature of the PA as the PA self-heats for the duration of the pulse. The Gain Control signal is applied to one or more adjustable or tunable circuits within a PA to offset the Gain droop of the PA.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: May 28, 2019
    Assignee: pSemi Corporation
    Inventors: Tero Tapio Ranta, Keith Bargroff, Christopher C. Murphy, Robert Mark Englekirk
  • Patent number: 10271138
    Abstract: The present disclosure provides a method for compensating frequency response of audio signal, the method includes: presetting n groups of audio signals with different frequencies, acquiring the minimum signal amplitude value heard by user in each group of audio signals; calculating by a preset gain algorithm to acquire corresponding compensation gain, according to the minimum signal amplitude value; for each group of audio signals, calculating by a preset filtering coefficient algorithm to acquire a corresponding filtering coefficient, according to the frequency of the audio signal, the compensation gain and a preset quality factor; generating a frequency response compensation curve of audio signal according to the filtering coefficient corresponding to the n groups of audio signals; and adjusting an acoustic frequency response of the audio signal according to the compensation curve, and outputting the adjusted audio signal.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: April 23, 2019
    Assignee: SHENZHEN TCL DIGITAL TECHNOLOGY LTD.
    Inventors: Weibiao Gao, Shenglin Zhu
  • Patent number: 10264377
    Abstract: Disclosed are a method, system and controller for simultaneously verifying amplitude and temperature parameters of an electrical-acoustic conversion device, including: inputting a sweep signal to the electrical-acoustic conversion device; testing the amplitude of the electrical-acoustic conversion device while adjusting the gain of the whole frequency band of the sweep signal until the maximum value of the tested amplitude is a maximum amplitude parameter Xmax, and testing the temperature of a voice coil at this moment; and if the tested temperature of the voice coil at this moment is higher or lower than Tmax, gradually reducing/increasing the gain of the sweep signal in the frequency band above a gain improvement frequency point until the tested temperature of the voice coil is Tmax, and then maintaining the gain of the sweep signal for a predetermined period of time and then testing the performance of the electrical-acoustic conversion device.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: April 16, 2019
    Assignee: GOERTEK.INC
    Inventors: Kang Ping, Xinfeng Yang, Jie Wei
  • Patent number: 10236848
    Abstract: A power amplifier module includes a first bipolar transistor configured to amplify a radio frequency signal and output an amplified signal and a second bipolar transistor. A base of the second bipolar transistor is supplied with a control voltage for controlling attenuation of the radio frequency signal, and a collector the second bipolar transistor is supplied with a source voltage. The power amplifier module also includes a first resistor, where one end of the first resistor is connected to a supply path of the radio frequency signal to the first bipolar transistor, and a capacitor, where one end of the capacitor is connected to the other end of the first resistor and the other end of the capacitor is connected to the collector of the second bipolar transistor.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: March 19, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kenji Saito
  • Patent number: 10164585
    Abstract: A radio frequency filter includes communication bandpass filters disposed corresponding respectively to a plurality of communication bands, a switch, and a matching circuit. The switch includes a common terminal and a plurality of optionally selectable terminals, the plurality of optionally selectable terminals being individually connected to the plurality of bandpass filters in a one-to-one relation. The matching circuit is connected to the common terminal and is a common matching circuit to the plurality of communication bandpass filters. The plurality of communication bandpass filters are set such that filter characteristics of a serial circuit in combination of one of the plurality of communication bandpass filters, the one being selected by the switch, and the common matching circuit are improved in comparison with filter characteristics of the selected communication bandpass filter with respect to the communication band corresponding to the selected communication bandpass filter.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: December 25, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takaya Wada, Reiji Nakajima
  • Patent number: 10110183
    Abstract: Power amplification system with common base pre-amplifier. A power amplification system can include a common base amplifier configured to amplify an input radio-frequency (RF) signal received at an input node to generate an intermediate RF signal at an intermediate node. The power amplification system can further include a power amplifier configured to amplify the intermediate RF signal received at the intermediate node to generate an output RF signal at an output node.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: October 23, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventors: Aleksey A. Lyalin, Taesong Hwang, Russ Alan Reisner
  • Patent number: 10063201
    Abstract: A semiconductor integrated circuit includes a first pad provided on one end side of a first resistive element and one end side of a second resistive element externally provided, a second pad provided on a different end side of the first resistive element, a third pad provided on a different end side of the second resistive element and one end side of a third resistive element externally provided, an operation amplifier, a first signal line, wired between an output terminal of the operation amplifier and the first pad, a second signal line wired between an inverting input terminal of the operation amplifier and the second pad, a third signal line wired between the inverting input terminal of the operational amplifier and the third pad, a first ESD protection element, provided to the first signal line, a fourth signal line, through which a voltage signal of the first pad.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: August 28, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Masahide Kiritani
  • Patent number: 10025685
    Abstract: A memory subsystem manages memory I/O impedance compensation by the memory device monitoring a need for impedance compensation. Instead of a memory controller regularly sending a signal to have the memory device update the impedance compensation when a change is not needed, the memory device can indicate when it is ready to perform an impedance compensation change. The memory controller can send an impedance compensation signal to the memory device in response to a compensation flag set by the memory or in response to determining that a sensor value has changed in excess of a threshold.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: July 17, 2018
    Assignee: Intel Corporation
    Inventors: James A McCall, Kuljit S Bains
  • Patent number: 9917550
    Abstract: Provided is a power amplification circuit that includes: a first transistor that has an emitter to which a first radio frequency signal is supplied, a base to which a first DC control current or DC control voltage is supplied and a collector that outputs a first output signal that corresponds to the first radio frequency signal; a first amplifier that amplifies the first output signal and outputs a first amplified signal; and a first control circuit that supplies the first DC control current or DC control voltage to the base of the first transistor in order to control output of the first output signal.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: March 13, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 9831842
    Abstract: Provided is a semiconductor integrated circuit including a pad Pd1 provided on one end side of a resistive element R1 externally provided, a pad Pd5 provided on a different end side of the resistive element R1; an operation amplifier A1, a signal line L11 wired between an output terminal of the operation amplifier A1 and the pad Pd1, a signal line L21 wired between an inverting input terminal of the operation amplifier A1 and the pad Pd5, a ESD protection element r11 provided to the signal line L11, and a signal line L31, through which a voltage signal of the pad Pd1 is transmitted. The signal line L31 is connected to the pad Pd1.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: November 28, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Masahide Kiritani
  • Patent number: 9826305
    Abstract: An audio device includes a digital-to-analog converter, an amplifier, a speaker, a power management unit and a temperature sensor. The digital-to-analog converter is configured to convert a digital audio signal into an analog audio signal. The amplifier is coupled to the digital-to-analog converter and configured to amplify the analog audio signal and generate an amplified analog audio signal. The speaker is coupled to the amplifier and configured to broadcast the amplified analog audio signal. The power management unit is configured to provide the amplifier with a first working voltage and provide the digital-to-analog converter with a second working voltage. The temperature sensor is coupled to the speaker and configured to generate a temperature detection signal according to a temperature of the speaker. Wherein, the power management unit adjusts at least one of the first working voltage and the second working voltage according to the temperature detection signal.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: November 21, 2017
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Chang Tu, Chao-Wei Chang, Ming-Cheng Chiang
  • Patent number: 9673762
    Abstract: A variable ramp up/down gain in a pre-power stage block of an audio amplifier may be used to reduce audible pops and clicks output by the audio amplifier. A controller may adjust the variable ramp up/down gain during operation of the audio amplifier. The variable ramp up/down gain may be implemented as a pulse width modulation (PWM) modulator/generator with a ramp-up and ramp-down gain under control of the controller. The variable ramp up/down gain smooths transitions of the offset between a pre-power stage block and a feedback loop and thus can reduce audible pops and clicks by reducing the offset that is amplified in the power stage block of the audio amplifier.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: June 6, 2017
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Lingli Zhang, Huan Wang, Yongjie Cheng, Christian Larsen
  • Patent number: 9660672
    Abstract: A method for operating an electronic device for transmission of a radio frequency (RF) signal includes selecting output power of a power amplifier (PA) required upon transmission of a signal with a second frequency through an antenna, determining a first PA operation voltage corresponding to the selected output power using first information stored in a memory of the electronic device and second information regarding a PA operation voltage corresponding to first output power of the PA at the second frequency, supplying the determined first PA operation voltage to the PA, and supplying input power corresponding to the selected output power at the second frequency to the PA. Other various embodiments are possible.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: May 23, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Min Lee, Jung-Hwan Son, Yu-Seon Lee
  • Patent number: 9634635
    Abstract: A device includes a thermally conductive and electrically insulative substrate having a first major surface and a second major surface. A coupling structure is configured to reduce the RF input signal by substantially a predetermined amount of attenuation power. A tuning circuit is characterized by a tuning reactance substantially matched to a predetermined system impedance. A resistor is disposed on a majority of the first major surface and is characterized by a parasitic capacitance that is substantially negated by the tuning reactance. The resistor includes a first resistive portion and a second resistive portion; each of the first resistive portion and the second resistive portion being configured to direct approximately one-half of the attenuation power to the ground portion.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: April 25, 2017
    Assignee: ANAREN, INC.
    Inventors: Chong Mei, Bo Jensen
  • Patent number: 9628101
    Abstract: Various embodiments of the present technology may comprise a method and apparatus for an analog-to digital converter (ADC). Methods and apparatus for an ADC according to various aspects of the present invention may operate in conjunction with a reference voltage that varies according to the frequency of a timing signal. By varying the reference voltage according to the frequency of the timing signal, the ADC generates a digital output having a substantially fixed voltage variation regardless of the frequency of the timing signal.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: April 18, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Akinobu Onishi
  • Patent number: 9264084
    Abstract: An apparatus includes an input terminal to receive a radio frequency (RF) signal and to communicate the RF signal to a low noise amplifier (LNA) via an input signal path, and a capacitor attenuator coupled to the input terminal to attenuate the RF signal by a controllable amount and having a first portion controllable to include a used part configured on the input signal path and an unused part coupled between the input signal path and an AC reference node, and a second portion coupled between the LNA and the AC reference node.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: February 16, 2016
    Assignee: Silicon Laboratories Inc.
    Inventors: Mark May, Steve Hanawalt
  • Patent number: 9252723
    Abstract: A system includes a differential circuit, multiple cross-coupled transconductance circuits. In some implementations, the differential circuit may include an inductor coil in a balun or transformer. The cross-coupled transconductance circuits may act to reduce the internal resistance of the differential circuit to increase the quality factor of the differential circuit. The cross-coupled transconductance circuit may be connected at differential points along the differential circuit and be engaged and disengaged to linearize the quality factor of the differential circuit.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: February 2, 2016
    Assignee: Broadcom Corporation
    Inventor: Ali Afsahi
  • Patent number: 9197239
    Abstract: Methods and systems for an analog-to-digital converter with near-constant common mode voltage may comprise, in an analog-to-digital converter (ADC) having sampling switches on each of two input lines to the ADC, N double-sided and M single-sided switched capacitors on each input line: sampling an input voltage by closing the sampling switches, opening the sampling switches and comparing voltage levels between the input lines, iteratively switching the double-sided switched capacitors between a reference voltage (Vref) and ground, and iteratively switching the single-sided switched capacitors between ground and voltages that may equal Vref/2x where x ranges from 0 to m?1 and m is a number of single-sided switched capacitors per input line. A common mode offset of the ADC may be less than VADC—fs/128 +VADC—fs/256+VADC—fs/512+VADC—fs/1024 when m equals 4 and where VADC—fs is the full-scale voltage of the ADC.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: November 24, 2015
    Assignee: Maxlinear, Inc.
    Inventors: Yongjian Tang, Hao Liu
  • Patent number: 9130512
    Abstract: Audio amplifiers are used in many known forms in music systems, for example for domestic use or for playing music in cinemas, discos etc., but also in public address systems, as are known, for example, in public buildings, schools, universities etc. for making announcements. The invention proposes an audio amplifier (1) for amplifying an input signal into an output signal using an output amplifier stage (6), wherein the output amplifier stage (6) is designed to amplify an intermediate signal into the output signal, and wherein the output amplifier stage (6) is in the form of an amplifier which operates in switching mode, and having a limiter device (4) which is designed, from a program and/or circuit point of view, to generate the intermediate signal on the basis of the input signal, wherein the level of the intermediate signal is always limited as a function of an adjustable maximum level in such a way that the output signal does not exceed the maximum level independently of the input signal.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: September 8, 2015
    Assignee: Robert Bosch GmbH
    Inventors: Martin Maier, Josef Taffner, Josef Plager
  • Patent number: 9112463
    Abstract: A power amplifier circuit for amplifying an envelope modulated Radio Frequency (RF) signal with improved linearity and efficiency includes a power amplifier, and a variable load matching circuit coupled to an output port of the power amplifier. The input impedance of the variable load matching circuit is changed such that an output power of the power amplifier is at a first output power level, or a second output power level which is higher than the first output power level.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: August 18, 2015
    Inventors: Moon-Suk Jeon, Jung-Rin Woo, Sung-Hwan Park, Jung Hyun Kim, Young Kwon
  • Patent number: 9014380
    Abstract: A loudspeaker drive circuit comprises an input for receiving an audio signal and a signal processor for processing the audio signal before application to the loudspeaker. The signal processor processes the audio signal to derive a loudspeaker drive signal which results in the loudspeaker membrane reaching its maximum displacement in both directions of diaphragm displacement.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: April 21, 2015
    Assignee: NXP B.V.
    Inventors: Temujin Gautama, Bram Hedebouw
  • Patent number: 9014396
    Abstract: An audio system that reduces or eliminates click and pop noise during power up and power down operations. In particular, the audio system includes an amplifier with an input adapted to receive an input audio signal and an output adapted to produce an amplified output audio signal for an associated speaker. The audio system further includes a noise reduction circuit adapted to smoothly apply and remove a DC voltage to and from the output of the amplifier in a manner that reduces or eliminates click and pop noise from being generated by the associated speaker. The DC voltage at the output of the amplifier may be derived from a DC reference voltage source and/or from the input audio signal.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: April 21, 2015
    Assignee: QUALCOMM Incorporated
    Inventor: Guoqing Miao
  • Patent number: 9007127
    Abstract: The electronic circuit (1) includes, in an automatic gain control loop, an input amplifier (2), an AGC unit connected to the amplifier output to detect the amplitude of an output signal and a unit (10) for attenuating an input signal of the amplifier based on an adaptation signal (VAGC) from the AGC unit. The attenuation unit includes a means of comparing the adaptation signal to a reference signal (VREF) and for supplying an attenuation current as a function of the difference between the adaptation and reference signals, to a diode-connected PMOS replica transistor (M2), which is connected by a source to a common mode voltage (VCM) dependent on the input signal of the amplifier. The replica transistor controls a PMOS shunt transistor (M1) defining a shunt resistance connected to the amplifier input, whose resistive value depends on the attenuation current passing through the replica transistor.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: April 14, 2015
    Assignee: EM Microelectronic-Marin S.A.
    Inventor: Armin Tajalli
  • Publication number: 20150091649
    Abstract: A power amplifier circuit for amplifying an envelope modulated Radio Frequency (RF) signal with improved linearity and efficiency includes a power amplifier, and a variable load matching circuit coupled to an output port of the power amplifier. The input impedance of the variable load matching circuit is changed such that an output power of the power amplifier is at a first output power level, or a second output power level which is higher than the first output power level.
    Type: Application
    Filed: September 30, 2013
    Publication date: April 2, 2015
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd
    Inventors: Moon-Suk Jeon, Jung-Rin Woo, Sung-Hwan Park, Jung Hyun Kim, Young Kwon
  • Patent number: 8975964
    Abstract: A high performance digitalized Programmable Gain Amplifier (PGA). In prior art circuit, a dual-ladder DAC is employed for gain control, the back gate leakage of NMOS resistors in the fine ladder conquers fine ladder nominal current and it produces non-monotonic gain scallop. Two new art design techniques: (1) adaptively control the fine ladder; and (2) use dummy PMOS brunch device leakage compensates for the NMOS resistor device leakage, are proposed so that the non-monotonic scallops are substantially eliminated and 13-bit resolution/accuracy PGA has been achieved.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: March 10, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Qunying Li, Wenxiao Tan, Gregory Swize
  • Publication number: 20150003843
    Abstract: In at least same examples, a communication device includes a photo-diode to convert an optical signal into an electrical current and an open-gain trans-impedance amplifier to amplify the electrical current. The communication device also includes a transmission line between the photo-diode and the open-gain trans-impedance amplifier. The open-gain trans-impedance amplifier includes a programmable input impedance that has been matched to an impedance of the transmission line.
    Type: Application
    Filed: April 25, 2012
    Publication date: January 1, 2015
    Inventors: Dacheng Zhou, Daniel A. Berkram
  • Publication number: 20140368269
    Abstract: An RF amplifier includes an input stage, a buffer stage, and an output stage. The input stage is configured to provide attenuation and impedance matching for an input radio frequency (RF) signal by providing shunt and series variable resistance current paths and RF power to RF current conversion. The input stage routes the RF current between the current paths resulting in an attenuation of the RF input current. The buffer stage is configured to provide an intermediate RF current which tracks the current level of the attenuated RF input current, thereby providing isolation between the input and output stages. The output stage is configured to provide RF current to RF power conversion, utilizing the intermediate RF current to provide an RF signal having an RF output power proportional to the RF input power.
    Type: Application
    Filed: June 27, 2013
    Publication date: December 18, 2014
    Inventor: Nir YAHAV
  • Patent number: 8912850
    Abstract: An amplification circuit, which may be in a receive path of a communication device, includes an amplifier including at least a first amplification device and a switchable attenuation circuit. The switchable attenuation circuit includes one or more switches and a plurality of attenuation devices and is operable to provide different levels of attenuation to an input signal prior to input to the amplifier depending on the status of the one or more switches. The attenuation devices may be capacitors, wherein the capacitors may be arranged to form a capacitive divider with a level of attenuation dependent on the status of the switches. The switchable attenuation circuit may be a switched capacitive attenuation ladder of n stages, n being any integer, each ladder stage including a capacitive divider. The amplification circuit may also include a switch, which when closed provides an unattenuated path for the input signal to the amplifier input.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: December 16, 2014
    Assignee: Broadcom Corporation
    Inventors: Xavier (Javier) Trulls Fortuny, Diego Mateo Pena, Adria Bofill-Petit
  • Patent number: 8912937
    Abstract: Highly power efficient transmitter output stage designs are provided. In an embodiment, the probability density function (PDF) of an input signal is divided into a plurality of regions, and samples of the input signal are processed depending on the region of the PDF within which they fall. The PDF can be divided between an inner region corresponding to samples of the input signal that are within a predetermined amplitude range, and outer regions corresponding to samples of the input signal that are outside of the predetermined amplitude range. Samples of the input signal that fall in the inner region are processed by a class A biased amplifier and samples of the input signal that fall in the outer regions are processed by a class B biased amplifier. Output stage designs according to embodiments can be implemented as power amplifiers or power digital-to-analog converters (DACs).
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: December 16, 2014
    Assignee: Broadcom Corporation
    Inventors: Ramon Gomez, Massimo Brandolini, Jiangfeng Wu, Kevin Lee Miller, Hans Eberhart, Tianwei Li
  • Patent number: 8902013
    Abstract: A dynamic range compression circuit includes an attenuator that attenuates a signal at a predetermined node in an amplifier to reduce a gain of the amplifier and a gain controller that reduces the gain of the amplifier by the attenuator so that an amplitude of an output signal of the amplifier becomes an arbitrary output limit voltage in a case where an input signal having the same amplitude as that of an input-stage maximum voltage of the amplifier is input into the amplifier, and increases the gain of the amplifier by reducing a degree of attenuation of the attenuator according to a decrease of the amplitude of the input signal of the amplifier from the input-stage maximum voltage in a case where the amplitude of the input signal of the amplifier is smaller than the input-stage maximum voltage.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: December 2, 2014
    Assignee: Yamaha Corporation
    Inventors: Hirotoshi Tsuchiya, Shinji Yaezawa
  • Patent number: 8902006
    Abstract: The present disclosure provides a signal processing apparatus including: a short-circuiting controlling section configured to control whether or not the input side of a resistor connected between an input terminal and an output terminal and the output terminal are to be short-circuited in response to a signal level of a signal inputted from the input terminal; and a connection controlling section configured to control whether or not a resistor member is to be connected between the output terminal and a reference potential in response to the signal level of the signal, wherein at least one of the short-circuiting controlling section and the connection controlling section includes a plurality of switches disposed in parallel to each other for changing over a state thereof between open and closed states at signal levels different from each other.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: December 2, 2014
    Assignee: Sony Corporation
    Inventor: Naoto Yoshikawa
  • Patent number: 8872590
    Abstract: A signal amplifying circuit includes: a first transistor having a first connecting terminal coupled to an input signal, and a controlling terminal coupled to a first reference voltage; an adjustable resistive circuit having a first terminal coupled to a second connecting terminal of the first transistor; and a second transistor having a first connecting terminal coupled to a second terminal of the adjustable resistive circuit, a controlling terminal coupled to a second reference voltage, and a second connecting terminal for outputting an output signal corresponding to the input signal; wherein a resistance of the adjustable resistive circuit is adjusted to make an input impedance looking into the first transistor from the first connecting terminal equal a predetermined impedance.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: October 28, 2014
    Assignee: Rafael microelectronics, Inc.
    Inventor: Meng-Ping Kan
  • Publication number: 20140266454
    Abstract: A low noise amplifier including a variable gain amplifier stage configured to accept an input signal and to provide a load driving signal; a tunable bandpass filter connected as a load to the variable gain amplifier stage, wherein the bandpass filter includes a cross-coupled transistor pair, and at least one cross-coupled compensation transistor pair biased in a subthreshold region configured to add a transconductance component when the load driving signal is of a magnitude large enough to decreases a transconductance of the cross-coupled transistor pair; and, a controller circuit configured to tune the bandpass filter. The filter can be tuned in respect to the frequency and the quality factor Q.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: INNOPHASE, INC.
    Inventors: Nicolo Testi, Xi Li, Xuejun Zhang, Yang Xu
  • Patent number: 8803600
    Abstract: An output buffer circuit capable of enhancing stability includes an operational amplifier, a capacitive load and an output control unit. The operational amplifier has a positive input terminal, a negative input terminal and an output terminal, and generates an output voltage to the output terminal according to an input voltage received by the positive input terminal. The output control unit is coupled between the output terminal of the operational amplifier and the capacitive load, and is utilized for controlling electrical connection between the output terminal of the operational amplifier and the capacitive load to form a signal output path and for adjusting impedance of the signal output path when the signal output path is formed. The output control unit comprises a plurality of output switches for individually turning on or off the electrical connection between the output terminal and the capacitive load of the operational amplifier.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: August 12, 2014
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Xie-Ren Hsu, Ji-Ting Chen, Yao-Hung Kuo
  • Patent number: 8736380
    Abstract: An amplifier for use in a buoyant cable antenna operable to receive signals within a frequency band includes: a first amplifier operable to provide amplified signals based on the received signals; a bandpass filter arranged to pass filtered signals within a first portion of the frequency band, the filtered signals being based on the amplified signals; an attenuator arranged in parallel with said bandpass filter and operable to attenuate signals within a second portion of the frequency band, the attenuated signals being based on the amplified signals; and a second amplifier operable to provide an amplified output including first amplified signals within the first portion of the frequency band and to provide second amplified signals within the second portion of the frequency band. The first amplified signals have a first gain, the second amplified signals have a second gain, and the first gain is more than the second gain.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: May 27, 2014
    Assignee: The Johns Hopkins University
    Inventors: James B. Mitchell, Bliss G. Carkhuff, Morris L. London, Robert E. Ball, Sr., Nathaniel J. Hundley
  • Patent number: 8648661
    Abstract: A current limiting circuit includes a power amplifier receiving an input signal through an attenuator. The power amplifier comprises one or more amplification stages and an output stage. The output stage is connected to an antenna. A mirror circuit is connected in parallel to the output stage. The magnitude of a first current flowing through the mirror circuit is proportional to the magnitude of a second current flowing through the output stage. Further, the current limiting circuit includes a comparator that compares the magnitude of the first current with a reference value to generate a control signal. The attenuator adjusts the power of the input signal based on the control signal thereby limiting the magnitude of the second current.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: February 11, 2014
    Assignee: Anadigics, Inc.
    Inventor: Adam Dolin
  • Publication number: 20140022019
    Abstract: An amplification circuit, which may be in a receive path of a communication device, includes an amplifier including at least a first amplification device and a switchable attenuation circuit. The switchable attenuation circuit includes one or more switches and a plurality of attenuation devices and is operable to provide different levels of attenuation to an input signal prior to input to the amplifier depending on the status of the one or more switches. The attenuation devices may be capacitors, wherein the capacitors may be arranged to form a capacitive divider with a level of attenuation dependent on the status of the switches. The switchable attenuation circuit may be a switched capacitive attenuation ladder of n stages, n being any integer, each ladder stage including a capacitive divider. The amplification circuit may also include a switch, which when closed provides an unattenuated path for the input signal to the amplifier input.
    Type: Application
    Filed: September 25, 2013
    Publication date: January 23, 2014
    Applicant: BROADCOM CORPORATION
    Inventors: Xavier (Javier) Trulls Fortuny, Diego Mateo Pena, Adria Bofill-Petit
  • Patent number: 8624670
    Abstract: A digital pre-distortion system and method are provided. The method includes performing a digital pre-distortion operation; and limiting an input of the power amplifier to be no greater than a limit threshold.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: January 7, 2014
    Assignee: Samsung Electronics Co., Ltd
    Inventor: Young-Yoon Woo
  • Patent number: 8564371
    Abstract: An amplification circuit, which may be in a receive path of a communication device, includes an amplifier including at least a first amplification device and a switchable attenuation circuit. The switchable attenuation circuit includes one or more switches and a plurality of attenuation devices and is operable to provide different levels of attenuation to an input signal prior to input to the amplifier depending on the status of the one or more switches. The attenuation devices may be capacitors, wherein the capacitors may be arranged to form a capacitive divider with a level of attenuation dependent on the status of the switches. The switchable attenuation circuit may be a switched capacitive attenuation ladder of n stages, n being any integer, each ladder stage including a capacitive divider. The amplification circuit may also include a switch, which when closed provides an unattenuated path for the input signal to the amplifier input.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: October 22, 2013
    Assignee: Broadcom Corporation
    Inventors: Xavier Trulls Fortuny, Diego Mateo Pena, Adria Bofill-Petit
  • Patent number: 8547172
    Abstract: Systems and methods can provide an optical transmitter/combiner having improved isolation and signal to noise ratio performance. The input ports can be amplified with single ended amplifiers, attenuated with a loss network, combined and re-amplified with a second amplifier stage. The amplifier distortion performance, loss and gain levels can be chosen such that the second order distortions of the input port amplifier and the amplifier following a combiner are self-cancelling such that the distortion can be reduced. The obtained distortion performance can be reasonable while gain and signal to noise ratio are improved.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: October 1, 2013
    Assignee: Arris Enterprises, Inc.
    Inventor: Marcel F. Schemmann
  • Patent number: 8536949
    Abstract: A fixed-gain power amplifier receives a preamplifier output signal and produces a power output signal. The preamplifier output signal is amplified by the fixed-gain power amplifier to produce the power output signal. The variable-gain preamplifier receives an input signal, a preamplifier control signal, and produces the preamplifier output signal. The input signal is amplified by a preamplifier amount of gain by the variable-gain preamplifier to produce the preamplifier output signal. The preamplifier amount of gain is based on the preamplifier control signal. A variable attenuator receives the power output signal, an attenuator control signal, and produces an output signal. The power output signal is attenuated by an attenuator amount of attenuation by the variable attenuator to produce the output signal. The attenuator amount of attenuation is based on the attenuator control signal.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: September 17, 2013
    Assignee: Sprint Communications Company L.P.
    Inventors: Harry W. Perlow, Habib Riazi, Walter F. Rausch
  • Patent number: 8526638
    Abstract: A gain control circuit includes a comparator that compares an input gain value with a count value to generate a comparison result signal, a counter that counts up or counts down the count value in accordance with the comparison result signal, and a gain modulator circuit that modulates the count value to generate a gain control signal which changes in a time-divided manner. The gain modulator circuit modulates the count value so that a gain obtained by time-averaging a gain corresponding to the gain control signal matches a gain based on the count value.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: September 3, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Toshiya Kamibayashi
  • Patent number: 8519877
    Abstract: A circuit for providing audio signals to a load such as a speaker is provided that uses the speaker or headphone amplifier structure as a current to voltage converter, thereby eliminating a separate current to voltage converter from the circuit. Such a design removes one of the elements that creates noise in the circuit architecture and improves the dynamic range for the audio signal. For example, the output of a digital to analog converter is a single ended output provided to the speaker or headphone amplifier. The digital to analog converter can include a series of current sources that are summed up to provide the single ended output. Where the current sources have positive and negative current source mismatch, a feedback mechanism is employed to correct for the mismatch and reduce introduction of harmonic noise into the signal through the digital to analog converter.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: August 27, 2013
    Assignee: Texas Instruments Incorporated
    Inventor: Shailendra Kumar Baranwal
  • Patent number: 8497735
    Abstract: Variable attenuation systems having continuous input steering may be used to implement vector or quadrature modulators and vector multipliers. Discrete implementations of attenuators with continuous input steering may have two outputs which may be cross-connected to provide four-quadrant operation. A symmetrically driven center tap may provide improved zero-point accuracy.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: July 30, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Patent number: 8471630
    Abstract: A fast settling reference voltage buffer and method are disclosed. In one of embodiments, An apparatus comprising: an OTA (operational trans-conductance amplifier) with a positive input terminal coupled to a reference voltage, a negative input terminal coupled to a feedback node, and an output terminal coupled to a circuit node shunt to ground by a shunt capacitor via a current sensor; a tunable resistor, controlled by a control signal, coupling the circuit node to the feedback node; a load circuit coupled to the feedback node via a switch controlled by a logical signal; and a control circuit for receiving an output of the current sensor and outputting the control signal, wherein the control signal is adapted in accordance with the output of the current sensor.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: June 25, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chia-Liang Lin
  • Patent number: 8471637
    Abstract: The invention relates to a variable gain amplifier comprising a first attenuator (1) for receiving an input signal (rf_in) and for transmitting a first attenuated input signal to a first amplifier (2) for amplifying the first attenuated input signal and for generating a first amplified signal to a second attenuator (3) for attenuating the first amplified signal and for transmitting a second attenuated signal to a second amplifier (4) for amplifying the second attenuated signal and for generating an output signal (rf_out). The first attenuator (1) is supplied from a first supply voltage source (10). The second attenuator (3) is supplied from a second supply voltage source (30). The first amplifier (2) is supplied from a third supply voltage source (20), and the second amplifier (4) is supplied from a fourth supply voltage source (40).
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: June 25, 2013
    Assignee: NXP B.V.
    Inventor: Gian Hoogzaad
  • Patent number: 8461929
    Abstract: A power amplifier includes a first amplifier unit, a second amplifier unit, and an attenuator. The second amplifier receives a signal from the first amplifier unit and amplifies the signal. The attenuator is provided between the first and second amplifier units. The attenuator has arms, including at least one parallel arm and at least one series arm, and has switches connected to the arms to switch the electrical connection states of the arms with respect to the first and second amplifier units. The at least one parallel arm and the at least one series arm are alternately arranged, in the order named, as viewed in the direction from the first amplifier unit to the second amplifier unit.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: June 11, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Takayuki Matsuzuka, Kenji Mukai
  • Publication number: 20130093520
    Abstract: The object of the present invention is a low noise figure amplifier with a variable gain which comprises a cascode amplification stage comprising, serially mounted, a low-voltage MOSFET transistor installed as a common source followed by a bipolar transistor with high breakdown voltage installed as a common base. A resistor is placed between the bipolar transistor's collector and the grid of the cascode stage's MOSFET transistor, and the cascode stage is electrically powered through a choke.
    Type: Application
    Filed: April 18, 2011
    Publication date: April 18, 2013
    Applicant: ALCATEL LUCENT
    Inventors: Pascal Roux, Yves Baeyens, Muriel Gohn