Having Attenuation Means In Signal Transmission Path Patents (Class 330/284)
  • Patent number: 7924098
    Abstract: A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: April 12, 2011
    Assignee: Panasonic Corporation
    Inventors: Masao Nakayama, Tsunehiro Takagi, Masahiko Inamori, Kaname Motoyoshi
  • Patent number: 7915956
    Abstract: Variable attenuation systems having continuous input steering may be used to implement vector or quadrature modulators and vector multipliers. Discrete implementations of attenuators with continuous input steering may have two outputs which may be cross-connected to provide four-quadrant operation. A symmetrically driven center tap may provide improved zero-point accuracy.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: March 29, 2011
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Patent number: 7911277
    Abstract: An adaptively tuned RF power amplifier includes at least one power amplifier stage that has one or more active elements. A tunable output network is coupled to the power amplifier stage and includes one or more adjustable reactive elements. A mismatch detector detects a tuning mismatch based, at least in part, on one or more signals present within the tunable output network, and supplies one or more mismatch signals indicative of a detected tuning mismatch. A tuning controller, responsive to the one or more mismatch signals, controls one or more of the one or more adjustable reactive elements in the tunable output network so as to control the detected mismatch.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: March 22, 2011
    Assignee: Black Sand Technologies, Inc.
    Inventors: Susanne A. Paul, Marius Goldenberg, Aria Eshraghi
  • Publication number: 20110050346
    Abstract: In a method and apparatus for compensating for gain changes in an amplifier circuit comprising radio-frequency modules and attenuation elements, a radio-frequency module is driven with a first temperature-dependent monitoring voltage UHF(T), and an attenuation element with a second temperature-dependent monitoring voltage UVG(T). The first temperature-dependent monitoring voltage UHF(T) is produced by applying a temperature dependency to an individual monitoring voltage Uopt, which is predetermined for a predetermined temperature for a radio-frequency module, in order to set the optimum operating point of the radio-frequency module. The second temperature-dependent monitoring voltage UVG(T) is produced by applying a temperature dependency to a predetermined monitoring voltage UVG—T for the attenuation element. The monitoring voltage UVG—T is determined in an iteration method, such that the output power of the amplifier circuit reaches a predeterminable level at a constant input power.
    Type: Application
    Filed: March 14, 2009
    Publication date: March 3, 2011
    Inventors: Joerg Schroth, Rolf Reber, Rainer Rittmeyer, Hardy Sledzik
  • Patent number: 7894615
    Abstract: An apparatus is provided for attenuating electrical signals in the signal path of an electronic audio frequency amplifier for amplifying signals from musical instruments. In accordance with a preferred embodiment, the apparatus is configured to be coupled to the amplifier in more than one arrangement and the apparatus exhibits different attenuation characteristics depending on which arrangement is used to couple the apparatus to the amplifier.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: February 22, 2011
    Inventor: Frank Albert McKiel, Jr.
  • Publication number: 20110025421
    Abstract: Disclosed is a step variable gain amplifier for linearly amplifying a signal received from an antenna. The step variable gain amplifier includes: an amplification unit for converting and amplifying a voltage component of a received signal into a current voltage according to a step amplification control signal; a controller for generating a step amplification control signal of the received signal and controlling on/off of the amplification unit according to the control signal; and an output unit connected to the amplification unit, the output unit outputting a voltage component from the signal that has been subjected to conversion into the current component and amplification processes.
    Type: Application
    Filed: November 6, 2009
    Publication date: February 3, 2011
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Moon Sun KIM, Yoo Sam Na
  • Publication number: 20110001563
    Abstract: Automatic Gain Control AGC circuit comprising a PIN-diode attenuator having an input and an output and a control circuit connected to the attenuator so as to read a signal at the attenuator output. The control circuit is configured to supply a feedback control signal to the attenuator based on an error signal between the signal read at the attenuator output and a reference signal, so as to modulate an attenuation level of said attenuator and maintain a substantially constant power level at the attenuator output. The control circuit particularly comprises at least a resistor and a capacitor which define a time constant of the AGC circuit, so that the AGC circuit features a main pole depending on such time constant and on a voltage of the feedback control signal. The control circuit also comprises a variable gain block, which receives the feedback control signal and which is configured to modulate the main pole proportionally to a variable gain (G) of the gain block.
    Type: Application
    Filed: February 22, 2008
    Publication date: January 6, 2011
    Inventor: Antonio Carugati
  • Publication number: 20110001564
    Abstract: A variable gain amplifier which includes a plurality of individual amplifiers and variably controls the gain by switching to and using one of the individual amplifier circuits includes an individual amplifier (11) which amplifies a signal input from the input terminal of the variable gain amplifier (100) by an active element (M1), and outputs the input signal, an attenuator (14) which attenuates the input signal by a passive circuit (ZC), and outputs the input signal as an attenuated signal, and a virtual ground point providing circuit (15) which provides a virtual ground potential to the input terminal of the virtual ground point providing circuit (15) by an isolation active circuit (MC) interposed between the input terminal of the virtual ground point providing circuit (15) and the ground node of the variable gain amplifier (100).
    Type: Application
    Filed: February 26, 2009
    Publication date: January 6, 2011
    Inventor: Shinichi Hori
  • Patent number: 7821341
    Abstract: Provided are a gain control device and an amplifier using the gain control device. The gain control device includes a first input resistance unit having a first variable resistor whose resistance is linearly variable and a first fixed resistor respectively receiving a first input signal and a second input signal having a sign different from the first input signal and outputting current through a first output terminal, and a second input resistance unit having a second fixed resistor and a second variable resistor whose resistance is linearly variable respectively receiving the first input signal and the second input signal and outputting current through a second output terminal. Since the gain control device can separately perform dB-linear gain control, it is easily combined with a circuit, such as a continuous-time sigma-delta modulator (SDM), a continuous-time filter, and a continuous-time analog-to-digital converter (ADC), and enables miniaturization and low power consumption.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: October 26, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yi Gyeong Kim, Min Hyung Cho, Jong Kee Kwon
  • Patent number: 7804432
    Abstract: An integrated circuit device includes an amplifier circuit that includes first to Nth amplifiers, an A/D converter, first to Nth offset adjustment registers that are provided corresponding to the first to Nth amplifiers and store first to Nth offset adjustment data, first to Nth D/A converters provided corresponding to the first to Nth amplifiers, first to Nth offset value storage sections that store first to Nth offset value data, and a control circuit that calculates the first to Nth offset adjustment data based on the first to Nth offset value data, and sets the first to Nth offset adjustment data in the first to Nth offset adjustment registers.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: September 28, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Akihiro Fukuzawa, Nobuyuki Imai, Satoru Ito
  • Patent number: 7800449
    Abstract: Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: September 21, 2010
    Assignee: Qualcomm Incorporated
    Inventors: Jan Mulder, Marcel Lugthart, Chi-Hung Lin
  • Patent number: 7795972
    Abstract: An amplifier includes steering stages to receive a control signal and collectively provide an output signal. Each steering stage receives an associated input signal and contributes to the output signal based on the control signal. The amplifier includes an attenuator to selectively attenuate the input signals to form different gain control ranges for the amplifier.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: September 14, 2010
    Assignee: Intel Corporation
    Inventor: Nicholas P. Cowley
  • Patent number: 7795979
    Abstract: By connecting an antenna damping circuit (4) and a bypass switch (5) in series and connecting the series circuit and an LNA (3) in parallel, it is possible to inhibit a generation of a signal path for connecting the bypass switch (5) to the LNA (3) in series in an operation of the LNA (3) and to prevent a noise factor of the LNA (3) from being deteriorated due to an on resistance of the bypass switch (5).
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: September 14, 2010
    Assignee: Ricoh Co., Ltd.
    Inventor: Kazuhisa Ishiguro
  • Patent number: 7782139
    Abstract: An input stage receives a differential input signal at first and second input nodes and provides a differential output current at first and second output nodes. The differential output current includes a component taken from the input nodes through first and second impedances, and an additional component generated in response to a sample of the voltage of the differential input signal. A transconductance cell having cross-coupled inputs may generate the additional component of the output current.
    Type: Grant
    Filed: May 6, 2008
    Date of Patent: August 24, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Publication number: 20100182092
    Abstract: A variable attenuator having: an input port; a semiconductor device having a control electrode for controlling carriers flowing between a first electrode and a second electrode, such control electrode being coupled to one of the first and second electrodes, one of the first and second electrodes being coupled to the input port and the other one of the first and second electrodes being coupled to a reference potential to form an active device characterized by such device having a resistivity in the device to the flow of carriers substantially constant when such device is fed through input port with a signal having a relatively small power level and having a resistivity in the device to the flow of carriers which is nonlinear when such device is fed through input port with a signal having a relatively large power level; and an output port coupled to one of the first and second electrodes coupled to the input port.
    Type: Application
    Filed: January 19, 2009
    Publication date: July 22, 2010
    Inventors: John C. Tremblay, Francois Y. Colomb
  • Patent number: 7760021
    Abstract: The present invention relates to a variable gain amplifier. The variable gain amplifier in an ultrasound includes an attenuator. The attenuator includes resistor strings each having a plurality of resistors connected in series to each other and a gain control unit. The gain control unit has tap inputs taken from a plurality of junctions between a first resistor string receiving a first input signal and a second resistor string receiving a second input signal. The gain control unit is configured to provide an attenuated differential input signal based on the tap inputs. The variable gain amplifier includes an amplifying unit having a feedback amplifying section configured to amplify the attenuated differential input signal to output a first amplified signal and a clipping amplifying section configured to amplify the first amplified signal to output a second amplified signal that falls within a predetermined voltage range.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: July 20, 2010
    Assignee: Medison Co., Ltd.
    Inventors: Chang Sun Kim, Ki Jeon
  • Patent number: 7755426
    Abstract: Various example embodiments are disclosed. According to one example embodiment, a high bandwidth, fine granularity variable gain amplifier (“VGA”) may comprise an attenuator, a gain block and a gain adjustment control. The attenuator may comprise at least one pair of attenuator differential input nodes and at least one pair of attenuator differential output nodes. The gain block may comprise at least one pair of gain block differential input nodes coupled to the at least one pair of attenuator differential output nodes and at least one pair of gain block differential output nodes. The gain adjustment control may be configured to adjust a gain of the gain block.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: July 13, 2010
    Assignee: Broadcom Corporation
    Inventors: Namik K. Kocaman, Jun Cao
  • Patent number: 7737785
    Abstract: An amplifier circuit has an amplifier element having an amplifier element input and an amplifier element input impedance, an amplification adjuster adapted to adjust an amplification of the amplifier element, an amplifier circuit input coupled to the amplifier element input, an impedance element having a alterable impedance value and being coupled to the amplifier circuit input, and an impedance adjuster adapted to adjust the impedance value of the impedance element as a function of the amplification of the amplifier element.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: June 15, 2010
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Thomas Stuecke, Niels Christoffers, Stephan Kolnsberg, Rainer Kokozinski
  • Patent number: 7728658
    Abstract: Systems and methods for performance improvements in digital switching amplifiers using low-pass filtering to reduce noise and distortion. In one embodiment, a digital pulse width modulation (PWM) amplifier includes a signal processing plant configured to receive and process an input audio signal. The amplifier also includes a low-pass filter configured to filter audio signals output by the plant. The filtered output of the plant is added to the input audio signal as feedback. The plant may consist of a modulator and power switch, a noise shaper, or any other type of plant. An analog-to-digital converter (ADC) may be provided to convert the output audio signal to a digital signal. Filtering may be implemented before or after the ADC, and a decimator may be placed after the ADC if it is an oversampling ADC.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: June 1, 2010
    Assignee: D2Audio Corporation
    Inventors: Jack B. Andersen, Peter G. Craven, Michael A. Kost, Daniel L. W. Chieng, Larry E. Hand, Wilson E. Taylor
  • Publication number: 20100127779
    Abstract: Method for a variable-gain amplifier (VGA). A plurality of attenuator nodes is serially connected via a first set of resistors between adjacent attenuator nodes to form an attenuator ladder and coupled to an AC input of the variable-gain amplifier. Each of the attenuator nodes includes a transistor and an RC circuitry that couples drain, gate, and source terminals of the transistor to a control signal for the attenuator node. The VGA also includes an amplifier that has an output produced based on an input to the amplifier connected to a plurality of coupled terminals, each of which is respectively from one of the plurality of attenuator nodes.
    Type: Application
    Filed: November 24, 2008
    Publication date: May 27, 2010
    Inventor: Walter Andrew Striflier
  • Patent number: 7719339
    Abstract: The invention relates to the field of signal processing. It is an object of the invention to provide for limitation of a signal voltage to a predetermined maximum voltage (Vmax). To this end, an input signal (Vin) is applied to a voltage divider which includes a variable-resistance component (T1) whose resistance is controlled by a control signal. An output signal (Vin?) is picked-up at the variable-resistance component (T1). The control signal is generated as an amplified difference between the output signal (Vin?) and a fixed reference voltage (Vmax/2), so that for an “overvoltage case” in which the value of the input signal (Vin) exceeds that of a predetermined maximum voltage (Vmax) the output signal (Vin?) is kept substantially constant.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: May 18, 2010
    Assignee: National Semiconductor Germany AG
    Inventor: Ernesto Romani
  • Patent number: 7714658
    Abstract: Method for a variable-gain amplifier (VGA). A plurality of attenuator nodes is serially connected via a first set of resistors between adjacent attenuator nodes to form an attenuator ladder and coupled to an AC input of the variable-gain amplifier. Each of the attenuator nodes includes a transistor and an RC circuitry that couples drain, gate, and source terminals of the transistor to a control signal for the attenuator node. The VGA also includes an amplifier that has an output produced based on an input to the amplifier connected to a plurality of coupled terminals, each of which is respectively from one of the plurality of attenuator nodes.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: May 11, 2010
    Assignee: Linear Technology Corporation
    Inventor: Walter Andrew Striflier
  • Patent number: 7714657
    Abstract: An amplifier includes an amplifier module coupled to an input node, and an attenuating module. The attenuating module includes an attenuation resistor coupled to the input node, and an impedance compensation module coupled to the input node. The impedance compensation module compensates an input impedance when an input RF signal is attenuated by the attenuating module.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: May 11, 2010
    Assignee: Mediatek Inc.
    Inventor: Chia-hsin Wu
  • Patent number: 7710201
    Abstract: A power amplifier circuit includes a first variable gain amplifier for amplifying an input signal, a second variable gain amplifier for amplifying an output signal of the first amplifier, and a control circuit for controlling the gain of the first variable gain amplifier based on the output signal of the first variable gain amplifier and the gain of the second variable gain amplifier.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: May 4, 2010
    Assignee: NEC Corporation
    Inventor: Akihiro Kirisawa
  • Publication number: 20100105448
    Abstract: In a portable radio transceiver, a power amplifier system includes a saturation detector that detects power amplifier saturation in response to duty cycle of the amplifier transistor collector voltage waveform. The saturation detection output signal can be used by a power control circuit to back off or reduce the amplification level of the power amplifier to avoid power amplifier control loop saturation.
    Type: Application
    Filed: October 28, 2008
    Publication date: April 29, 2010
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: Paul R. Andrys, Michael L. Gerard, Terry J. Shie
  • Patent number: 7701292
    Abstract: A wide-band adjustable gain low-noise amplifier (LNA) is disclosed. In various embodiments, the LNA includes a first inverting amplifier configured to generate a first intermediate signal. A first attenuator is configured to receive the first intermediate signal and to generate a second intermediate signal. In various embodiments, the LNA includes a second attenuator configured to generate a third intermediate signal. A second inverting amplifier is configured to generate a fourth intermediate signal using the third intermediate signal. A summing circuit is configured to generate an output signal based on the second and the fourth intermediate signals. Apparatus and methods according to various embodiments of the invention are also disclosed.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: April 20, 2010
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chia-Liang Lin
  • Patent number: 7693494
    Abstract: A novel digital attenuator circuit and associated pre-power amplifier (PPA) that substantially increases the dynamic range of the amplifier. Increased dynamic range is achieved by placing a digital current attenuator circuit at the output of the pre-power amplifier so that the minimum possible current output of the transistor switch array of the PPA can be further attenuated. The attenuator functions to split the current between the load and the power supply VDD (i.e. AC ground) based on device ratio that is controlled digitally via an input power control word. The digital attenuator is constructed as a segmented digitally controlled matrix or cell array comprising at least a pass and bypass matrix or array. The pass matrix controls the amount of current output from the PPA while the bypass matrix controls the amount of current shorted to the AC ground (i.e. power supply). By varying the number of transistors on or off in each matrix, the power output of the PPA can be easily and accurately controlled.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: April 6, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Petteri M. Litmanen, Heng-Chih Lin
  • Patent number: 7679447
    Abstract: This variable gain amplifier is provided with an operational amplifier. The non-inversion input terminal of the operational amplifier is connected to a reference potential. A feedback resistor is connected between the output terminal and inversion input terminal of the operational amplifier. An input resistor is inserted between the inversion input terminal of the operational amplifier and the input terminal of the variable gain amplifier circuit. An adjustment resistor is connected between the inversion input terminal of the operational amplifier and the reference potential. The resistance value of the adjustment resistor is controlled in such a way as to maintain constant against the resistance value change a combined resistance value in its parallel connection with the input resistor when changing the resistance value of the input resistor.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: March 16, 2010
    Assignee: Fujitsu Limited
    Inventor: Kazuaki Oishi
  • Patent number: 7671681
    Abstract: Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: March 2, 2010
    Inventors: Arya R. Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan, Oscar E. Agazzi, John L. Creigh, Mehdi Hatamian, David E. Kruse, Arthur Abnous, Henry Samueli
  • Patent number: 7667542
    Abstract: In one embodiment, the present invention includes an amplifier having an input to receive a radio frequency (RF) signal from an output node of a source. An input stage coupled to the amplifier input may include one or more components to aid in processing of incoming signals. One such component coupled between the source and the input of the amplifier is a coupling capacitor used to maintain a bias voltage of the amplifier at a different potential than a DC voltage of the output node. In certain applications, the amplifier and the coupling capacitor may be integrated on a single substrate.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: February 23, 2010
    Assignee: Silicon Laboratories Inc.
    Inventors: Dan B. Kasha, G. Tyson Tuttle, Gregory A. Hodgson
  • Publication number: 20100022198
    Abstract: A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs.
    Type: Application
    Filed: October 2, 2009
    Publication date: January 28, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Masao NAKAYAMA, Tsunehiro TAKAGI, Masahiko INAMORI, Kaname MOTOYOSHI
  • Patent number: 7649418
    Abstract: There is provided a variable-gain amplifier, including two cascode amplifiers and an attenuator. The cascode amplifiers are mutually connected in parallel via the attenuator.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: January 19, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Naohiro Matsui
  • Publication number: 20100007421
    Abstract: An attenuator includes one or more series attenuation branches including one or more series field effect transistors (FETs) each having a gate; one or more shunt attenuation branches including one or more shunt FETs each having a gate; and a bias control FET. The bias control FET receives at its gate a first bias control signal and in response thereto produces at one of its drain and source terminals a second bias control signal. Either the first bias control signal is coupled to the gates of one or more series FETs, and the second bias control signal is coupled to the gates of the one or more shunt FETs; or the first bias control signal is coupled to the gates of the one or more shunt FETs, and the second bias control signal is coupled to the gates of the one or more series FETs.
    Type: Application
    Filed: July 10, 2008
    Publication date: January 14, 2010
    Applicant: Avago Technologies Wireless IP (Singapore) Pte. Ltd.
    Inventor: Michael Wendell VICE
  • Patent number: 7629850
    Abstract: A variable-gain amplifier includes an intermediate node operative to receive an electric current from a current source. A common-emitter amplifier has a collector electrically connected to the intermediate node. A first common-base amplifier has an emitter electrically connected to the intermediate node and a collector electrically connected to an output node. A base-degenerated amplifier has an emitter electrically connected to the intermediate node and a collector electrically connected to the output node. A second common-base amplifier has an emitter electrically connected to the intermediate node and a collector electrically connected to small-signal ground.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: December 8, 2009
    Assignee: International Busines Machines Corporation
    Inventors: Brian Allan Floyd, Scott Kevin Reynolds
  • Patent number: 7626459
    Abstract: A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: December 1, 2009
    Assignee: Panasonic Corporation
    Inventors: Masao Nakayama, Tsunehiro Takagi, Masahiko Inamori, Kaname Motoyoshi
  • Patent number: 7616060
    Abstract: An amplifying transistor for amplifying a radio frequency signal between an input terminal and an output terminal. The cathode of a first diode is connected to the input terminal and the anode of a second diode is connected to the output terminal. A matching and attenuating circuit is connected between the anode of the first diode and the cathode of the second diode. A matching and attenuating circuit reduces impedance mismatches on the input terminal side and the output terminal side, and attenuates the radio frequency signal. In an amplification mode, a bias circuit supplies a bias current to an amplifying transistor and a current mirror circuit turns off the first and second diodes. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor and the current mirror circuit turns on the first and second diodes.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: November 10, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Patent number: 7609116
    Abstract: A millimetric-wave amplifier arrangement comprises a first amplifier whose output is connected to one input of the second amplifier via an adjustable attenuator. Both amplifiers are integrated on a single substrate.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: October 27, 2009
    Assignee: Ericsson AB
    Inventors: Gregor Gerhard, Stefan Kern, Stefan Koch
  • Patent number: 7598808
    Abstract: Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: October 6, 2009
    Inventors: Arya R. Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan, Oscar E. Agazzi, John L. Creigh, Mehdi Hatamian, David E. Kruse, Arthur Abnous, Henry Samueli
  • Patent number: 7595646
    Abstract: Electromagnetic compatibility of an information handling system and peripheral for achieving defined electromagnetic interference constraints is tested through a test adapter that interfaces with an external cable connecting the information handling system and peripheral. Signals from the external cable are passed through an isolation resistor and parallel capacitance to compensate for input capacitance of a signal tester. A common mode choke isolates a common mode component of the signal at the external cable. A noise generator applies a signal through the test adapter to the external cable to allow measurement of signals emitted from the peripheral due to injected noise.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: September 29, 2009
    Assignee: Dell Products L.P.
    Inventors: Jeffrey C. Hailey, Ernest Lentschke
  • Publication number: 20090212867
    Abstract: An integrated circuit device includes an amplifier circuit that receives an input signal and performs an offset adjustment corresponding to a DC offset of the input signal and a gain adjustment corresponding to an amplitude of the input signal, a filter that is provided in a subsequent stage of the amplifier circuit, a cut-off frequency of the filter being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the filter and performs an A/D conversion process on a signal amplified by the amplifier circuit, and a control circuit that sets an offset adjustment of the amplifier circuit, a gain adjustment of the amplifier circuit, and the cut-off frequency of the filter.
    Type: Application
    Filed: February 20, 2009
    Publication date: August 27, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Akhiro FUKUZAWA, Satoru ITO, Nobuyuki IMAI
  • Publication number: 20090206932
    Abstract: An amplifier includes an amplifier module coupled to an input node, and an attenuating module. The attenuating module includes an attenuation resistor coupled to the input node, and an impedance compensation module coupled to the input node. The impedance compensation module compensates an input impedance when an input RF signal is attenuated by the attenuating module.
    Type: Application
    Filed: February 19, 2008
    Publication date: August 20, 2009
    Applicant: MEDIATEK INC.
    Inventor: Chia-hsin Wu
  • Publication number: 20090201091
    Abstract: An apparatus for setting an attenuation of an attenuator includes a control transistor, which includes a drain connected to a gate of a shunt transistor of the attenuator. A channel resistance of the shunt transistor corresponds to a current density of the control transistor, and the channel resistance of the shunt transistor determines the attenuation of the attenuator. The current density of the control transistor is based at least in part on a control voltage input to the apparatus.
    Type: Application
    Filed: February 11, 2008
    Publication date: August 13, 2009
    Applicant: AVAGO TECHNOLOGIES
    Inventor: Michael Wendell VICE
  • Publication number: 20090184768
    Abstract: An attenuation compensating circuit includes a detector and a stabilizer. The detector has a dummy capacitor corresponding to a capacitor connected to an input terminal of an amplifier and, by detecting the degree of attenuation of a dummy signal passing through the dummy capacitor, detects the degree of attenuation when a signal to be amplified passes through the capacitor connected to the amplifier. The stabilizer has two dummy amplifiers and causes a voltage difference between the input voltages of the dummy amplifiers, where the voltage difference corresponds to the degree of attenuation detected by the detector. The stabilizer controls a bias voltage for setting gain of the dummy amplifier so that a product of the voltage difference of the input voltage and the gain of the dummy amplifier is equivalent to the difference of the voltages output by the dummy amplifiers and supplies the bias voltage to the amplifier.
    Type: Application
    Filed: September 8, 2008
    Publication date: July 23, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Daisuke Yamazaki
  • Patent number: 7560986
    Abstract: A fine granularity, wide-range variable gain amplifier (“VGA”) comprises an attenuator, a high gain signal path, a low gain signal path and a gain adjustment control to adjust a gain of the VGA, wherein the gain adjustment control is configured to cause a selective activation of at least a portion of the low gain signal path or the high gain signal path to achieve a desired overall gain.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: July 14, 2009
    Assignee: Broadcom Corporation
    Inventor: Namik Kocaman
  • Patent number: 7560989
    Abstract: The invention includes a power amplifier with an amplifier core including parallel amplifier cells, a replica cell made of one amplifier cell similar to those of the amplifier core, a power controller to select a combination of amplifier cells to activate, a regulator to fix the top voltage of the replica cell to a reference voltage, a voltage generator to provide the voltage reference to the regulator, a current generator to provide a reference current through the replica cell, and a drive unit controlled by the regulator output to drive the combination of amplifier cells, so that each selected combination of activated cells defines a predetermined attenuation level of power amplifier output signal so that it is attenuated in a stepwise manner.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: July 14, 2009
    Assignee: EM Microelectronic-Marin S.A.
    Inventors: Kevin Scott Buescher, Matthijs Pardoen
  • Publication number: 20090174484
    Abstract: An amplifying transistor for amplifying a radio frequency signal between an input terminal and an output terminal. The cathode of a first diode is connected to the input terminal and the anode of a second diode is connected to the output terminal. A matching and attenuating circuit is connected between the anode of the first diode and the cathode of the second diode. A matching and attenuating circuit reduces impedance mismatches on the input terminal side and the output terminal side, and attenuates the radio frequency signal. In an amplification mode, a bias circuit supplies a bias current to an amplifying transistor and a current mirror circuit turns off the first and second diodes. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor and the current mirror circuit turns on the first and second diodes.
    Type: Application
    Filed: June 3, 2008
    Publication date: July 9, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Patent number: 7548116
    Abstract: A high-frequency circuit is provided. In the high-frequency circuit, a first PIN diode is provided in a signal line and a second PIN diode is provided between the signal line and ground so that an attenuating circuit is formed. A power supply is applied to one end of a series circuit composed of two resistors. The other end of the series circuit is connected to ground via a drain-source path of an FET. An AGC voltage is applied to a gate of the FET. A bias voltage in accordance with the AGC voltage is applied to a base voltage of a low-noise amplifier via the first and second PIN diodes so as t control attenuation of the first PIN diode and an operating current of the low-noise amplifier.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: June 16, 2009
    Assignee: Alps Electric Co., Ltd.
    Inventor: Masaki Yamamoto
  • Publication number: 20090096527
    Abstract: By connecting an antenna damping circuit (4) and a bypass switch (5) in series and connecting the series circuit and an LNA (3) in parallel, it is possible to inhibit a generation of a signal path for connecting the bypass switch (5) to the LNA (3) in series in an operation of the LNA (3) and to prevent a noise factor of the LNA (3) from being deteriorated due to an on resistance of the bypass switch (5).
    Type: Application
    Filed: November 29, 2006
    Publication date: April 16, 2009
    Applicant: Niigat Seimitsu Co., Ltd.
    Inventor: Kazuhisa Ishiguro
  • Patent number: 7504885
    Abstract: A variable gain amplifier of the present invention connects an input and an output of a first variable gain amplifier circuit to an RF input terminal and an RF output terminal, respectively, connects one terminal of an attenuation circuit is to an RF input terminal, connects an input and an output of a second variable gain amplifier circuit to the other terminal of the attenuation circuit and an RF output terminal, respectively, connects one terminal of the variable resistance circuit to a node between the attenuation circuit and the second variable gain amplifier circuit, and grounds the other terminal of the variable resistance circuit. A gain of the first variable gain amplifier circuit, a gain of the second variable gain amplifier circuit, and a resistance value of the variable resistance circuit are then varied by a gain control voltage outputted from a gain control section.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: March 17, 2009
    Assignee: Panasonic Corporation
    Inventors: Yasuo Oba, Takatoshi Kawai
  • Patent number: 7492237
    Abstract: A gain compensation circuit comprises a first amplifier, a second amplifier, a filter, a first attenuator, a second attenuator and a third attenuator. The first amplifier is configured to amplify an input signal of the microwave signal processor. The filter is disposed between the first and second amplifiers. The first attenuator is disposed between the first amplifier and the filter for reducing return loss of the microwave signal processor. The second attenuator is disposed between the second amplifier and the filter for reducing return loss of the microwave signal processor. The third attenuator is electrically connected to the output of the second amplifier for reducing noise figure of the microwave signal processor and providing first and second gain compensations. The first gain compensation keeps the gain of the microwave signal processor constant under various temperatures, and the second gain compensation adjusts a nominal gain of the microwave signal processor.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: February 17, 2009
    Assignee: Microelectronics Technology Inc.
    Inventors: Ruei Yuen Chen, Yen Fen Lin