Abstract: A microwave amplifier includes an FET, a DC bias voltage supply circuit, and a beat smoothing circuit. The FET amplifies a microwave signal including a plurality of carrier frequencies that are different from each other. The DC bias voltage supply circuit supplies a DC bias voltage to the FET. The beat smoothing circuit removes a beat frequency generated on a line connected to the FET due to a difference among the plurality of carrier frequencies. The beat smoothing circuit is constituted by a microstrip line having a low impedance with respect to the beat frequency, and a capacitor for short-circuiting to ground the beat frequency output from the filter means.

Abstract: The present invention provides a high frequency amplifier circuit and a microwave integrated circuit which allow easy development of various models having different operating frequencies and other properties and improve the yield of production.The high frequency amplifier circuit of the present invention comprises a high frequency transistor and a matching circuit connected between a terminal of the transistor and an external connection terminal, whereinthe matching circuit has a variable capacitive element of which one end is connected to a terminal of the transistor and the other end is connected to the external connection terminal, and a short stub of which one end is connected to the other end of the variable capacitive element and the other end is directly grounded.

Abstract: A high frequency power amplifier including: a multi-layer printed-circuit board, a transistor for amplifying an input signal and outputting the amplified signal, a first print circuit pattern for receiving the input signal and supplying the input signal to the transistor, a second print circuit pattern for supplying a supply voltage to the transistor, a ground terminal, and concentrated constant elements connected to the transistor on the multi-layer printed-circuit board is disclosed, wherein at least two layers of the multi-layer printed-circuit board are connected to the ground terminal, the first and second print circuit patterns are sandwiched on one layer of the multi-layer print circuit between the at least two layers, a first shielding circuit pattern, connected to the ground terminal, arranged around the first print circuit pattern on the one layer is further provided; and a second shielding circuit pattern, connected to the ground terminal, arranged around the second print circuit pattern on the one

Abstract: A semiconductor microwave amplifier includes input- and output-side microstrip lines formed on a printed-circuit board to oppose each other, input and output electrodes formed on the microstrip lines to be parallel to the microstrip lines, a pair of ground electrodes formed in a direction perpendicular to the input and output electrodes to oppose each other, and a semiconductor amplification device connected to all of the electrodes. This amplifier further has a metal plate connected to the ground electrodes to ensure high-frequency isolation between the input electrode and the output electrode and shield electromagnetic connection, and a through hole for connecting a ground portion of the semiconductor device to a ground surface for the microstrip lines, the ground surface being formed on the printed-circuit board.

Abstract: A circular low noise amplifier package having an X-band MMIC low noise amplifier disposed therein, that may be preferably used with an existing stripline receiver board employed in a missile. The package has three input/output ports symmetrically located around the package, including DC bias, RF input, and RF output ports. The package mounts directly into the stripline receiver board as a drop-in replacement for an isolator used in the existing stripline receiver board. The circular low noise amplifier package comprises a top cover, an upper RF gasket, a package lid, a hermetic low noise amplifier module containing a low noise amplifier chip, a lower RF gasket, and a bottom cover. The amplifier module has feedthrough pins that extend through the outer wall thereof and couple to the low noise amplifier chip. The top and bottom covers are used to secure the amplifier package to the stripline receiver board. The upper and lower RF gaskets aid in improving an RF ground.

Abstract: A distributed MMIC active quadrature hybrid (10) provides in-phase (I) and quadrature-phase (Q) outputs (22, 24) over an octave bandwidth. The quadrature hybrid includes in-phase and quadrature-phase amplifying elements (14, 12) arranged in a distributed manner. The in-phase amplifying elements (14) include FETs (42) with series inductive feedback (44) in the source path. The quadrature-phase amplifying elements (12) includes FETs (52) with series capacitive feedback (54) in the source path. The series inductive and capacitive feedback provides the phase difference between the hybrid's outputs. The FETs of the in-phase and quadrature-phase amplifying elements have differing gate peripheries to provide amplitude tracking over the bandwidth.

Abstract: The output impedance matching network of a power amplifier module is improved by the addition of an intermediate set of bonding pads in close proximity to a power transistor in the power amplifier module. A tunable set of bond wires extend from the intermediate bonding pads to a transmission line that is coupled to the output of the power amplifier module. The tunable bond wires allow the inductance of the impedance matching network to be tuned and optimized.

Abstract: A MMIC power amplifier (100) uses MMIC FET cells (104, 112) and provides high gain at microwave and millimeter-wave frequencies. The power amplifier includes an input matching network (102), a first plurality of unit FET cells (104) for amplifying in-phase signals provided by the input matching network, a second plurality of unit FET cells (112), an interstage matching network (106) for combining output signals provided by the first plurality of unit FET cells, and providing in-phase signals to the second plurality of unit FET cells; and a combiner (113) for combining output signals of the second plurality of unit FET cells to provide an output signal. The FET cells are designed to be unconditionally stable without the use of an external series gate resistance. The FET cells are combined to provide total device periphery suitable for output power levels exceeding 0.8 watt at frequencies ranging from 19 to 23.5 GHz. The FET cells are designed using device scaling and device modeling techniques.

Abstract: A semiconductor device that has a structure wherein plural incremental circuits each of which is structured by a combination of a field effect transistor and a transmission line are connected and arranged in serial, in the arrangement of the above incremental circuits, the total length of the transmission lines of respective incremental circuits is longer than at least 1/16 of a wavelength of used microwave or millimeter-wave, and the number of arranged incremental circuits is numerous, as a result, the above transmission lines have a function as a distributed-constant line.

Abstract: A power divider/combiner is formed from multimode dielectric waveguides in hich energy in a single mode is translated into a plurality of modes in the multimode waveguide, each mode is separately amplified and applied to another multimode waveguide that combines the modes in phase at the output thereof.

Abstract: Josephson transmission structures (JTSs) which include Josephson transmission lines (JTLs) with filter circuitry and flux release circuitry. Two or more of these JTSs may be interconnected to form a superconducting high-gain operational amplifier intended for general-purpose analog signal processing is disclosed. The active elements of the amplifier are non-hysteretic Josephson junctions configured as dc SQUIDs (used as flux-to voltage transducers and impedance transformers) and Josephson transmission lines (used as the main source of power gain). The amplifier has inverting and non-inverting voltage inputs, which can be fed from any low-resistance low-voltage sources, including dc SQUIDs. The output of the amplifier is in the form of a voltage which can drive typical transmission line impedances (e.g., 10-100 ohms).

Abstract: A high-powered, solid state microwave and millimeter wave, power combiner and divider is provided by using a plurality of radially oriented tapered slotline cards disposed in a center cylindrical coaxial section between its inner and outer conductors. The cylindrical coaxial section in turn is coupled to a conical input coaxial section that couples and distributes the input signal among the plurality of cards, and an output coaxial section that combines the output signal from the plurality of cards to an output coaxial terminal. The device is compact with broadband performance and provides a natural heat sink for a plurality of lower powered devices, which enables the power combiner to use a large number of lower powered devices to meet larger power requirements.

Abstract: A radially combined RF/Microwave amplifier includes an input divider for dividing the input power signal into "N" input signals, and a single matching/combiner circuit configuration for matching an combining the amplified "N" input signals into one combined output power signal P.sub.T. The system utilizes a stripline/microstrip configuration of the matching/combiner circuitry and suspends this circuitry above one surface of an aluminum chill plate. The input stage of the amplifier is disposed on the opposite surface of the chill plate with the transistors connecting the input stage with the output network across the peripheral edge of the chill plate.

Abstract: A high-frequency amplifier has a transistor having a transistor input terminal, a transistor output terminal, and ground radiation fins, a first dielectric board having a transistor input matching circuit, and a second dielectric board having a transistor output matching circuit. The transistor is mounted by bringing the ground radiation fins into tight contact with a common ground surface member. The first and second dielectric boards being mounted on the common ground surface member. The first and second dielectric boards are respectively formed with first and second ground conductors on common ground surface member sides thereof. The transistor input terminal and the transistor input matching circuit are connected to each other and so are the transistor output terminal and the transistor output matching circuit.

Abstract: An amplifying circuit is formed by a combination of a dielectric line waveguide and a semiconductor device. Two electrically conductive plates are provided substantially parallel to each other. Two dielectric strips are disposed between the two conductive plates, and a dielectric plate is further inserted between the dielectric strips. Ground conductors are formed on the dielectric plate. The ground conductors have an area which equals an amount required for blocking a RF signal propagating in the dielectric line waveguide. A slot line is formed between the ground conductors in a position intermediate opposed sides of the dielectric strips. Line-switching conductor patterns are provided at both sides of the ends of the slot line. A field-effect transistor is mounted on the slot line such that it bridges over the slot line. Accordingly, losses and distortion of an RF signal, which would occur in an input/output circuit, are suppressed, and the generation of parasitic coupling is eliminated.

Abstract: An amplifier circuit is powered by a single power voltage source connected to a drain node of a field effect transistor, and a series of a resistor and a diode produces a gate bias voltage from the power voltage at the single power voltage source so as to increase the resistance of a resistor connected to the source node of the field effect transistor, thereby decreasing a sensitivity of drain current to undesirable variation of the threshold voltage.

Abstract: A solid state power amplifier which combines the output of several power modules by means of a waveguide radial combiner. The physical structure of the amplifier is such that the power modules lay flat on a planar heat sink which can be easily cooled by forced air. The input power can be distributed to the power modules by means of a microstrip divider. The divider can be connected to the modules by means of coaxial cables and the modules can be connected to the radial combiner by means of microstrip to waveguide transitions.

Abstract: In a hybrid matrix amplifier array (100), a configurable digital transform matrix (116) is initialize with a matrix of transform coefficients. A plurality of digital input signals (M.sub.1 -M.sub.4) are received at inputs of the configurable digital transform matrix (116). The plurality of digital input signals are transformed to produce a plurality of transform digital signals (A.sub.1 -A.sub.4) using the matrix of transform coefficients. The plurality of transform digital signals are converted to a plurality of transformed analoged signals (206) to produce a plurality of transformed analog signals. The transformed analog signals are amplified (104, 208) to produce amplified transformed signals. Finally, the amplified transformed signals are inverse transformed (102, 210) to produce output signals that correspond to a respective digital input signal (M.sub.1 -M.sub.4).

Abstract: A method (140) for tuning millimeter-wave FET amplifiers (20) during manufacture, through the application (144) of a gate bias voltage (52) so as to tune the FET (22) of the amplifier (20) to match an input circuit (24), and through the application (146) of a drain bias voltage (74) so as to tune the FET (22) of the amplifier (20) to match an output circuit (26), then measuring (150) the frequency response of the amplifier (20). This tuning method (140) is repeated (152) until a predetermined frequency response has been achieved. Once achieved, the predetermined frequency response is realized (154) by permanently fixing the gate bias voltage (52) and the drain bias voltage (74) at the determined values. This iterative method (140) of tuning amplifiers (20) is then repeated for all amplifiers (20) to be tuned.

Abstract: An active device, such as a field effect transistor ("FET"), converts microwave signals between a slot transmission line ("slotline") and a coplanar waveguide ("CPW") In slotline-to-CPW conversion using one or more FETs, a gate connection is made to one or both of the slotline conductors. A drain connection is made to the center conductor on the CPW. Two FET source terminals are connected respectively to each CPW ground strip and may be coupled to a slotline conductor. The active device can be reconnected so as to reverse the input and output, providing for conversion of signals from CPW to slotline. Conversion between balanced-signal slotline and CPW further includes passive or active phase shift of one signal path.

Abstract: A bypass device in a low noise amplifier unit for amplifying communication signals in the microwave frequency range. The device includes a printed circuit board with transmission lines (1, 2), an amplifier (A), a transmission line bypass segment (3) extending in parallel to the amplifier, and switching means for activating said bypass segment in case the amplifier becomes inoperable. The amplifier is connected between two transmission line stub segments (4, 5).

Abstract: An impedance matching circuit disposed on one of input and output sides of an element to be evaluated matches I/O impedances of the element. The impedance matching circuit includes a matching substrate having a surface, a main line on the surface, passive circuits having stubs and FETs alternatingly connected in series and electrically connected to the main line to change impedance of the main line, and a plurality of switching FETs connected in series between the main line and the respective passive circuits switched on and off in accordance with characteristics of the element. The impedances of the matching substrate can be changed as required by electrically connecting the passive circuit to the main line by switching of the FETs. Even when a considerable change occurs in the I/O impedances of the element due to fabrication variations and in large signal (non-linear) operation of a power FET, I/O impedances of an evaluating object can be matched easily and promptly by appropriate switching of the FETs.

Abstract: The output of a digital modulator is put into a power amplifying device, is distributed into n pieces in an n-power divider in the power amplifier, passes through n input phase shifters differing individually in the phase change amount, is amplified by n power amplifiers, passes through n output phase shifters to match the phase of n signals, is combined in an n-power combiner, and is issued from an output terminal to a phase shifter, and the output of the phase shifter is issued to a transmission antenna.

Abstract: An active quadrature power splitter having low power consumption is small in size and is inexpensive, for obtaining two output signals of which the phase difference is 90 degrees. Since the active quadrature power splitter operates as a microwave amplifier for obtaining two amplified microwave outputs having an equal magnitude and a phase difference of 90 degrees by using a matching circuit of the amplifier, a power gain can be obtained. Also, since a single FET or HBT is used and two output signals are generated in an output impedance matching circuit, the circuit becomes simplified. Therefore, the circuit can be easily implemented in a monolithic microwave IC and the chip size can be reduced.

Abstract: An amplifier including an amplifying transistor flip-mounted on a coplanar waveguide pattern. Elements of stability and/or matching circuits are provided at least in part under the flip-mounted transistor to facilitate compact design and to improve component performance. A serial resistor-shunt inductor pair is provided with the resistor coupled proximate the transistor input and/or output and preferably configured within the CPW center conductor to provided more consistent component values. Embodiments of the present invention include a two-stage amplifier having a transmission segment formed between the two stages which serves to rotate the output impedance of the first stage toward a low noise match with the second stage and to rotate the input impedance of the second stage toward a high gain match with the first stage. The transmission segment may include a capacitive element for providing series capacitance and DC blocking. Adjustable impedance matching means are also taught.

Abstract: In a radio frequency amplifier, a resistor and an inductor are connected to a gate terminal of transistor such as an FET. Another resistor for preventing oscillation is connected to the inductor. A capacitor and a third resistor connected to each other in parallel are connected to the first resistor while the other ends thereof are grounded. A resistance value of the resistor for preventing oscillation is in the range of about 30 .OMEGA. to about 70 .OMEGA.. An inductance value of the inductor is such that an impedance value for a low frequency becomes negligibly small.

Abstract: A quasi-optical power combining array provides broadband, well heat sinked performance by means of coupling an array of parallel slotline transition modules between a input waveguide and an output waveguide. Each slotline transition module is comprised of a heat sinked ceramic substrate upon which a pair of tapered slot transitions is defined, each of which lead to a quasi-optical element such as an amplifier, which in turn is coupled to a corresponding pair of tapered slot transitions leading to the output waveguide. Each slotline module is symmetrically formed to maximize input and output tuning and selectively balanced operation.

Abstract: An RF power amplifier module utilizing a plurality of silicon carbide transistor power amplifier circuits, each including a transistor assembly having multiple cells, respectively providing power amplification of an input signal. In a preferred embodiment of the invention, four mutually staggered silicon carbide transistor assemblies, each containing multiple transistor cells, are operated in parallel while being arranged in close proximity on a common substrate. Each silicon carbide amplifier circuit assembly is commonly driven by a fifth silicon carbide amplifier circuit. The outputs of the parallely driven silicon carbide transistor power amplifier circuits are combined so as to provide a single composite RF output signal which may be in the order of 1000 watts or more when operated at a frequency of, for example, 600 MHz.

Abstract: A high power bipolar transistor includes bipolar transistors disposed on a substrate; a signal line including a pad for inputting a driving signal and a signal transmission line continuous with the pad commonly connecting base electrodes of the bipolar transistors; and a bypass line having a first end connected to the signal transmission line proximate to the pad and a second end connected to the signal transmission line remote from the pad. Approximately equal powers are supplied to the transistors connected to any position on the base feed line so that the operation of the respective transistors is uniform, improving output power and efficiency.

Abstract: An integrated impedance matching circuit is disclosed using a flip chip process and a heterlithic microwave integrated circuit (HMIC). In a preferred embodiment, a silicon microwave power transistor is flip chip mounted on a glass substrate having a ground plane and silicon pedestals 404 selectively etched and having glass disposed about the silicon pedestals to form the substrate. The glass substrate of the present invention is finely ground and polished to enable VLSI techniques for mass production fabrication. To this end, photolithography and deposition techniques well-known in the art are utilized to effect impedance matching circuitry. Because the input impedance of the Si power transistor is relatively low, by using the flip chip technique the precision of the impedance matching circuit can be effected without the use of wire bonds which must be tuned in a labor intensive manner.

Abstract: A circuit that samples a through signal, while minimizing attenuation, distortion, or other perturbation to the through signal and sampled signal. The present invention provides for an active distributed signal sampler that includes two transmission lines. An input port is coupled to the first transmission line for receiving the through signal, and a through output port is coupled to an output end of the first transmission line for outputting the through signal. The second transmission line is terminated at one end and has a sampled output port at an output end of the second transmission line for outputting the sampled signal. A plurality of high impedance amplifiers bridge between the transmission lines, and a plurality of inductors are coupled between each of the high impedance amplifiers. A plurality of transmission lines may be optionally employed in the second transmission line.

Abstract: Disclosed is a novel topology of monolithic, microwave amplifiers with high integration. This is a more compact topology, divided into a two-level or tree-like structure in which the division of the input signal is done firstly on each transistor Tij and, secondly, on each of the elementary transistors tijk of the transistors Tij. More specifically, the input line LE is divided into different basic lines li, each line li supplying lines lij distributed on either side of said lines li, a line lij then supplying a power transistor Tij. Application to microwave amplifiers.

Abstract: A mist cooled distributed amplifier utilizing a connectorless module. The amplifier comprises modules that are connected to waveguides in a honeycomb. The RF signals are distributed to and combined from the modules using a distributed waveguide manifold. Cooling is accomplished by forming channels between the modules through which mist is transmitted and collected and condensed at the output end.

Abstract: A MMIC power amplifier (100) uses MMIC FET cells (104, 112) and provides high gain at microwave and millimeter-wave frequencies. The power amplifier includes an input matching network (102), a first plurality of unit FET cells (104) for amplifying in-phase signals provided by the input matching network, a second plurality of unit FET cells (112), an interstage matching network (106) for combining output signals provided by the first plurality of unit FET cells, and providing in-phase signals to the second plurality of unit FET cells; and a combiner (113) for combining output signals of the second plurality of unit FET cells to provide an output signal. The FET cells are designed to be unconditionally stable without the use of an external series gate resistance. The FET cells are combined to provide total device periphery suitable for output power levels exceeding 0.8 watt at frequencies ranging from 19 to 23.5 GHz. The FET cells are designed using device scaling and device modeling techniques.

Abstract: A broadband amplifier includes an amplifier device and input and output networks formed of microstrips. The impedance of the output microstrip is chosen by taking the geometric mean of the real parts of one of the scattering parameters of the amplifier device, at the lower and upper limits of the frequency range of interest, and by taking the geometric mean of the system impedance with the result obtained previously. The final result of these calculations is the impedance of the output network. The impedance of the input network is made to be at least twice, and preferably twice, the impedance of the output network. The amplifier is also provided with a slope compensation circuit. It has been discovered that an amplifier designed in this manner exhibits remarkable flatness over a five-octave range. The amplifier circuit is therefore suitable for use in cable television and other broadband telecommunications applications, where the frequency range of interest may be 30 MHz to 1000 MHz.

Abstract: A circuit that injects an auxiliary signal into an existing signal path, thereby adding it to an existing main signal, while minimizing attenuation, distortion, or other perturbation to the main signal. The present invention provides for a active distributed signal injector that includes two transmission lines. An input port is coupled to the first transmission line for receiving the main signal, and a main output port is coupled to an output end of the first transmission line for outputting the main signal. The second transmission line is terminated at an output end and has an injected signal input port at an input end of the second transmission line. A plurality of high impedance amplifiers bridge between the transmission lines, and a plurality of inductors are coupled between each of the high impedance amplifiers. A plurality of transmission lines may be optionally employed in the second transmission line.

Abstract: A power amplifier circuit for efficiently generating an output signal into a load at more than one alternative power level has at least two amplifiers, each having optimum efficiency at different power output levels. The power amplifier circuit may be operated in several modes, including activating one amplifier during an entire cycle of an input signal to be amplified, or alternatively activating one amplifier based on a control signal that is independent of the amplified output signal. In either case, remaining amplifiers are deactivated. Coupling between the amplifiers prevents deactivated amplifiers from impeding the flow of power from the activated amplifier to the load. In another aspect of the invention, optimum efficiency at different power output levels is achieved by means of coupling each amplifier to a common power source and to the load via an impedance matching circuit, the impedance transformation being different for different amplifiers.

Abstract: A low noise amplifier of the present invention may be useful to a portable cellular phone or a microwave communication system, particularly to a monolithic circuit in which the amplifier includes an input impedance component consisting of capacitors and an inductor, two MESFETs in a cascade connection and a capacitor connected between the two MESFETs so as to enhance the stability of the amplifier when a node strapping a plurality of ground terminals of the amplifier is connected to an external circuit by means of a bonding wire.

Abstract: A system for increasing the power efficiency of a balanced amplifier driven antenna arrangement includes a push-pull class B power amplifier circuit which is responsive to a periodic, time varying input signal and generates at least two output signals in response thereto. The arrangement also includes a balanced antenna exhibiting a relatively high impedance at the second harmonic of the input signal. The arrangement further includes at least one transmission line operatively coupled between the power amplifier circuit and the balanced antenna to provide the at least two output signals to the balanced antenna. The at least one transmission line has a length which is one-eighth of the wavelength of the input signal or odd multiples thereof, and thereby reflects back to the power amplifier circuit a substantially short circuit at the second harmonic of the input signal.

Abstract: In an RF power amplifier, an input-side RF terminal is connected to a gate of an FET via an input-side matching line. A source of the FET is grounded. A drain of the FET is connected to an output-side RF terminal via an output-side matching line. To a line connected to the drain of the FET, a circuit for controlling an output impedance for the secondary harmonic wave is connected, including a first line and a first capacitor. To a line connected to the gate of the FET, a circuit for controlling an input impedance for the secondary harmonic wave is connected, including a second line and a second capacitor. The length of the second line is set so that an electric length thereof becomes longer than one-fourth of the wavelength for the fundamental wave frequency. Thus, an impedance for the harmonic wave is controlled at the input side of the power transistor.

Abstract: An ultra-high frequency semiconductor device according to another aspect of the present invention, includes Field Effect transistor (FET) chips each of which includes FET elements and which are connected to each other by bonding wires, and an internal matching circuit having a concentrated parameter circuit and a distributed parameter circuit, and wherein the concentrated parameter circuit includes capacitor chips provided on input and output sides of the FET chips and including a plurality of chip capacitors each of which is connected to said corresponding FET elements, and wherein each of the chip capacitors has a length predetermined based on a frequency band used in practice. Each of said chip capacitors may have a length predetermined such that a resonance frequency does not exist in a frequency band used in practice or a length predetermined such that an input impedance of each of said chip capacitors is capacitive at an upper limit frequency of the frequency band.

Abstract: A microwave multi-stage power amplifier has matching circuits for input and output stages and one or more inter-stage matching circuits. The amplifier and a signal output pad and first and second voltage supply pads are formed at one and the same semi-insulating substrate. A first FET in the output stage has its drain connected to the first voltage supply pad through a first distributed line and further connected to the signal output pad through a second distributed line in which the first and second distributed lines contribute to formation of the matching circuit for the output stage. A second FET in a stage preceding to the output stage has its drain connected to the second voltage supply pad through a third distributed line serving as a connection conductor.

Abstract: A power amplifier circuit for efficiently generating an output signal into a load at more than one alternative power level has at least two amplifiers, each having optimum efficiency at different power output levels. The power amplifier circuit may be operated in several modes, including activating one amplifier during an entire cycle of an input signal to be amplified, or alternatively activating one amplifier based on a control signal that is independent of the amplified output signal. In either case, remaining amplifiers are deactivated. Coupling between the amplifiers prevents deactivated amplifiers from impeding the flow of power from the activated amplifier to the load. In another aspect of the invention, optimum efficiency at different power output levels is achieved by means of coupling each amplifier to a common power source and to the load via an impedance matching circuit, the impedance transformation being different for different amplifiers.

Abstract: An impedance matching circuit employed at a high frequency includes a coupling line having a length longer than 1/4 of a wavelength at a design center frequency. Therefore, the impedance can be inductive and it is possible to impedance match a circuit comprising a transistor and having a capacitive impedance. The impedance matching circuit according to the present invention functions both as a dc blocking capacitor and an impedance matching circuit. Therefore, the degree of freedom in the circuit design is increased and the circuit can be reduced in size.

Abstract: A solid state amplifier for a microwave transmitter includes a power divider wherein a signal to be amplified is divided into signals of equal signal levels. The equal level signals are respectively coupled to a plurality of amplifiers wherefrom the amplified signals are coupled to a combiner wherein the amplified signals are added and signal sum provided at an output terminal of the combiner. Each of the amplifiers may be comprised of a first stage amplifier, the output signal of which is coupled to a multiplicity of component amplifiers which, in tern, are coupled to a the output terminal of the first stage amplifier via a second power divider wherefrom signals of equal level are provided to the component amplifiers. Bias voltages are provided to the amplifiers via a modularized power supply having some modules with redundant converters.

Abstract: A fully differential distributed amplifier for providing a high frequency, high power output. The inherent base-collector capacitance of the output power transistors of each distributed amplifier is matched with on-chip inductances to create artificial transmission lines for both the input and output paths. The distributed amplifier circuit may be used as a driver for a Mach-Zehnder optical modulator. In this application an output of 3 V peak-to-peak per modulator arm is delivered at 10 Gb/s.

Abstract: A relatively high power active gain device, such as MESFET or similar transistor, has distributed impedance characteristics at relatively high RF (microwave) frequencies of operation due to physical device size limitations. A transmission line segment (104) is placed in relatively close spacial relationship and is coupled in parallel electrical relationship with the input port (162) of the high power active device. This provides for highly simplified design of an impedance prematched amplifier (100) over a relatively broad range of predetermined input signal center frequencies. An active device (102) is provided based on power requirements and is characterized over a range of center frequencies and device sizes independently from the characterization of the transmission line segment (104) over a range of center frequencies and segment lengths, since the impedance characteristics of the active device (102) and the transmission line (104) are not dependent upon each other.

Abstract: A cellular receiver range extender has an input terminal connectable to an antenna and an output terminal to which may be connected a microwave radio receiver for cellular communication signals. The input terminal directs RF signals to a bandpass preselector covering a frequency spectrum of 825 MHz to 890 MHz leading to a low-noise preamplifier for amplifying the preselected RF signals. A divider coupled to the preamplifier feeds signals from the preamplifier at equal power levels into first and second RF paths. The first path includes a band pass filter covering the reverse cellular communication channel RF signal band from 825 MHz to 845 MHz, and the second path includes a band pass filter covering the forward cellular communication channel RF signal band from 870 MHz to 890 MHz. In the first path reverse channel signals are amplified by a low-noise amplifier while in the second path forward channel signals are attenuated.

Abstract: A radio-frequency power amplifier includes a multiple-FET chip that is flip mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip mounted to the waveguide signal and ground conductors, and may be formed as coplanar waveguides with open-ended signal conductors.

Abstract: A transistor for amplifying a high-frequency signal comprises multiple unit transistors arranged about a center transmission line 122 and features reactive compensation 140 along the transmission line to provide signals at the output of the unit transistors which generally add in-phase. This has advantages in that a larger or more distributed transistor arrangement than can traditionally be used is made possible without incurring the gain or power degradation associated with the phase differences of signals amplified by unit transistors occurring at distant points along the center transmission line. The reactive compensation includes a capacitor 140 at the end of the transmission line 122 that may be fabricated along with the transistor as a portion of a monolithic integrated circuit.