Abstract: A distributed and adjustable level-shifiting netwrok is intergrated with cascaded amplifiers, eliminating the need for a direct current (dc) blocking capacitor between the amplifiers. The level-shifting network can be adjucted to compensate for process variations and to balcane the crossover firequency response of the cascaded amplifiers.

Abstract: Variable phase-shifting rf power amplifiers (10, 30, 50) shift rf outputs at any angle up to 90, 180, or 270 degrees, respectively, while maintaining an rf output substantially constant. The variable phase-shifting rf power amplifiers (10, 30, 50) include two to four field-effect transistors (Q1, Q2, Q3, Q4) that are interposed between phase splitters and combiners, and that are connected in series between a source voltage and a lower voltage. Phase shifting is achieved by selectively and variably controlling amplification of the field-effect transistors (Q1, Q2, Q3, Q4). Selective and variable control of amplification is achieved by separately and variably controlling gate voltages of the field-effect transistors (Q1, Q2, Q3, Q4), whereby a difference between the source voltage and the lower voltage is used selectively by one of the field-effect transistors (Q1, Q2, Q3, Q4) and selectively proportioned between two of the field-effect transistors (Q1, Q2, Q3, Q4).

Abstract: A power amplifier integrated circuit includes a plurality of heterojunction bipolar transistors having a plurality of bases, a plurality of ballast resistors, and a capacitor. Each ballast resistor is connected between a base of the transistor and a DC node to which a DC voltage is applied. The capacitor is connected between an RF node, which supplies an RF signal, and the plurality of bases of the transistors. The capacitor provides a distinct path for the RF input signal having a substantially high capacitance, so that the RF input signal does not suffer significant signal loss.

Abstract: Divided-voltage FET amplifiers (10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 130, 140, 150, 160, 170, 180, 200, or 220) include two or more solid-state current devices, preferably gallium arsenide FETs, (Q1, Q2, Q4, Q5, Q6, and/or Q8), connected in series or series-parallel for dc operation, and connected in parallel for rf operation, thereby improving power efficiency by using the same current two or more times to develop rf power. Various ones of the embodiments produce separate rf outputs, separately amplify two rf outputs and subsequently combine them into a single rf output, and/or selectively phase shift rf outputs. Isolation between rf frequencies and dc voltages includes using decoupling capacitors with selected resonant frequencies and low effective series resistances (ESRs) and using inductors with selected self-resonant frequencies for rf chokes.

Abstract: A distributed amplifier consistent with certain embodiments of the present invention has a plurality of amplifier sections 1 through N (302, 306) with each amplifier section having an input and an output. A plurality of N input transmission line sections are connected in series, with inputs of the 1 through N amplifier sections interconnected at their inputs along the series of input transmission line sections. A plurality of N output transmission line sections are also connected in series, with outputs of the 1 through N amplifier sections interconnected at their outputs along the series of input transmission line sections. A load (160) can be driven by an output at the Nth amplifier section (108). A high-pass filter (310) connects a dummy load (150) to the output of the first amplifier section (302). The input and output transmission line sections can, for example, be lumped element T sections and the high-pass filter can be made of a lumped element half section.

Abstract: A distributed amplifier consistent with certain embodiments of the present invention has a plurality of amplifier sections 1 through N (302, 306) with each amplifier section having an input and an output. A plurality of N input transmission line sections are connected in series, with inputs of the 1 through N amplifier sections interconnected at their inputs along the series of input transmission line sections. A plurality of N output transmission line sections are also connected in series, with outputs of the 1 through N amplifier sections interconnected at their outputs along the series of input transmission line sections. A load (160) can be driven by an output at the Nth amplifier section (108). A high-pass filter (310) connects a dummy load (150) to the output of the first amplifier section (302). The input and output transmission line sections can, for example, be lumped element T sections and the high-pass filter can be made of a lumped element half section.

Abstract: An RF variable gain amplifying device has an amplifying circuit, a switch element connected in parallel with the amplifying circuit, and a resistor connected in parallel with the amplifying circuit and with the switch element. The amplifying circuit does not operate when the switch element is in the ON state but operates when the switch element is in the OFF state. A potential at each of the input and output terminals of the switch element is lower when the switch element is in the ON state than when the switch element is in the OFF state.

Abstract: A distributed amplifier arrangement (300) is provided in which a plurality of input signals (S1(t), . . . SN(t)) are separately controlled by a drive generator circuit (315) to produce modulation of a virtual load impedance at each amplifier stage. This permits each stage (302, 304, . . . 310) of the distributed amplifier (300) to operate at maximum efficiency by permitting the stage to produce an output voltage that approaches the supply voltage. As the output power is reduced, efficiency is maintained by systematically reducing the number of stages contributing to the output to the load.

Abstract: A MMIC (microwave monolithic integrated circuit) driver amplifier having a zig-zag RF signal flow and method for the same is provided. A smaller die size and higher output gain are realized with the improved amplification stage geometry provided herein. In particular, the stages are configured in a “stacked” topology permitting a zig-zag RF signal flow through the stages. Additionally, the DC bias circuitry may be is centralized and adjacent stages may share vias. The die area for a typical K-band driver amplifier may be reduced by about 56% over a conventional amplifier design.

Abstract: A device for decoupling a supply voltage for HF amplifier circuits is described which includes an output line for coupling out an amplified signal, wherein one end of the output line, which is not used for coupling out signals, is connected to a circuit element designed as decoupling circuit. The circuit element has a low ohmic d.c. resistance and presents an HF-power absorption capacity that increases as the frequency increases, thus constituting a reflection-free termination for high frequencies. The circuit element is preferably constituted by several discrete subcircuits connected in succession. The device permits the operation of integrated distributed amplifiers of high performance at a low power loss caused by the decoupling circuit.

Abstract: A frequency selective differential amplifier (400) consistent with certain embodiments of the invention has a plurality of N amplifier stages (401, 402, 403 through 404) that collectively drive load (410). The plurality of N amplifier stages (401, 402, 403, . . . , 404) have input nodes and output nodes. A plurality of N−1 output phase shift circuits (421, 422, . . . , 423) connect the output nodes of the plurality of amplifier stages in a manner that causes output signals from the plurality of output nodes to add together for delivery to the load (410), the plurality of output phase shift circuits (421, 422, . . . , 423) have a plurality of phase shifts of &thgr;(f)={&thgr;(f)1,2; &thgr;(f)2,3; . . . ; &thgr;(f)N−2,N−1}. A plurality of N−1 input phase shift circuits (431, 432 through 433) are coupled to the plurality of input nodes and provide input signals thereto. The plurality of input phase shift circuits (431, 432, . . .

Abstract: An amplifier, in particular an RF amplifier is described having an amplifier input, the amplifier comprises: a first controllable semiconductor having a first controllable mainstream path coupled to first source means for controlling the first mainstream path, and having a first biased control input; and a second controllable semiconductor having a second controllable mainstream path coupled to second source means for controlling the second mainstream path, and having a second control input coupled to the first main stream path and to the amplifier input. Both the first and second mainstream paths are coupled to a common load, and the first and second source means are arranged for controlling input impedance and noise impedance respectively of the amplifier input. This amplifier arrangement allows independent control and optimisation of both the amplifier input impedance and the noise impedance.

Abstract: A frequency selective differential amplifier (400) consistent with certain embodiments of the invention has a plurality of N amplifier stages (401, 402, 403 through 404) that collectively drive load (410). The plurality of N amplifier stages (401, 402, 403, . . . , 404) have input nodes and output nodes. A plurality of N−1 output phase shift circuits (421, 422, . . . , 423) connect the output nodes of the plurality of amplifier stages in a manner that causes output signals from the plurality of output nodes to add together for delivery to the load (410), the plurality of output phase shift circuits (421, 422, . . . , 423) have a plurality of phase shifts of &thgr;(f)={&thgr;(f)1,2; &thgr;(f)2,3; . . . ; &thgr;(f)N−2,N−1}. A plurality of N−1 input phase shift circuits (431, 432 through 433) are coupled to the plurality of input nodes and provide input signals thereto. The plurality of input phase shift circuits (431, 432, . . .

Abstract: A broadband power amplifier module for high bit-rate SONET/SDH transmission channels, such as OC-192 and OC-768 applications. The power amplifier module, or also frequently referred to as modulator driver module, comprises amplifiers connected in series to amplify an input signal. A bias tee circuit is incorporated into the power amplifier module by connecting a conical shape inductor between the output stage of the amplifiers and the supply voltage and connecting a pair of blocking capacitors also at the output stage of the amplifiers. The conical shape inductor is adapted to provide high impedance over the entire bandwidth. The capacitors are adapted to provide high self-resonant frequency that is approaching or exceeding the bandwidth frequency. A power detection circuit can also be incorporated into the power amplifier module at the output stage of the amplifiers. The power detection circuit has a voltage divider circuit connected between the output stage and a ground supply.

Abstract: A termination network simultaneously provides a voltage-limited output direct current (dc) bias and termination of a broadband distributed amplifier operating down to an arbitrary low frequency. It is capable of being fabricated in a single Integrated Circuit (IC) chip, without the excess power dissipation associated with biasing through a termination resistor, and without the use of external inductor networks. It also limits the maximum dynamic voltage swing on the outputs of the active gain devices used within the distributed amplifier, so as to increase the reliability of the distributed amplifier under large signal over drive conditions.

Abstract: A distributed amplifier having a plurality of cascode amplifying circuits, and which causes little deterioration of the output waveform. In a preferred embodiment, the source potentials of the source-grounded transistors of the respective amplifying circuits are set individually. The source potentials of none or one or more of the source-grounded transistors are set at +0.8 volts, and the source potentials of the remaining source-grounded transistors are set at zero volts. The voltage gain of the source-grounded transistors whose source potential is +0.8 volts is zero, so that these source-grounded transistors do not contribute to the voltage gain of the amplifier as a whole. The source-grounded transistors whose source potential is zero volts contribute to the voltage gain, and output an amplified signal with a good waveform. The magnitude of the voltage gain can be adjusted by setting the number of source-grounded transistors whose source potential is zero volts.

Abstract: A system for amplifying a signal is provided. The system includes a wave guide and an active loop amplifier disposed in the wave guide. The active loop amplifier receives the signal and generates a magnetic field in response to the signal, such as one that couples to the propagating mode of the wave guide.

Abstract: An RF power amplifier has a pair of power amplifying elements for receiving first and second distributed signals resulting from distribution of an input signal from the outside and having the characteristics of the same amplitude and opposite phases, performing power amplification with respect to each of the first and second distributed signals that have been received, and outputting the first and second amplified signals and a pair of transmission lines connected correspondingly to the pair of power amplifying elements. The pair of transmission lines have a pair of protruding portions provided at respective edge portions thereof disposed in opposing relation. The pair of protruding portions are disposed in mutually spaced apart and opposing relation to compose a capacitor.

Abstract: Quarter wave transformers are connected to final outputs of a carrier amplifier and a peaking amplifier, which are coupled in parallel to each other, so as to induce a Doherty operation of a microwave Doherty amplifier. Load matching circuits for obtaining a microwave output matching are connected to output terminals of the carrier amplifier and the peaking amplifier. A phase tuning component is positioned behind the load matching circuit. Accordingly, a matching state can be maintained without being changed at a high power level but can be adjusted depending on phase variations at a low power level to attain efficiency enhancements and optimum linearity.

Abstract: A node for commonly supplying a ground potential in an amplification circuit (MMIC11) is formed. The input and output system ground surfaces of a printed wiring board (PWB) on which the amplification circuit (MMIC11) is to be mounted are electrically separated from each other on the printed wiring board (PWB). Since no ground pattern is present on the amplification circuit (MMIC11), the ground node of the amplification circuit (MMIC11) serves as a means for supplying a true ground potential. While a compact package is realized by preventing an increase in number of leads, oscillation is prevented, so a high gain can be realized.

Abstract: A distributed amplifier arrangement (300) is provided in which a plurality of input signals (S1(t), . . . SN(t)) are separately controlled by a drive generator circuit (315) to produce modulation of a virtual load impedance at each amplifier stage. This permits each stage (302, 304, . . . 310) of the distributed amplifier (300) to operate at maximum efficiency by permitting the stage to produce an output voltage that approaches the supply voltage. As the output power is reduced, efficiency is maintained by systematically reducing the number of stages contributing to the output to the load.

Abstract: A broadband RF signal amplifier includes a plurality of transistors attached to a surface of a pedestal, each transistor having an input and an output. An RF input path electrically connected to the transistor inputs includes a passive splitter implemented in a multi-layer printed circuit board and configured to split a RF input signal into a plurality of component input signals. A plurality of corresponding input matching networks including one-quarter wavelength transmission lines implemented in the printed circuit board couple respective component input signals to the transistor inputs at an input impedance, the input matching networks further comprising respective input matching capacitors attached to the pedestal. An RF output path electrically connected to the transistor outputs includes a passive combiner implemented in the printed circuit board and configured to combine component output signals received at the transistor outputs into a RF output signal.

Abstract: A hybrid low voltage distributed power amplifier structure (300) provides improved efficiency by forming drain transmission line inductors (323) on a substrate (306) while the rest of the amplifier is built in IC form (302). A wirebond interconnection (330) is made between the IC's drainline capacitors (324) and the substrate's drainline inductors (323) which are a higher impedance point in the circuit. As a result, the wirebond inductance becomes negligible and has little or no impact on the power amplifier's performance.

Abstract: A radio-frequency amplifier comprises slot lines formed in a top electrode which are bent to define matching segments that are perpendicular to transmitting segments. The matching segments have a length corresponding to one-quarter of the wavelength of a signal to be amplified and are at least partially perpendicular to the transmitting segments. A DC-cut circuit comprising slot lines is connected to the matching segments, an FET is connected to the transmitting segments and the matching segments, and respective matching circuits serve as an input unit and an output unit of the FET. Source terminals of the FET are connected to parts of a top electrode that do not lie between the segments. A drain terminal and a gate terminal are connected, to be electrically separated from each other, to parts of the top electrode, which are electrically separated from the source terminals by the DC-cut circuit, the transmitting segments, and the matching segments.

Abstract: An improved waveguide wall structure and improved waveguide using the new wall structure as the interior walls of the waveguide. The wall structure comprises a sheet of dielectric material, a series of parallel conductive strips on one side of the dielectric material and a layer of conductive material on the other side. Multiple conductive vias are also included through the dielectric material and between the conductive layer and conductive strips. The new wall structure presents as a series of parallel L-C circuits to a transverse E field at resonant frequency, resulting in a high impedance surface. The wall structure can be used in waveguides that transmit a signal in one polarization or signals that are cross polarized. The new waveguide maintains a near uniform density E field and H field component, resulting in near uniform signal power density across the waveguide cross section.

Abstract: A distributed amplifier having an improved transimpedance and/or gain comprises an input transmission line, the input transmission line forming an input of the distributed amplifier and having a characteristic impedance associated therewith, and an output transmission line, the output transmission line forming an output of the distributed amplifier and having a characteristic impedance associated therewith. The distributed amplifier further comprises a plurality of amplifying stages, each of at least a subset of the amplifying stages including an input and an output, the input of each amplifying stage in the subset being operatively coupled to the input transmission line and the output of each amplifying stage in the subset being operatively coupled to the output transmission line.

Abstract: The present invention relates to a bias tracking network that manipulates the DC value of the control voltage applied to the active devices in each quasi-optic cell within an array of cells. The purpose of this network is to compensate for variations in the main DC bias supply voltage provided to each cell. In one embodiment, the bias tracking network includes a set of resistive voltage dividers at the boundary of each cell, together with resistors inserted within the conductors that carry a reference voltage from which the control voltage for each cell is derived. This impedance network introduced at each cell boundary causes the control voltage to “track” the variation in the voltage of the return lead (i.e., the “ground lead”) at each cell in the array, in order to maintain a consistent (or desired) control voltage distribution to each cell in the array.

Abstract: Methods and circuitry for implementing monolithic high gain wideband amplifiers. The invention implements an amplifier with a limiter that also performs a signal dividing function. In a specific embodiment, the limiter is designed to make available two in-phase outputs that are then used to drive two gate input lines of a combiner distributed amplifier.

Abstract: Four unit FETs are linearly disposed in the length direction of the belt-shaped gate electrode. The neighboring drain electrodes and the neighboring gate electrodes are connected through high-impedance transmission lines, respectively. The end opposite to the output portion of the circuit connecting the drain electrodes and the end opposite to the input portion of the circuit connecting the gate electrodes electrically in consecutive order are connected to terminating circuits having no resistor, and the other ends are connected to a source wiring metal.

Abstract: A method of forming a co-axial interconnect line in a dielectric layer is provided. The method includes defining a trench in the dielectric layer and then forming a shield metallization layer within the trench. After forming the shield metallization layer, a conformal oxide layer is deposited within the shield metallization layer. A center conductor is then formed within the conformal oxide layer. Once the center conductor is formed, a fill oxide layer is deposited over the center conductor. A cap metallization layer is then formed over the fill oxide layer and is in contact with the shield metallization layer.

Abstract: A high frequency power amplifier is provided that prevents loop oscillation at a low frequency caused by a closed loop formed between combined semiconductor devices. Previously, coupled-line directional couplers or capacitors for low frequency rejection have been used to prevent the closed loop from being formed. Also, a circuit including a resistance component required for attenuating self-oscillation has been provided. Therefore, to prevent both loop oscillation and self oscillation, two circuits have been required. Accordingly, a high frequency power amplifier is provided with a low frequency prevention circuit that attenuates the passing of each frequency of loop oscillation and self oscillation to each signal line divided by a power divider. Thus, the two circuits respectively required for preventing the loop oscillation and self oscillation of a travelling wave combine type amplifier can be formed by one low frequency prevention circuit.

Abstract: A small aspect ratio, high power MMIC amplifier is disclosed. The small aspect ratio MMIC amplifier is capable of achieving the same power levels as conventional power amplifier designs, but with an aspect ratio of near 1:1, versus 4:1 of conventional power amplifiers. The small aspect ratio MMIC amplifier layout uses two different types of FETs, with all gate fingers of both types of FETs running in the same direction. One type of FET is a conventional FET, in which the gate stripes run parallel to the direction of the output. In the conventional FET, the gate manifold and the drain manifold both generally extend in the x-direction (parallel to each other). The other type of FET has gate fingers that run perpendicular to the direction of the output. In this other type of FET, the gate manifold generally extends in the x-direction, while the drain manifold generally extends in the y-direction (perpendicular to each other).

Abstract: A modular high power solid state amplifier and method of assembly, manufacture and use are herein disclosed. The high power amplifier includes a number of amplifiers, a DC board having flexible interconnects, a RF cover including an interlocking RF input, a RF board, a chassis, and a top cover; thereby providing an encased stand-alone solid state amplifier. The solid state components, angled designs, and piggyback topology of the invention provide a compact, efficient, integrated high power amplifier device.

Abstract: A high power microwave amplifier implementation comprised of a conductive substrate defining first and second parallel planar surfaces and an edge surface extending substantially perpendicular to said planar surfaces. Output transistors are physically mounted adjacent to said edge surface enabling a heat sink to be placed in close proximity thereto. Microwave input circuitry is located adjacent to said first planar surface and microstrip output circuitry is located adjacent to said second planar surface. The substrate is mounted in a conductive housing so as to partition the housing interior volume into isolated first and second cavities respectively containing the input circuitry and output circuitry.

Abstract: A suspended transmission line with an embedded amplifier includes a support layer and a conductor supported on the support layer between first and second plates each having a ground plane. The conductor includes an input section and an output section. A propagation structure is disposed between the first and second plates to substantially encompass an electric field generated by a signal transmitted on the conductor. An amplifier is coupled to the input and output sections of the conductor and is at least substantially disposed between the first and second plates. The amplifier operates to amplify an input signal received on the input section to generate an output signal on the output section.

Abstract: A method for configuring low-noise integrated amplifier circuits having an input stage with a transistor includes noise matching the circuit to the real part of a predetermined output impedance of a transfer element connected upstream of the circuit by a choice of process parameters during the production of the circuit and/or of geometry parameters of the integrated components and/or dimensioning the component values of the circuit, the noise figure of the circuit, dependent on a real generator resistance, is less than a predetermined figure in a range wherein the value of the output impedance real part also lies. The required power matching of the input impedance of the circuit to the output impedance is performed by choosing the effective load on a transistor collector to produce a complex voltage gain that, due to the Miller effect, generates an input impedance equal to the complex conjugate of the predetermined output impedance.

Abstract: A low noise amplifier (82) for use in a wireless telecommunications system. The amplifier (82) includes an amplifying device (90), such as an FET, and a plurality of oscillation stabilization components monolithically integrated on a common substrate (132). The stabilization components reduce the gain of the amplifying device (90) at high frequencies to prevent high frequency oscillations. The substrate (132) is on the order of 4 mils thick, so that the operation of the stabilization components are predictable at high frequencies.

Abstract: The present invention describes the method and system of applying filter synthesis technique to distributed amplifier design. The method for synthesizing a distributed amplifier comprises the steps of determining an appropriate filter design characteristic, computing inductor and capacitor values, converting the equivalent values into a distributed amplifier with response characteristics that mirror that of the chosen filter. Applying filter synthesis techniques to distributed amplifier design results in predictable amplifier response characteristics. Filter synthesis techniques are used to design filters with controllable characteristics such as gain, cut-off frequency, and roll-off slope. Depending on the desired filter characteristics, appropriate inductor and capacitor sizes can be determined. Transferring these chosen inductors and capacitors sizes to the distributed amplifier results in amplitude and phase responses that behave like a preferred embodiment or prototype filter.

Abstract: A MMIC (microwave monolithic integrated circuit) driver amplifier having a zig-zag RF signal flow and method for the same is provided. A smaller die size and higher output gain are realized with the improved amplification stage geometry provided herein. In particular, the stages are configured in a “stacked” topology permitting a zig-zag RF signal flow through the stages. Additionally, the DC bias circuitry may be is centralized and adjacent stages may share vias. The die area for a typical K-band driver amplifier may be reduced by about 56% over a conventional amplifier design.

Abstract: A plurality of amplifying circuits 31 to 34 are connected between input and output transmission circuits 10 and 20 in a forward direction, a bias-T 29 is connected to an output terminal OUT of the transmission circuit 20, and a DC bias voltage VDD1 is applied to the outputs of the amplifying circuits 31 to 34 through the inductor 292 of the circuit 29 and the transmission circuit 20. The opposite end to the output terminal OUT is grounded through a series connection of a terminating resistor R2 and a DC voltage source 30 having an output voltage VDD 2. Since VDD1=VDD1, the DC voltage across the terminating resistor R2 is zero. The inductor 292 may be connected in parallel to the terminating resistor R2 with omitting the bias voltage VDD1.

Abstract: There is disclosed an improved variable gain low-noise amplifier.

Abstract: A microwave amplifier and more particularly to a microwave amplifier configured as a Doherty amplifier. The amplifier includes a carrier amplifier, a peak amplifier, a Lange coupler at the input of the amplifiers and quarter wave amplifier at the output of the amplifiers. In order to further increase the efficiency, the Doherty amplifier is formed from HEMT/HBT technology to take advantage of the low-noise performance of HEMTs and the high-linearity of HBTs to form a relatively efficient amplifier that functions as a low-noise amplifier at low power levels and automatically switches to high-power amplification for relatively high-impact RF power levels.

Abstract: In a high-frequency circuit having bias lines that cross a microstrip line in a plan view, portions of the bias lines are formed on a reverse side of a substrate without forming, in the microstrip line, capacitors required for separating the bias lines from each other as an independent DC line, thus contributing to miniaturizing the high-frequency circuit.

Abstract: A distributed amplifier (40) is provided that comprises an input transmission line (48) and an output transmission line (50). The distributed amplifier (40) also comprises a first distributed amplifier cell (42) and second distributed amplifier cell (44) connected to the input transmission line (48) and the output transmission line (50). The first distributed amplifier cell (42) and second distributed amplifier cell (44) has a first transistor (52) and a second transistor (54) in a first cascode configuration between the input transmission line (48) and the output transmission line (50) and the first transistor (52) is configured with a first feedback loop (78) and the second transistor (54) is configured with a second feedback loop (80).

Abstract: A method for configuring low-noise integrated amplifier circuits having an input stage with a transistor includes noise matching the circuit to the real part of a predetermined output impedance of a transfer element connected upstream of the circuit by a choice of process parameters during the production of the circuit and/or of geometry parameters of the integrated components and/or dimensioning the component values of the circuit, the noise figure of the circuit, dependent on a real generator resistance, is less than a predetermined figure in a range wherein the value of the output impedance real part also lies. The required power matching of the input impedance of the circuit to the output impedance is performed by choosing the effective load on a transistor collector to produce a complex voltage gain that, due to the Miller effect, generates an input impedance equal to the complex conjugate of the predetermined output impedance.

Abstract: A planar dielectric integrated circuit is provided such that energy conversion loss between a planar dielectric line and electronic components is small and that impedance matching between them can be easily obtained. A planar dielectric line is provided by causing two slots to oppose each other with a dielectric plate interposed in between, a slot line and line-conversion conductor patterns are provided in the end portions of the planar dielectric line, and an FET is disposed in such a manner as to be extended over the slot line.

Abstract: Methods and apparatus (40) of amplifying a telecommunication signal (41) are provided in accordance with the present invention. The apparatus (40) comprises an input transmission line (48) configured to receive the telecommunication signal (41), an output transmission line (50) configured to provide an amplified output of the telecommunication signal (41) and N amplifier sections (42, 44, 45, 46) having a transistor (52) connected to the input transmission line (48) and the output transmission line (50). The apparatus (40) further comprises a waveform controller (84) connected to the transistor 52 and also configured to identify a signal level of the telecommunication signal 41.

Abstract: An integrated circuit is provided that contains a coaxial signal line formed at least partially within a silicon-containing substrate. The coaxial signal line comprises an inner conductor having a length, said length axially surrounded by, and insulated from, an outer conductor along said length. A method of preparing such an integrated circuit having said coaxial signal line formed at least partially within a silicon-containing substrate is also disclosed herein.

Abstract: A node for commonly supplying a ground potential in an amplification circuit (MMIC11) is formed. The input and output system ground surfaces of a printed wiring board (PWB) on which the amplification circuit (MMIC11) is to be mounted are electrically separated from each other on the printed wiring board (PWB). Since no ground pattern is present on the amplification circuit (MMIC11), the ground node of the amplification circuit (MMIC11) serves as a means for supplying a true ground potential. While a compact package is realized by preventing an increase in number of leads, oscillation is prevented, so a high gain can be realized.

Abstract: A hybrid microwave and millimeter wave integrated circuit (MMIC) RF power amplifier includes an integrated circuit in which an amplifier circuit is fabricated and an output impedance matching network comprising metal-insulator-metal (MIM) capacitors mounted on the integrated circuit chip with bonding wire inductors connecting the amplifier circuit with the capacitor elements. The resulting structure has a smaller form factor as compared to conventional power amplifiers employing planar transmission lines and surface mount technology capacitors.