Including Temperature Compensation Means Patents (Class 330/289)
  • Patent number: 10171036
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: January 1, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
  • Patent number: 10135403
    Abstract: A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: November 20, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 10128797
    Abstract: A power amplifier circuit includes a first amplifier transistor and a bias circuit. The first amplifier transistor amplifies a first signal and outputs a second signal. The bias circuit supplies a bias voltage or a bias current to the first amplifier transistor. The first amplifier transistor includes plural unit transistors disposed in a substantially rectangular region. The bias circuit includes first and second bias transistors and first and second voltage supply circuits. The first and second bias transistors respectively supply first and second bias voltages or first and second bias currents to the bases of unit transistors of first and second groups. The first and second voltage supply circuits respectively supply first and second voltages to the bases of the first and second bias transistors. The first and second voltages are decreased in accordance with a temperature increase. The second voltage supply circuit is disposed within the substantially rectangular region.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: November 13, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kenji Sasaki
  • Patent number: 10027287
    Abstract: The present disclosure relates to a World Band Radio Frequency Power Amplifier and a World Band Radio Frequency Front End Module. The World Band Power Amplifier can contain at least one broadband power amplifier connected to a switch which can direct an RF input signal to a plurality of transmission paths, each transmission path configured for a different frequency. The World Band RFFE Module is more integrated version of the World Band Power Amplifier that can contain broadband RF PA(s), switches, logic controls, filters, duplexers and other active and passive components. The module may also include a thermal protection system capable of effecting operation of the broadband power amplifier.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: July 17, 2018
    Assignee: MICRO MOBIO CORPORATION
    Inventors: Ikuroh Ichitsubo, Shinsuke Inui, Guan-Wu Wang, Weiping Wang, Zlatko Filipovic
  • Patent number: 10003309
    Abstract: A method and system for adaptive self-biasing of a power amplifier are disclosed. A current (Ids) at an output of the power amplifier is measured, the current being a sum of a quiescent current (Idq) and a current arising from an RF signal applied to an input of the power amplifier. An output signal power (Pout) of the power amplifier is measured. A target value of Ids corresponding to the measured value of Pout is either calculated or obtained from a look-up table. The measured current Ids is compared to the target value of Ids to determine an error value. An input biasing voltage (Vgs) of the power amplifier is adjusted based on the error value to achieve a measured value of Ids that is equal to the target value of Ids corresponding to the measured value of Pout.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: June 19, 2018
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventor: Jadran Lokas
  • Patent number: 9917563
    Abstract: Apparatus and methods for biasing of power amplifiers are disclosed. In one embodiment, a mobile device includes a transceiver that generates a radio frequency signal and a power amplifier enable signal, a power amplifier that provides amplification to the radio frequency signal and that is biased by a bias signal, and a bias circuit that receives the power amplifier enable signal and generates the bias signal. The bias circuit includes a gain correction circuit that generates a correction current in response to activation of the power amplifier enable signal, and a primary biasing circuit that generates the bias signal based on the correction current and the power amplifier enable signal.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: March 13, 2018
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Ping Li, Paul T. DiCarlo
  • Patent number: 9912300
    Abstract: Provided is a bias control circuit that includes: a reference voltage circuit that generates a reference voltage; a resistor; a temperature dependent current generating circuit that generates a temperature dependent current, which changes depending on temperature, on the basis of the reference voltage and that supplies the temperature dependent current to one end of the resistor; a reference voltage buffer circuit that applies the reference voltage to the other end of the resistor; a constant current generating circuit that generates a constant current, which is for driving the reference voltage buffer circuit, on the basis of the reference voltage and that supplies the constant current to the other end of the resistor; and a bias generating circuit that generates a bias voltage or a bias current for a power amplification circuit on the basis of the voltage at the one end of the resistor.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: March 6, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoshiaki Harasawa, Fuminori Morisawa
  • Patent number: 9702928
    Abstract: Failure in a self-healing array may be handled by: detecting a failing element of the self-healing array by monitoring characteristics of the failing element; auto-correcting a failing element of the self-healing array by adjusting characteristics of the failing element to compensate for a portion of the failing element which is failing; or correcting performance of the self-healing array when one or more elements of the self-healing array fail by detecting and modeling an impact of the one or more elements of the self-healing array which failed on the performance of the self-healing array.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: July 11, 2017
    Assignee: THE BOEING COMPANY
    Inventors: Gavin D. Holland, David L. Allen
  • Patent number: 9629212
    Abstract: A control unit for a LED assembly includes a first and second LED unit, the LED units being serial connected. The LED assembly, in use, is powered by a switched mode power supply. The control unit being arranged to receive an input signal representing a desired output characteristic of the LED assembly, determine a first and second duty cycle for respective LED units associated with a nominal current of the switched mode power supply, for providing the desired output characteristic, determine the largest of the first and second duty cycles for respective LED units, determine a reduced current based on at least the largest of the duty cycles, adjust the first and second duty cycle for respective LED units based on the reduced current, and provide an output signal for the LED assembly and the switched mode power supply based on the adjusted first and second duty cycles and the reduced current for obtaining the desired characteristic.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: April 18, 2017
    Assignee: ELDOLAB HOLDING B.V.
    Inventors: Marc Saes, Petrus Johannes Maria Welten
  • Patent number: 9584078
    Abstract: Apparatus and methods for radio frequency (RF) amplifiers are disclosed herein. In certain implementations, a packaged RF amplifier includes a first bipolar transistor including a base electrically connected to an RF input pin and a collector electrically connected to an RF output pin, and a second bipolar transistor including a base electrically connected to an emitter of the first bipolar transistor and a collector electrically connected to the RF output pin. The packaged RF amplifier further includes a first bias circuit electrically connected between the base of the first bipolar transistor and the RF output pin, a second bias circuit electrically connected between the base of the first bipolar transistor and a power low pin, an inductor implemented at least partly by a bond wire, and a third bias circuit electrically connected in series with the inductor between the base of the second bipolar transistor and the power low pin.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: February 28, 2017
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Alan William Ake, David C. Dening
  • Patent number: 9548711
    Abstract: A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: January 17, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 9503036
    Abstract: A power amplifier having a stack structure, including: a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal; a second driver stage that has a power input terminal connected with a ground terminal of the first driver stage and receiving a virtual power voltage and an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; and a power stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the second driver stage, and receives and amplifies an output signal from the second driver stage.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: November 22, 2016
    Assignee: SOONGSIL UNIVERSITY RESEARCH CONSORTIUM TECHNO-PARK
    Inventors: Ho Yong Hwang, Chang Kun Park
  • Patent number: 9480160
    Abstract: There is disclosed a supply feed network for an envelope tracking power amplifier arrangement comprising a power amplifier and a voltage modulator for providing a supply voltage to the power amplifier, the supply feed network comprising: a power distribution plane arranged to connect the supply voltage from the voltage modulator to the power amplifier.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: October 25, 2016
    Assignee: QUALCOMM Incorporated
    Inventor: Gerard Wimpenny
  • Patent number: 9419567
    Abstract: The present disclosure relates to a system for biasing a power amplifier. The system can include a first die that includes a power amplifier circuit and a passive component having an electrical property that depends on one or more conditions of the first die. Further, the system can include a second die including a bias signal generating circuit that is configured to generate a bias signal based at least in part on measurement of the electrical property of the passive component of the first die.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: August 16, 2016
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: David Steven Ripley, Philip John Lehtola, Peter J. Zampardi, Jr., Hongxiao Shao, Tin Myint Ko, Matthew Thomas Ozalas
  • Patent number: 9354644
    Abstract: Practical electronics such as amplifiers or voltage references can have circuit imbalances due to manufacturing imperfections. For example, amplifiers can have an undesirable offset voltage. The offset voltage might also drift with temperature making the design of these devices difficult. Disclosed are techniques which decrease the amount of offset voltage which provide predictability of device parameters over a range of temperatures.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: May 31, 2016
    Assignee: ANALOG DEVICES, INC.
    Inventors: Yogesh Jayaraman Sharma, Nathan R. Carter
  • Patent number: 9154090
    Abstract: Devices and methods for correcting for start-up transients in integrated power amplifiers are disclosed. A delay element is arranged to produce a delay waveform signal that is responsive to an input voltage signal. A transconductance element has an input that receives the delay waveform signal and is arranged to provide an output boost current that is based on the delay waveform signal and a gain of the transconductance element. A reference element provides an output bias current that is responsive to a static reference current and the boost current. A bias element has an input that receives the bias current and is arranged to provide a bias control output. A power amplifier is responsive to the bias control output and is arranged to provide an amplified power output.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: October 6, 2015
    Assignee: MICROSEMI CORPORATION
    Inventor: Kyle Hershberger
  • Patent number: 9121741
    Abstract: In an electromagnetic flow meter, a signal amplifying circuit has an FET-input type differential amplifier wherein one input terminal is connected to a flow rate signal input terminal and the other input terminal is connected to a flow rate signal input terminal. An amplified output signal, which is obtained through performing differential amplification on the flow rate signals, is outputted from an output terminal. A fault detecting circuit detects a fault in the flow rate signal through comparing the electropotential of the amplified output signal to an upper limit reference electropotential and a lower limit reference electropotential.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: September 1, 2015
    Assignee: AZBIL CORPORATION
    Inventors: Osamu Momose, Youhei Sakano
  • Patent number: 9065389
    Abstract: A radio frequency (RF) power amplifier with no reference voltage for biasing is disclosed. The RF power amplifier includes a three-terminal current source circuit, a current mirror circuit and an output-stage circuit. The three-terminal current source circuit receives a first system voltage and accordingly outputs a first current and a second current, and a source voltage exists between a first output terminal of the first current and a second output terminal of the second current. The current mirror circuit receives the first current and the second current and accordingly generates a bias current. The output-stage circuit receives the bias current so as to work at an operation point.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: June 23, 2015
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING INC.
    Inventors: Jaw-Ming Ding, Hsin Chin Chang
  • Patent number: 9035701
    Abstract: This disclosure relates generally to radio frequency (RF) amplification devices and methods of limiting an RF signal current. Embodiments of the RF amplification device include an RF amplification circuit and a feedback circuit. The RF amplification circuit is configured to amplify an RF input signal so as to generate an amplified RF signal that provides an RF signal current with a current magnitude. The feedback circuit is used to limit the RF signal current. In particular, a thermal sense element in the feedback circuit is configured to generate a sense current, and thermal conduction from the RF amplification circuit sets a sense current level of the sense current as being indicative of the current magnitude of the RF signal current. To limit the RF signal current, the feedback circuit decreases the current magnitude of the RF signal current in response to the sense current level reaching a trigger current level.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: May 19, 2015
    Assignee: RF Micro Devices, Inc.
    Inventors: Derek Schooley, Robert Bennett, James Leake, Pradeep Silva
  • Patent number: 9013238
    Abstract: A radio frequency (RF) amplifier is disclosed. The RF power amplifier includes a bias circuit, an output-stage circuit and a RF compensation circuit. When a first system voltage is larger than a first voltage threshold value, the bias circuit generates a first current rising slightly. When first system voltage is larger than second voltage threshold value, the RF compensation circuit receives a second circuit rising slightly transmitted from the bias circuit. When the first system voltage is in an operation voltage range, the first current is larger than the second circuit so as to a quiescent operating current of the RF power amplifier is independent of change of the first system voltage. When the first system voltage is larger than a third voltage threshold value, the first current is equal to the second current so as to have the bias current being a zero current to protect the RF power amplifier from over-voltage.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: April 21, 2015
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Jaw-Ming Ding, Jia-Hong Mou, Hsin-Chin Chang
  • Patent number: 8994453
    Abstract: There is provided a power amplifier including a bias circuit unit generating a bias voltage of an amplifying unit, a voltage drop unit disposed between the bias circuit unit and the amplifying unit to drop the bias voltage to a base voltage, and a bypass circuit unit including an impedance element connected to the voltage drop unit in parallel and performing a switching operation according to a magnitude of an input signal.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: March 31, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Goo Won, Youn Suk Kim, Young Jean Song, Ki Joong Kim, Myeong Woo Han, Shinichi Iizuka, Ju Young Park
  • Patent number: 8981849
    Abstract: There are provided a bias circuit and a power amplifier with a dual-power mode. The bias circuit includes a regulated voltage generation unit generating a regulated voltage by using a reference voltage, a bias voltage generation unit generating a bias voltage according to the regulated voltage, and a power mode control unit operating in any one of a high power mode and a low power mode according to a power mode voltage and dropping the regulated voltage in the low power mode.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: March 17, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Young Jean Song
  • Patent number: 8970516
    Abstract: This disclosure provides systems, methods and apparatus for combining devices deposited on a first substrate, with integrated circuits formed on a second substrate such as a semiconducting substrate or a glass substrate. The first substrate may be a glass substrate. The first substrate may include conductive vias. A power combiner circuit may be deposited on a first side of the first substrate. The power combiner circuit may include passive devices deposited on at least the first side of the first substrate. The integrated circuit may include a power amplifier circuit disposed on and configured for electrical connection with the power combiner circuit, to form a power amplification system. The conductive vias may include thermal vias configured for conducting heat from the power amplification system and/or interconnect vias configured for electrical connection between the power amplification system and a conductor on a second side of the first substrate.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: March 3, 2015
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Justin Phelps Black, Ravindra V. Shenoy, Evgeni Petrovich Gousev, Aristotele Hadjichristos, Thomas Andrew Myers, Jonghae Kim, Mario Francisco Velez, Je-Hsiung Jeffrey Lan, Chi Shun Lo
  • Publication number: 20150048888
    Abstract: An assembly structure of a power amplifier is provided. The assembly structure comprises at least two power amplifier modules, each power amplifier module comprises a heat-conducting board, an amplifier tube matching circuit board is assembled on the heat-conducting board; at least one radio frequency power amplifier tube is assembled on the amplifier tube matching circuit board, assembly directions of all the radio frequency power amplifier tubes are parallel to each other; the heat-conducting boards of adjacent two power amplifier modules are connected vertically along a transmission direction of the radio frequency signal. Comparing with the existing plane assembly technology, the application has a character of needing small assembly areas, which is adapted in an assembly environment with a certain height and small assembly areas.
    Type: Application
    Filed: April 6, 2012
    Publication date: February 19, 2015
    Applicant: Wuhan Gewei Electronic Technology Co., Ltd
    Inventor: Qingnan Meng
  • Patent number: 8933921
    Abstract: Disclosed are an adjustment method of an LCD (Liquid Crystal Display) overdrive voltage and the device. The adjustment method comprises steps below: locating a transistor at a position capable of sensing a temperature of an LCD panel; providing a constant current source to a drain of the transistor and a conducting voltage to the transistor, and a voltage difference between a source and a gate changing according to a temperature changing of the LCD panel; receiving voltages of the source and the gate of the transistor to calculate a voltage difference therebetween and outputting an amplified value of the voltage difference by an error amplifier; receiving the amplified value of the voltage difference and outputting corresponding binary signals by an analog to digital converter; providing a selector storing a plurality of overdrive voltages for selecting different overdrive voltages according to the different binary signals to adjust the LCD overdrive voltage.
    Type: Grant
    Filed: August 27, 2011
    Date of Patent: January 13, 2015
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Dengxia Zhao, Poshen Lin
  • Patent number: 8928404
    Abstract: A method and related systems for amplifier performance stabilization of a digitally predistorted RF power amplifier are disclosed. The characteristics of power amplifiers change as a function of temperature making adaptive digital predistortion highly problematic during initial application of an RF signal to a power amplifier. Embodiments disclose a method and systems in which the power amplifier is taken through a preparatory phase before the RF signal is applied to the power amplifier and the digital predistortion calculation starts. This is achieved by increasing the quiescent current of the power stages beyond nominal values for a rapid warm up and readjusting to its normal bias point when the radio frequency signal is applied and the digital predistortion is turned on.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: January 6, 2015
    Assignee: Intel Corporation
    Inventors: Ahmad Khanifar, Yatin Buch, George Sideris, Khurram Sheikh, Alexander Rabinovich
  • Publication number: 20150002224
    Abstract: There are provided a bias circuit and a power amplifier. The bias circuit includes a first temperature compensating unit connected between an operating voltage terminal and a ground and operating according to a reference voltage to generate a turn-on voltage, a second temperature compensating unit connected between a reference voltage terminal and the ground and operating according to the turn-on voltage to generate a control voltage, a power mode selecting unit selecting one of a high power mode and a low power mode and providing an additional current to the first temperature compensating unit at the time of selecting the low power mode to increase the turn-on voltage, and a bias voltage generating unit generating a bias voltage according to the control voltage, wherein the control voltage and the bias voltage are decreased according to the increase in the turn-on voltage.
    Type: Application
    Filed: September 24, 2013
    Publication date: January 1, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Jean SONG, Myeong Woo HAN, Jun Goo WON, Shinichi IIZUKA, Youn Suk KIM, Ki Joong KIM
  • Patent number: 8922280
    Abstract: A temperature compensation circuit is adapted to be used in an electronic device including a processing circuit. The temperature compensation circuit includes a thermistor, a compensation capacitor and a compensation diode. The thermistor has two ends, one of which is adapted to be electrically connected to the processing circuit. The compensation capacitor has two ends, one of which is electrically connected to the other one of the two ends of the thermistor. The compensation diode has an anode electrically connected to the other one of the two ends of the compensation capacitor, and a cathode to be grounded. The impedance of the thermistor varies with temperature so as to compensate and stabilize an output of the electronic device.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: December 30, 2014
    Assignee: Wistron Corporation
    Inventor: Po Wen Hsueh
  • Patent number: 8896380
    Abstract: A high frequency amplifier is characterized wherein a power amplification element and at least one of temperature compensation elements are adjacently provided on a first semiconductor layer, a first wiring pattern connected to the power amplification element, a second wiring pattern connected to the temperature compensation element, and a ground electrode are provided on at least one of second semiconductor layers existing in layers different from the first semiconductor layer, and the ground electrode is formed on the second semiconductor layer corresponding to a region that substantially projects a crevice part on which the temperature compensation element and the power amplification element are provided, on the same plane as the first semiconductor element.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: November 25, 2014
    Assignee: TDK Corporation
    Inventors: Tomihiko Shibuya, Atsushi Ajioka, Atsushi Tsumita
  • Patent number: 8884700
    Abstract: A temperature control system having: a resistor formed in a region of a semiconductor, such resistor having a pair of spaced electrodes in ohmic contact with the semiconductor; at least one device formed in another region of the semiconductor thermally proximate the resistor formed region, such device generating heat in the semiconductor; and circuitry, including a reference connected to one of the pair of electrodes, for operating the resistor in saturation and for sensing variation in the resistor in response to the heat generated by the device and for controlling the heat generated by the device in the semiconductor in response to the sensed variation.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: November 11, 2014
    Assignee: Raytheon Company
    Inventors: Jon Mooney, Bryan G. Fast, David D. Heston
  • Publication number: 20140320210
    Abstract: Communications equipment including communications equipment for wireless communications may benefit from power amplifier transistors having stabilized characteristics. For example, certain power amplifier transistors may benefit from having their characteristics stabilized during bias switching. An apparatus can include a power amplifier device. The apparatus can also include a voltage or current input to the power amplifier device. An input voltage or current to the voltage or current input can be configured to be controlled according to scheduled transmission in a slot. The apparatus can also include a gate bias insertion circuit provided at the bias input. The gate bias insertion circuit can be configured to provide a reduced input voltage or current as a power amplifier bias. The reduced input voltage or current can be configured to correspond to a threshold of a transistor of the power amplifier when transmission is not scheduled in a slot.
    Type: Application
    Filed: April 29, 2013
    Publication date: October 30, 2014
    Inventor: Darrell BARABASH
  • Patent number: 8872591
    Abstract: A temperature compensation circuit is adapted to be used in an electronic device including a processing circuit. The temperature compensation circuit includes a thermistor, a compensation capacitor and a compensation diode. The thermistor has two ends, one of which is adapted to be electrically connected to the processing circuit. The compensation capacitor has two ends, one of which is electrically connected to the other one of the two ends of the thermistor. The compensation diode has an anode electrically connected to the other one of the two ends of the compensation capacitor, and a cathode to be grounded. The impedance of the thermistor varies with temperature so as to compensate and stabilize an output of the electronic device.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: October 28, 2014
    Assignee: Wistron Corporation
    Inventor: Po Wen Hsueh
  • Patent number: 8866551
    Abstract: A dual compensation operational amplifier is suitable for use in an environment that experiences fluctuations in ambient energy levels. A dual compensation impedance can be determined to nullify or compensate for effects of an input offset voltage or an input bias current or both. Adjustments to the dual compensation impedance can be made based on calibration data for various environmental conditions so that the dual compensation impedance can be either pre-set for anticipated conditions in different target operational environments, or automatically adjusted in-situ. Target operational environments that may benefit from such a dual compensation impedance include remote areas that experience extreme or variable temperatures, high altitudes, space, or high radiation environments.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: October 21, 2014
    Assignee: Crane Electronics, Inc.
    Inventors: Cuon Lam, Jay Kuehny, David Perchlik
  • Patent number: 8860093
    Abstract: A technology which allows a reduction in the thermal resistance of a semiconductor device used in a radio communication device, and the miniaturization thereof is provided. For example, the semiconductor device can include a plurality of unit transistors Q, transistor formation regions 3a, 3b, and 3e each having a first number (e.g., seven) of the unit transistors Q, and transistor formation regions 3c and 3d each having a second number (e.g., four) of the unit transistors Q. The transistor formation regions 3c and 3d are located between the transistor formation regions 3a, 3b, 3e, and 3f, and the first number is larger than the second number.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: October 14, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi Sasaki, Yasunari Umemoto, Yasuo Osone, Tsutomu Kobori, Chushiro Kusano, Isao Ohbu, Kenji Sasaki
  • Patent number: 8847686
    Abstract: A radio frequency (RF) power amplifier is disclosed. The RF radio power amplifier includes a bias current generating unit, a first impedance unit, a second impedance unit, a third impedance unit and an output stage unit. The bias current generating unit receives a reference voltage. There is a first voltage with negative temperature coefficient between the first impedance unit and the second impedance unit, and the second unit receives a ground current. There is a second voltage between the third impedance unit and the second impedance unit, and the second voltage is a partial voltage of the first voltage. The bias current generating unit outputs a bias current with positive temperature coefficient according to the second voltage. The output stage unit receives an input current. The bias current is a sum of the input current with positive temperature coefficient and the ground current.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: September 30, 2014
    Assignees: Universal Scientific Industrial (Shanghai) Co., Ltd., Universal Global Scientific Industrial Co., Ltd.
    Inventors: Jaw-Ming Ding, Sung-Mao Li, Wei-Hsuan Lee
  • Publication number: 20140253243
    Abstract: A power amplifying module includes a radio frequency amplifying circuit including an amplifying circuit configured to amplify an input signal and output an amplified signal, and a bias circuit of an emitter-follower type configured to bias the amplifying circuit to an operating point, and a constant voltage generating circuit configured to generate, from a first reference voltage, a first constant voltage applied to a base side of a transistor of the bias circuit and a second constant voltage applied to a collector side of the transistor.
    Type: Application
    Filed: March 4, 2014
    Publication date: September 11, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Hiroshi HAGISAWA, Satoshi SAKURAI
  • Patent number: 8823456
    Abstract: A system including a power amplifier having a first gain, a preamplifier having a second gain, a first temperature sensor configured to sense the temperature of the power amplifier, and a bias generator. The first gain is a function of a temperature of the power amplifier. The preamplifier receives an input signal, amplifies the input signal according to the second gain, and outputs an amplified signal to the power amplifier. The bias generator generates a biasing signal to bias the preamplifier and adjusts the second gain of the preamplifier by adjusting the biasing signal based on the temperature of the power amplifier and an ambient temperature. The adjusted second gain of the preamplifier compensates a change in the first gain of the power amplifier due to a change in the temperature of the power amplifier.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: September 2, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: David M. Signoff, Wayne A. Loeb, Ming He
  • Publication number: 20140197891
    Abstract: A temperature control system having: a resistor formed in a region of a semiconductor, such resistor having a pair of spaced electrodes in ohmic contact with the semiconductor; at least one device formed in another region of the semiconductor thermally proximate the resistor formed region, such device generating heat in the semiconductor; and circuitry, including a reference connected to one of the pair of electrodes, for operating the resistor in saturation and for sensing variation in the resistor in response to the heat generated by the device and for controlling the heat generated by the device in the semiconductor in response to the sensed variation.
    Type: Application
    Filed: January 17, 2013
    Publication date: July 17, 2014
    Applicant: Raytheon Company
    Inventors: Jon Mooney, Bryan G. Fast, David D. Heston
  • Patent number: 8742850
    Abstract: Circuits, architectures, a system and methods for providing on-chip gain calibration. The circuit generally includes a receiver comprising (i) a resistor on a semiconductor substrate, the resistor configured to provide a signal having a noise component that varies with temperature, and (ii) an amplifier circuit on the semiconductor substrate coupled to the resistor, the amplifier circuit configured to receive the signal and provide a second signal having an amplitude greater than the first signal. The architectures and/or systems generally include those that embody one or more of the inventive concepts disclosed herein. The method generally includes (i) providing a noise signal from a resistor to an amplifier, the resistor being on a common semiconductor substrate with the amplifier, (ii) determining a resistance value of the resistor, (iii) determining an impedance at an input of the amplifier, and (iv) determining a gain of the amplifier.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: June 3, 2014
    Assignee: Marvell International Ltd.
    Inventors: Neric Fong, Sang Won Son
  • Publication number: 20140139291
    Abstract: There is provided a power amplifier including a bias circuit unit generating a bias voltage of an amplifying unit, a voltage drop unit disposed between the bias circuit unit and the amplifying unit to drop the bias voltage to a base voltage, and a bypass circuit unit including an impedance element connected to the voltage drop unit in parallel and performing a switching operation according to a magnitude of an input signal.
    Type: Application
    Filed: February 11, 2013
    Publication date: May 22, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jun Goo WON, Youn Suk KIM, Young Jean SONG, Ki Joong KIM, Myeong Woo HAN, Shinichi IIZUKA, Ju Young PARK
  • Patent number: 8692619
    Abstract: Provided is a compact high frequency power amplifier having a high degree of freedom of design with respect to a gain fluctuation immediately after start-up of an amplifier. The high frequency power amplifier includes a speed-up circuit that transiently increases a reference voltage during rise of a control voltage to increase an amount of bias supplied to an amplification transistor from a bias circuit. The speed-up circuit includes a capacitor and an overshoot control circuit. The overshoot control circuit determines an increasing amount of the reference voltage when the reference voltage is transiently increased according to a charge amount charged in the capacitor, and the overshoot control circuit also determines a time constant in charging and discharging the capacitor.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: April 8, 2014
    Assignee: Panasonic Corporation
    Inventors: Kazuya Wakita, Haruhiko Koizumi, Shingo Enomoto, Hiroaki Kawano
  • Publication number: 20140062600
    Abstract: A temperature compensation circuit is adapted to be used in an electronic device including a processing circuit. The temperature compensation circuit includes a thermistor, a compensation capacitor and a compensation diode. The thermistor has two ends, one of which is adapted to be electrically connected to the processing circuit. The compensation capacitor has two ends, one of which is electrically connected to the other one of the two ends of the thermistor. The compensation diode has an anode electrically connected to the other one of the two ends of the compensation capacitor, and a cathode to be grounded. The impedance of the thermistor varies with temperature so as to compensate and stabilize an output of the electronic device.
    Type: Application
    Filed: May 8, 2013
    Publication date: March 6, 2014
    Applicant: Wistron Corporation
    Inventor: Po Wen Hsueh
  • Patent number: 8665015
    Abstract: A power amplifier circuit, comprising: an input for receiving an input signal to be amplified; a power supply; an amplifier, coupled to the input and the power supply; and a cascode device coupled between the power supply and the amplifier. The circuit is characterized by: a first current source coupled between the input and the amplifier, configured to provide a biasing current which is proportional to absolute temperature; and a second current source for controlling the cascode device, configured to provide a current which is complementary to absolute temperature (CTAT).
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: March 4, 2014
    Assignee: Cambridge Silicon Radio Limited
    Inventor: Konstantinos Manetakis
  • Patent number: 8659358
    Abstract: An amplifier includes a detector configured to detect a given value used for monitoring a change in a gain of an amplifying element amplifying a signal in response to a gate voltage applied to a gate terminal, and a controller configured to judge, based on the detected given value, whether or not the gate voltage is to be increased, and to determine the increased gate voltage in response to the given value when the controller judges that the gate voltage is to be increased.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: February 25, 2014
    Assignee: Fujitsu Limited
    Inventors: Keiji Masuda, Takumi Takayashiki
  • Patent number: 8629783
    Abstract: In a telemetry system for use in an engine, a circuit structure (34) affixed to a moving part (20) of the engine is disposed for amplifying information sensed about a condition of the part and transmitting the sensed information to a receiver external to the engine. The circuit structure is adapted for the high temperature environment of the engine and includes a differential amplifier (102, 111) having an input for receiving a signal from a sensor (101, 110) disposed on the part. A voltage controlled oscillator (104, 115) with an input coupled to the output of the amplifier produces an oscillatory signal having a frequency representative of the sensed condition. A buffer (105, 116) with an input coupled to the output of the oscillator buffers the oscillatory signal, which is then coupled to an antenna (26) for transmitting the information to the receiver.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: January 14, 2014
    Assignees: Siemens Energy, Inc., Arkansas Power Electronics International, Inc.
    Inventors: David J. Mitchell, Anand A. Kulkarni, Ramesh Subramanian, Edward R. Roesch, Rod Waits, Roberto Schupbach, John R. Fraley, Alexander B. Lostetter, Brice McPherson, Bryon Western
  • Patent number: 8593224
    Abstract: An improved regulator circuit, temperature compensation bias circuit, and amplifier circuit are disclosed.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: November 26, 2013
    Assignees: EpicCom, Inc., Epic Communications, Inc.
    Inventors: Cindy Yuen, Duc Chu, Kirk Laursen
  • Publication number: 20130307626
    Abstract: Illustrative embodiments of power amplifiers and associated methods are disclosed. In at least one embodiment, a method may include fabricating a power amplifier in a first silicon layer of a silicon-on-insulator (SOI) substrate, wherein the SOI substrate comprises the first silicon layer, a second silicon layer, and a buried oxide layer disposed between the first and second silicon layers; removing at least some of the second silicon layer from the SOI substrate, after fabricating the power amplifier; and securing the SOI substrate, after removing at least some of the second silicon layer, to an electrically non-conductive and thermally conductive substrate.
    Type: Application
    Filed: March 12, 2013
    Publication date: November 21, 2013
    Inventor: Purdue Research Foundation
  • Patent number: 8581664
    Abstract: A pulse electric power amplification apparatus includes first, second, final-stage and drive amplification devices. In initial stage, the first device in upstream, having a predetermined thermal time constant, receives a high frequency signal while the second device in downstream, having a different thermal time constant, is cascade-connected to it. In final stage, the drive device drives the final-stage device in downstream, which is cascade-connected to the second device. The apparatus further includes a power supply switching circuit, first and second differentiating circuits. The first and second differentiating circuits, having time constants corresponding to thermal time constants of the first and second devices, respectively, receive a pulse signal with which the high frequency signal is modulated.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: November 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Haruo Kojima
  • Patent number: 8565669
    Abstract: An integrated circuit for achieving power reduction in a transceiver may include a jammer detector that determines an interference level corresponding to a received signal, and a transmit power detector that determines a required transmit power level for a transmitted signal. The integrated circuit may also include at least one of the following: a process monitor that determines process corners of components within the receiver and/or the transmitter, and a temperature monitor that determines a temperature of the receiver and/or the transmitter. The integrated circuit may also include a state machine. The state machine may transition the receiver from a high linearity mode to a low linearity mode if a set of operating conditions is satisfied. Similarly, the state machine may transition the transmitter from a high power mode to a low power mode if a set of operating conditions is satisfied.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: October 22, 2013
    Assignee: QUALCOMM, Incorporated
    Inventors: Prasad S Gudem, Steven C Ciccarelli, Ken Tsz Kin Mok, Sai C. Kwok
  • Patent number: 8559898
    Abstract: A radio frequency (RF) power amplifier (PA) amplifying transistor of an RF PA stage and an RF PA temperature compensating bias transistor of the RF PA stage are disclosed. The RF PA amplifying transistor includes a first array of amplifying transistor elements and a second array of amplifying transistor elements. The RF PA temperature compensating bias transistor provides temperature compensation of bias of the RF PA amplifying transistor. Further, the RF PA temperature compensating bias transistor is located between the first array and the second array. As such, the RF PA temperature compensating bias transistor is thermally coupled to the first array and the second array. The RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using the RF PA amplifying transistor.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: October 15, 2013
    Assignee: RF Micro Devices, Inc.
    Inventors: David E. Jones, Chris Levesque, William David Southcombe, Scott Yoder, Terry J. Stockert