Including Temperature Compensation Means Patents (Class 330/289)
  • Patent number: 11329677
    Abstract: A wireless wake-up receiver includes multiple signal chains each signal chain being coupled to continuously receive a signal from a respective antenna and to provide a respective detected pattern at a signal chain output. Each signal chain includes a first path having a mixer-first architecture and operates in a bandpass-mode using differential signals. The wireless wake-up receiver also includes a digital correlator operable to receive the respective detected patterns and to determine whether one of the respective detected patterns is equal to a desired pattern.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: May 10, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sudipto Chakraborty, Jens Graul, Ram Pratap Aditham
  • Patent number: 11296655
    Abstract: An apparatus includes an amplifier and a bias network. The amplifier generally has a predefined linear range. The bias network is generally connected to an input of the amplifier. The bias network generally comprises a linearizer configured to provide gain expansion and extend linearity of the amplifier beyond the predefined linear range.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: April 5, 2022
    Assignee: Renesas Electronics America Inc.
    Inventors: Hojung Ju, Roberto Aparicio Joo, John Zhao, Jason May
  • Patent number: 11277102
    Abstract: A power amplifier module includes a power amplifier including an amplifier including an amplifying transistor configured to amplify an input signal, and output an output signal, and a bias circuit including a bias transistor configured to provide a bias current to the amplifying transistor; and a controller configured to provide a control current to the bias transistor, wherein the controller is configured to vary the control current based on a temperature of the amplifying transistor.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: March 15, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Su Yeon Han
  • Patent number: 11264954
    Abstract: Thermal temperature sensors for power amplifiers are provided herein. In certain implementations, a semiconductor die includes a compound semiconductor substrate, and a power amplifier including a plurality of field-effect transistors (FETs) configured to amplify a radio frequency (RF) signal. The plurality of FETs are arranged on the compound semiconductor substrate as a transistor array. The semiconductor die further includes a semiconductor resistor configured to generate a signal indicative of a temperature of the transistor array. The semiconductor resistor is located adjacent to one end of the transistor array.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: March 1, 2022
    Assignee: Analog Devices, Inc.
    Inventor: Keith E. Benson
  • Patent number: 11177777
    Abstract: Provided is a temperature detection circuit that includes: a series connection circuit that is connected between a power supply voltage input terminal and ground and includes a temperature detection transistor and a first resistance element; and a current bypass circuit that includes a first transistor that is connected in parallel with the temperature detection element and allows a bypass current to flow therethrough. The temperature detection circuit outputs a temperature detection signal from a connection point between the temperature detection transistor and the first resistance element.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: November 16, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hideyo Yamashiro
  • Patent number: 11165400
    Abstract: An embodiment electronic device comprises at least two antennas for transmitting signals, and at least one transmission path, the transmission path including a first coupling stage including a power divider, variable-gain power amplifiers, and a second coupling stage including a power combiner. Each coupling stage includes two inputs and two outputs, the two inputs of the first coupling stage being configured to receive a power input signal. Each output of the first coupling stage is connected to a different input of the second coupling stage via the variable-gain power amplifiers, and each output of the second coupling stage is connected to a different antenna. A controller is configured to control the gains of the variable-gain power amplifiers according to the characteristics of the power input signal, the signals transmitted by the antennas, and the coupling stages.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: November 2, 2021
    Assignee: STMICROELECTRONICS SA
    Inventors: Jeremie Forest, Vincent Knopik
  • Patent number: 11158612
    Abstract: An electronic device comprises at least one sub matrix unit, a driving circuit board, and at least one surface mount device. The sub matrix unit comprises a substrate, thin-film circuits and first connecting pads. The thin-film circuits and the first connecting pads are disposed on the operation face of the substrate. The sub matrix unit defines a loading face and comprises second connecting pads, at least one first conductive line, and at least one second conductive line all together arranged on the loading face. A second height defined between a top of the surface mount device and the loading face of the driving circuit board is no less than a first height defined between an uppermost face of the sub matrix unit and the loading face of the driving circuit board.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: October 26, 2021
    Assignee: GIO OPTOELECTRONICS CORP.
    Inventor: Chin-Tang Li
  • Patent number: 11121679
    Abstract: An amplifying apparatus is provided. The amplifying apparatus comprises an amplifying circuit comprising a power amplifier and a bias circuit, the bias circuit is configured to detect an ambient temperature of the power amplifier to output a temperature voltage and regulate an internal current based on an input control signal to supply a bias current obtained by the regulation to the power amplifier; and a temperature control circuit that generates the control signal based on the temperature voltage during initial driving from a transmission mode starting point in time to an input point in time at which an input signal is input and outputting the control signal to the amplifying circuit.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: September 14, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Young Wong Jang, Byeong Hak Jo, Jeong Hoon Kim, Jong Ok Ha, Hyun Paek, Shinichi Iizuka
  • Patent number: 11070175
    Abstract: A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: July 20, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 10990117
    Abstract: Certain aspects of the present disclosure provide a low drop-out (LDO) regulator. The LDO regulator generally includes a first p-type metal-oxide-semiconductor transistor (PMOS) having a drain coupled to an output node of the LDO regulator, a first amplifier having an input coupled to a reference voltage node and an output coupled to a gate of the first PMOS transistor, a second PMOS transistor having a source coupled to the output node, and a second amplifier having an input coupled to the output node and an output coupled to a gate of the second PMOS transistor.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: April 27, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Yue Chao, Marco Zanuso, Rajagopalan Rangarajan, Yiwu Tang
  • Patent number: 10939592
    Abstract: A liquid cooling system is described. The liquid cooling system includes a heat sink to provide a warmed liquid. The heat sink is to receive heat generated by at least one semiconductor chip of an electronic system. The liquid cooling system includes a heat exchanger to receive the warmed liquid and to provide a cooled liquid. The liquid cooling system includes a pump. The pump is to draw the cooled liquid at the pump's input so that respective pressures of the warmed and cooled liquids' are less than atmospheric pressure.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Javier Avalos Garcia, Michael Berktold, Luz Karine Sandoval Granados, Adriana Lopez Iniguez
  • Patent number: 10892725
    Abstract: A signal amplifier is distributed between first and second IC devices and includes a low-power input stage disposed within the first IC device, a bias-current source disposed within the second IC device and an output stage disposed within the second IC device. The output stage includes a resistance disposed within the second IC device and having a first terminal coupled to a drain terminal of a transistor within the input stage via a first signaling line that extends between the first and second IC devices.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: January 12, 2021
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Carl W. Werner, John Eric Linstadt
  • Patent number: 10892787
    Abstract: A transmitter for transmitting a signal is provided, in which the transmitter includes a power amplifier and a driver amplifier, an output of the driver amplifier being connected to an input of the power amplifier via a first load modulation device operable to match the impedance of the driver amplifier output with impedance of the power amplifier input. A second load modulation device can be connected to the output of the power amplifier and operable to match the impedance of the power amplifier output with input impedance of a further device. Envelope tracking can be applied to the power amplifier and the driving amplifier.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: January 12, 2021
    Assignee: Airbus Defence and Space Limited
    Inventor: Ahmed Abouelenin
  • Patent number: 10873307
    Abstract: A power amplifier circuit includes a first transistor amplifying a first signal; a second transistor amplifying a second signal; a bias circuit supplying a bias current or voltage to a base or gate of the second transistor; and an attenuator attenuating the first or second signal in accordance with a control voltage supplied from the bias circuit. The attenuator includes a first diode to which the control voltage is supplied, a third transistor including a collector connected to a supply path of the first or second signal, an emitter connected to a ground, and a base to which the control voltage is supplied from the first diode, and a capacitor connected in parallel with the first diode. The control voltage decreases as a second signal power level increases. The third transistor allows part of the first or second signal to pass to the emitter in accordance with the control voltage.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: December 22, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Satoshi Tanaka, Yasuhisa Yamamoto, Takayuki Tsutsui, Isao Obu
  • Patent number: 10873308
    Abstract: Temperature compensation circuits and methods for adjusting one or more circuit parameters of a power amplifier (PA) to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the PA. Some embodiments compensate for PA Gain “droop” due to self-heating using a Sample and Hold (S&H) circuit. The S&H circuit samples and holds an initial temperature of the PA at commencement of a pulse. Thereafter, the S&H circuit generates a continuous measurement that corresponds to the temperature of the PA during the remainder of the pulse. A Gain Control signal is generated that is a function of the difference between the initial temperature and the operating temperature of the PA as the PA self-heats for the duration of the pulse. The Gain Control signal is applied to one or more adjustable or tunable circuits within a PA to offset the Gain droop of the PA.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: December 22, 2020
    Assignee: pSemi Corporation
    Inventors: Tero Tapio Ranta, Keith Bargroff, Christopher C. Murphy, Robert Mark Englekirk
  • Patent number: 10868501
    Abstract: A wireless receiver and a wireless reception method provide: to determine a gain based on a first resistor having a first temperature characteristic and a second resistor having a second temperature characteristic different from the first resistance; to output an output of the first resistor and an output of the second resistor, or a ratio between the output of the first resistor and the output of the second resistor; and to switches the gain of the first circuit based on the outputs or the ratio between the outputs.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: December 15, 2020
    Assignee: DENSO CORPORATION
    Inventors: Takashi Matsumoto, Yusuke Wachi, Koji Maeda
  • Patent number: 10819286
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: October 27, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
  • Patent number: 10790788
    Abstract: Solder bumps are placed in direct contact with the silicon substrate of an amplifier integrated circuit having a flip chip configuration. A plurality of amplifier transistor arrays generate waste heat that promotes thermal run away of the amplifier if not directed out of the integrated circuit. The waste heat flows through the thermally conductive silicon substrate and out the solder bump to a heat-sinking plane of an interposer connected to the amplifier integrated circuit via the solder bumps.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: September 29, 2020
    Assignee: Skyworks Solutions, Inc.
    Inventors: Michael Joseph McPartlin, Bharatjeet Singh Gill, Stephen Joseph Kovacic
  • Patent number: 10715093
    Abstract: A power amplifier module includes a first transistor that amplifies and outputs a radio frequency signal, a second transistor smaller in size than the first transistor and connected in parallel with the first transistor, a third transistor that supplies a bias current to the first and second transistors, a current detection circuit that detects a current flowing through a collector of the second transistor, and a bias control circuit that controls the bias current supplied from the third transistor to the first and second transistors by supplying a current corresponding to a detection result of the current detection circuit to a collector or a drain of the third transistor. In a case that a current flowing through the collector of the second transistor is larger than a predetermined threshold value, the bias control circuit reduces the current supplied to the collector or the drain of the third transistor.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: July 14, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Fuminori Morisawa, Kenji Mukai, Yuri Honda
  • Patent number: 10700649
    Abstract: A system and method for using an embedded microprocessor in an RF amplifier. The use of an embedded microprocessor avoids manual calibration. The Microprocessor collects initial amplifier performance data based on a set of parameters and calculates the needed corrections. The microprocessor can change levels within the circuit to achieve those operating points. The embedded microprocessor sets voltage levels with internal circuitry and communicates this information externally through a serial communication port, or the like, to allow a user to communicate with and look at the amplifier data and readjust the internal bias levels, as needed. Thus, the internal microprocessor provides for calibration, self-testing, and monitoring of the RF amplifier and also functions as an in situ bias and temperature compensation controller for use in the presence of temperature variation and provides bias sequencing control to protect against improper applied timing of voltage inputs to the amplifier.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: June 30, 2020
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Frank A. Mannarino, Robert Actis, Robert C. Marion, John R. Muir, Steven Rajkowski, Eldon M. Sutphin
  • Patent number: 10680565
    Abstract: A power amplifier system is disclosed. The power amplifier system includes a power amplifier having a first signal input and a first signal output and a main bias circuitry configured to provide a first portion of a first bias signal to the power amplifier through a first bias output coupled to the first signal input. Further included is peak bias circuitry that is configured to provide a second portion of the first bias signal to the power amplifier through a second bias output coupled to the first signal input, wherein the first portion of the first bias signal is greater than the second portion of the first bias signal over a first input power range and the second portion of the first bias signal is greater than the first portion of the first bias signal over a second input power range that is greater than the first input power range.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: June 9, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, Hideya Oshima, George Maxim, Dirk Robert Walter Leipold
  • Patent number: 10615185
    Abstract: A display apparatus and manufacturing method thereof are disclosed. The manufacturing method comprises: providing at least one sub-matrix unit, wherein each thin-film circuit comprises at least one thin-film transistor and at least one conductive line, the thin-film transistor is electrically connected with the conductive line, and the first connecting pads are electrically connected with the thin-film transistor through the conductive line; disposing the sub-matrix unit on a driving circuit board, wherein the second connecting pads are disposed facing to the first connecting pads and correspondingly connected to the first connecting pads, respectively, and the scan line and the data line are electrically connected with the corresponding first connecting pads through the second connecting pads; and disposing at least one surface mount device on the driving circuit board, wherein the surface mount device is electrically connected with the corresponding first connecting pads through the second connecting pads.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: April 7, 2020
    Assignee: GIO OPTOELECTRONICS CORP.
    Inventor: Chin-Tang Li
  • Patent number: 10554182
    Abstract: A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: February 4, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 10439563
    Abstract: Temperature compensation circuits and methods for adjusting one or more circuit parameters of a power amplifier (PA) to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the PA. Some embodiments compensate for PA Gain “droop” due to self-heating using a Sample and Hold (S&H) circuit. Other embodiments include bias compensation circuits that directly regulate a bias signal to an amplifier stage as a function of localized heating of one or more of amplifier stages. Such bias compensation circuits include physical placement of at least one bias compensation circuit element in closer proximity to at least one amplifier stage than other bias compensation circuit elements. One bias compensation circuit embodiment includes a temperature-sensitive current mirror circuit for regulating the bias signal.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: October 8, 2019
    Assignee: pSemi Corporation
    Inventors: Tsuyoshi Takagi, Tero Tapio Ranta, Keith Bargroff, Christopher C. Murphy, Robert Mark Englekirk
  • Patent number: 10171036
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: January 1, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
  • Patent number: 10135403
    Abstract: A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: November 20, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 10128797
    Abstract: A power amplifier circuit includes a first amplifier transistor and a bias circuit. The first amplifier transistor amplifies a first signal and outputs a second signal. The bias circuit supplies a bias voltage or a bias current to the first amplifier transistor. The first amplifier transistor includes plural unit transistors disposed in a substantially rectangular region. The bias circuit includes first and second bias transistors and first and second voltage supply circuits. The first and second bias transistors respectively supply first and second bias voltages or first and second bias currents to the bases of unit transistors of first and second groups. The first and second voltage supply circuits respectively supply first and second voltages to the bases of the first and second bias transistors. The first and second voltages are decreased in accordance with a temperature increase. The second voltage supply circuit is disposed within the substantially rectangular region.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: November 13, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kenji Sasaki
  • Patent number: 10027287
    Abstract: The present disclosure relates to a World Band Radio Frequency Power Amplifier and a World Band Radio Frequency Front End Module. The World Band Power Amplifier can contain at least one broadband power amplifier connected to a switch which can direct an RF input signal to a plurality of transmission paths, each transmission path configured for a different frequency. The World Band RFFE Module is more integrated version of the World Band Power Amplifier that can contain broadband RF PA(s), switches, logic controls, filters, duplexers and other active and passive components. The module may also include a thermal protection system capable of effecting operation of the broadband power amplifier.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: July 17, 2018
    Assignee: MICRO MOBIO CORPORATION
    Inventors: Ikuroh Ichitsubo, Shinsuke Inui, Guan-Wu Wang, Weiping Wang, Zlatko Filipovic
  • Patent number: 10003309
    Abstract: A method and system for adaptive self-biasing of a power amplifier are disclosed. A current (Ids) at an output of the power amplifier is measured, the current being a sum of a quiescent current (Idq) and a current arising from an RF signal applied to an input of the power amplifier. An output signal power (Pout) of the power amplifier is measured. A target value of Ids corresponding to the measured value of Pout is either calculated or obtained from a look-up table. The measured current Ids is compared to the target value of Ids to determine an error value. An input biasing voltage (Vgs) of the power amplifier is adjusted based on the error value to achieve a measured value of Ids that is equal to the target value of Ids corresponding to the measured value of Pout.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: June 19, 2018
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventor: Jadran Lokas
  • Patent number: 9917563
    Abstract: Apparatus and methods for biasing of power amplifiers are disclosed. In one embodiment, a mobile device includes a transceiver that generates a radio frequency signal and a power amplifier enable signal, a power amplifier that provides amplification to the radio frequency signal and that is biased by a bias signal, and a bias circuit that receives the power amplifier enable signal and generates the bias signal. The bias circuit includes a gain correction circuit that generates a correction current in response to activation of the power amplifier enable signal, and a primary biasing circuit that generates the bias signal based on the correction current and the power amplifier enable signal.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: March 13, 2018
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Ping Li, Paul T. DiCarlo
  • Patent number: 9912300
    Abstract: Provided is a bias control circuit that includes: a reference voltage circuit that generates a reference voltage; a resistor; a temperature dependent current generating circuit that generates a temperature dependent current, which changes depending on temperature, on the basis of the reference voltage and that supplies the temperature dependent current to one end of the resistor; a reference voltage buffer circuit that applies the reference voltage to the other end of the resistor; a constant current generating circuit that generates a constant current, which is for driving the reference voltage buffer circuit, on the basis of the reference voltage and that supplies the constant current to the other end of the resistor; and a bias generating circuit that generates a bias voltage or a bias current for a power amplification circuit on the basis of the voltage at the one end of the resistor.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: March 6, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoshiaki Harasawa, Fuminori Morisawa
  • Patent number: 9702928
    Abstract: Failure in a self-healing array may be handled by: detecting a failing element of the self-healing array by monitoring characteristics of the failing element; auto-correcting a failing element of the self-healing array by adjusting characteristics of the failing element to compensate for a portion of the failing element which is failing; or correcting performance of the self-healing array when one or more elements of the self-healing array fail by detecting and modeling an impact of the one or more elements of the self-healing array which failed on the performance of the self-healing array.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: July 11, 2017
    Assignee: THE BOEING COMPANY
    Inventors: Gavin D. Holland, David L. Allen
  • Patent number: 9629212
    Abstract: A control unit for a LED assembly includes a first and second LED unit, the LED units being serial connected. The LED assembly, in use, is powered by a switched mode power supply. The control unit being arranged to receive an input signal representing a desired output characteristic of the LED assembly, determine a first and second duty cycle for respective LED units associated with a nominal current of the switched mode power supply, for providing the desired output characteristic, determine the largest of the first and second duty cycles for respective LED units, determine a reduced current based on at least the largest of the duty cycles, adjust the first and second duty cycle for respective LED units based on the reduced current, and provide an output signal for the LED assembly and the switched mode power supply based on the adjusted first and second duty cycles and the reduced current for obtaining the desired characteristic.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: April 18, 2017
    Assignee: ELDOLAB HOLDING B.V.
    Inventors: Marc Saes, Petrus Johannes Maria Welten
  • Patent number: 9584078
    Abstract: Apparatus and methods for radio frequency (RF) amplifiers are disclosed herein. In certain implementations, a packaged RF amplifier includes a first bipolar transistor including a base electrically connected to an RF input pin and a collector electrically connected to an RF output pin, and a second bipolar transistor including a base electrically connected to an emitter of the first bipolar transistor and a collector electrically connected to the RF output pin. The packaged RF amplifier further includes a first bias circuit electrically connected between the base of the first bipolar transistor and the RF output pin, a second bias circuit electrically connected between the base of the first bipolar transistor and a power low pin, an inductor implemented at least partly by a bond wire, and a third bias circuit electrically connected in series with the inductor between the base of the second bipolar transistor and the power low pin.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: February 28, 2017
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Alan William Ake, David C. Dening
  • Patent number: 9548711
    Abstract: A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: January 17, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 9503036
    Abstract: A power amplifier having a stack structure, including: a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal; a second driver stage that has a power input terminal connected with a ground terminal of the first driver stage and receiving a virtual power voltage and an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; and a power stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the second driver stage, and receives and amplifies an output signal from the second driver stage.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: November 22, 2016
    Assignee: SOONGSIL UNIVERSITY RESEARCH CONSORTIUM TECHNO-PARK
    Inventors: Ho Yong Hwang, Chang Kun Park
  • Patent number: 9480160
    Abstract: There is disclosed a supply feed network for an envelope tracking power amplifier arrangement comprising a power amplifier and a voltage modulator for providing a supply voltage to the power amplifier, the supply feed network comprising: a power distribution plane arranged to connect the supply voltage from the voltage modulator to the power amplifier.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: October 25, 2016
    Assignee: QUALCOMM Incorporated
    Inventor: Gerard Wimpenny
  • Patent number: 9419567
    Abstract: The present disclosure relates to a system for biasing a power amplifier. The system can include a first die that includes a power amplifier circuit and a passive component having an electrical property that depends on one or more conditions of the first die. Further, the system can include a second die including a bias signal generating circuit that is configured to generate a bias signal based at least in part on measurement of the electrical property of the passive component of the first die.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: August 16, 2016
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: David Steven Ripley, Philip John Lehtola, Peter J. Zampardi, Jr., Hongxiao Shao, Tin Myint Ko, Matthew Thomas Ozalas
  • Patent number: 9354644
    Abstract: Practical electronics such as amplifiers or voltage references can have circuit imbalances due to manufacturing imperfections. For example, amplifiers can have an undesirable offset voltage. The offset voltage might also drift with temperature making the design of these devices difficult. Disclosed are techniques which decrease the amount of offset voltage which provide predictability of device parameters over a range of temperatures.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: May 31, 2016
    Assignee: ANALOG DEVICES, INC.
    Inventors: Yogesh Jayaraman Sharma, Nathan R. Carter
  • Patent number: 9154090
    Abstract: Devices and methods for correcting for start-up transients in integrated power amplifiers are disclosed. A delay element is arranged to produce a delay waveform signal that is responsive to an input voltage signal. A transconductance element has an input that receives the delay waveform signal and is arranged to provide an output boost current that is based on the delay waveform signal and a gain of the transconductance element. A reference element provides an output bias current that is responsive to a static reference current and the boost current. A bias element has an input that receives the bias current and is arranged to provide a bias control output. A power amplifier is responsive to the bias control output and is arranged to provide an amplified power output.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: October 6, 2015
    Assignee: MICROSEMI CORPORATION
    Inventor: Kyle Hershberger
  • Patent number: 9121741
    Abstract: In an electromagnetic flow meter, a signal amplifying circuit has an FET-input type differential amplifier wherein one input terminal is connected to a flow rate signal input terminal and the other input terminal is connected to a flow rate signal input terminal. An amplified output signal, which is obtained through performing differential amplification on the flow rate signals, is outputted from an output terminal. A fault detecting circuit detects a fault in the flow rate signal through comparing the electropotential of the amplified output signal to an upper limit reference electropotential and a lower limit reference electropotential.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: September 1, 2015
    Assignee: AZBIL CORPORATION
    Inventors: Osamu Momose, Youhei Sakano
  • Patent number: 9065389
    Abstract: A radio frequency (RF) power amplifier with no reference voltage for biasing is disclosed. The RF power amplifier includes a three-terminal current source circuit, a current mirror circuit and an output-stage circuit. The three-terminal current source circuit receives a first system voltage and accordingly outputs a first current and a second current, and a source voltage exists between a first output terminal of the first current and a second output terminal of the second current. The current mirror circuit receives the first current and the second current and accordingly generates a bias current. The output-stage circuit receives the bias current so as to work at an operation point.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: June 23, 2015
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING INC.
    Inventors: Jaw-Ming Ding, Hsin Chin Chang
  • Patent number: 9035701
    Abstract: This disclosure relates generally to radio frequency (RF) amplification devices and methods of limiting an RF signal current. Embodiments of the RF amplification device include an RF amplification circuit and a feedback circuit. The RF amplification circuit is configured to amplify an RF input signal so as to generate an amplified RF signal that provides an RF signal current with a current magnitude. The feedback circuit is used to limit the RF signal current. In particular, a thermal sense element in the feedback circuit is configured to generate a sense current, and thermal conduction from the RF amplification circuit sets a sense current level of the sense current as being indicative of the current magnitude of the RF signal current. To limit the RF signal current, the feedback circuit decreases the current magnitude of the RF signal current in response to the sense current level reaching a trigger current level.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: May 19, 2015
    Assignee: RF Micro Devices, Inc.
    Inventors: Derek Schooley, Robert Bennett, James Leake, Pradeep Silva
  • Patent number: 9013238
    Abstract: A radio frequency (RF) amplifier is disclosed. The RF power amplifier includes a bias circuit, an output-stage circuit and a RF compensation circuit. When a first system voltage is larger than a first voltage threshold value, the bias circuit generates a first current rising slightly. When first system voltage is larger than second voltage threshold value, the RF compensation circuit receives a second circuit rising slightly transmitted from the bias circuit. When the first system voltage is in an operation voltage range, the first current is larger than the second circuit so as to a quiescent operating current of the RF power amplifier is independent of change of the first system voltage. When the first system voltage is larger than a third voltage threshold value, the first current is equal to the second current so as to have the bias current being a zero current to protect the RF power amplifier from over-voltage.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: April 21, 2015
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Jaw-Ming Ding, Jia-Hong Mou, Hsin-Chin Chang
  • Patent number: 8994453
    Abstract: There is provided a power amplifier including a bias circuit unit generating a bias voltage of an amplifying unit, a voltage drop unit disposed between the bias circuit unit and the amplifying unit to drop the bias voltage to a base voltage, and a bypass circuit unit including an impedance element connected to the voltage drop unit in parallel and performing a switching operation according to a magnitude of an input signal.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: March 31, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Goo Won, Youn Suk Kim, Young Jean Song, Ki Joong Kim, Myeong Woo Han, Shinichi Iizuka, Ju Young Park
  • Patent number: 8981849
    Abstract: There are provided a bias circuit and a power amplifier with a dual-power mode. The bias circuit includes a regulated voltage generation unit generating a regulated voltage by using a reference voltage, a bias voltage generation unit generating a bias voltage according to the regulated voltage, and a power mode control unit operating in any one of a high power mode and a low power mode according to a power mode voltage and dropping the regulated voltage in the low power mode.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: March 17, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Young Jean Song
  • Patent number: 8970516
    Abstract: This disclosure provides systems, methods and apparatus for combining devices deposited on a first substrate, with integrated circuits formed on a second substrate such as a semiconducting substrate or a glass substrate. The first substrate may be a glass substrate. The first substrate may include conductive vias. A power combiner circuit may be deposited on a first side of the first substrate. The power combiner circuit may include passive devices deposited on at least the first side of the first substrate. The integrated circuit may include a power amplifier circuit disposed on and configured for electrical connection with the power combiner circuit, to form a power amplification system. The conductive vias may include thermal vias configured for conducting heat from the power amplification system and/or interconnect vias configured for electrical connection between the power amplification system and a conductor on a second side of the first substrate.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: March 3, 2015
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Justin Phelps Black, Ravindra V. Shenoy, Evgeni Petrovich Gousev, Aristotele Hadjichristos, Thomas Andrew Myers, Jonghae Kim, Mario Francisco Velez, Je-Hsiung Jeffrey Lan, Chi Shun Lo
  • Publication number: 20150048888
    Abstract: An assembly structure of a power amplifier is provided. The assembly structure comprises at least two power amplifier modules, each power amplifier module comprises a heat-conducting board, an amplifier tube matching circuit board is assembled on the heat-conducting board; at least one radio frequency power amplifier tube is assembled on the amplifier tube matching circuit board, assembly directions of all the radio frequency power amplifier tubes are parallel to each other; the heat-conducting boards of adjacent two power amplifier modules are connected vertically along a transmission direction of the radio frequency signal. Comparing with the existing plane assembly technology, the application has a character of needing small assembly areas, which is adapted in an assembly environment with a certain height and small assembly areas.
    Type: Application
    Filed: April 6, 2012
    Publication date: February 19, 2015
    Applicant: Wuhan Gewei Electronic Technology Co., Ltd
    Inventor: Qingnan Meng
  • Patent number: 8933921
    Abstract: Disclosed are an adjustment method of an LCD (Liquid Crystal Display) overdrive voltage and the device. The adjustment method comprises steps below: locating a transistor at a position capable of sensing a temperature of an LCD panel; providing a constant current source to a drain of the transistor and a conducting voltage to the transistor, and a voltage difference between a source and a gate changing according to a temperature changing of the LCD panel; receiving voltages of the source and the gate of the transistor to calculate a voltage difference therebetween and outputting an amplified value of the voltage difference by an error amplifier; receiving the amplified value of the voltage difference and outputting corresponding binary signals by an analog to digital converter; providing a selector storing a plurality of overdrive voltages for selecting different overdrive voltages according to the different binary signals to adjust the LCD overdrive voltage.
    Type: Grant
    Filed: August 27, 2011
    Date of Patent: January 13, 2015
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Dengxia Zhao, Poshen Lin
  • Patent number: 8928404
    Abstract: A method and related systems for amplifier performance stabilization of a digitally predistorted RF power amplifier are disclosed. The characteristics of power amplifiers change as a function of temperature making adaptive digital predistortion highly problematic during initial application of an RF signal to a power amplifier. Embodiments disclose a method and systems in which the power amplifier is taken through a preparatory phase before the RF signal is applied to the power amplifier and the digital predistortion calculation starts. This is achieved by increasing the quiescent current of the power stages beyond nominal values for a rapid warm up and readjusting to its normal bias point when the radio frequency signal is applied and the digital predistortion is turned on.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: January 6, 2015
    Assignee: Intel Corporation
    Inventors: Ahmad Khanifar, Yatin Buch, George Sideris, Khurram Sheikh, Alexander Rabinovich