Abstract: Compensation for the current flowing in the collector resistance of a transistor is achieved by generating a compensating current of appropriate magnitude and polarity sense, and applying that compensating current to the base of the transistor. To this end, a voltage equivalent to that across the transistor emitter-collector path is applied across a current conductive device representative of the collector resistance. The current therethrough is then proportioned by a current amplifier and applied to the base of the transistor to be compensated.

Abstract: An operational amplifier of MOSFET elements is disclosed which provides for a variable drive for an output stage that results in lower power dissipation and increased gain factor over comparable circuits using constant bias drive for the output stage. A bias section comprised of complementary MOS elements is connected to a single MOSFET that furnishes constant current to the signal input section of a differential amplifier section. The output of this differential amplifier is furnished by one path directly to one complementary MOSFET element of a high impedance output stage and by another path to a level shift section which provides an output to a second complementary MOSFET element of the output stage. Thus, the circuit functions under class A-B operation at low power dissipation and provides high open loop gain. Additional embodiments of the invention utilize three MOSFET elements in the level shift section or an additional output stage having an NPN transistor in combination with an N-channel MOSFET.

Abstract: A light emitting diode is modulated by the output signal of a F.E.T. amplifier, and the resulting light signal is fed back to the amplifier input via an optical fiber and a light detecting photo diode. Thus, current feedback is achieved with very flat frequency response over a full frequency band by modulating a light emitting diode with the preamplifier output signal, reconverting the resultant radiation to an electrical signal, which is then fed back to the preamplifier input.

Abstract: A radio frequency amplifier includes a first stage cascode combination of a JFET and a bipolar transistor with a second stage bipolar transistor coupled to the first stage bipolar transistor through a tuned circuit. An AGC voltage is applied to the base of the second stage bipolar transistor, the emitter of which is connected in series with the base of the first stage bipolar transistor. The second stage bipolar transistor thus acts both as a second stage RF amplifier and an AGC signal amplifier for the first stage.

Abstract: A MOS-type FET (field effect transistor) amplifier includes a pair of P-channel and N-channel output stage MOS-type FETs which are ON-OFF controlled by a pulse signal and an inductive load. Each reverse current caused by the inductive load is shunted by a diode connected between the drain and source of each of the MOS-type FETs. An additional pair of diodes are provided in the drain-source circuits of the MOS-type FETs so as to prevent each reverse current flowing through respective substrates of the MOS-type FETs.

Abstract: An amplifier with separate AC and DC feedback loops is disclosed, in which first and second bipolar transistors or field effect transistors (FET) are connected differentially, a resistor is inserted between the emitters or sources of the first and second transistors, the base or gate of the first transistor is supplied with an input signal, the DC component of an output is fed back to the base or gate of the second transistor, the AC component of the output is fed back to the emitter or source of the second transistor to change over the feeding back amount of the AC component.

Abstract: A CMOS inverter is coupled to drive a bipolar transistor emitter follower which has a field effect transistor load. The load transistor is provided with a d-c bias that causes the circuit to function as a class A amplifier. The amplifier has a gain-band-width product that is much higher than can be achieved with CMOS inverters alone and such amplifiers can be cascaded to achieve extremely high gain values. It is preferred to obtain the required class A bias from a similar circuit wherein the load transistor is replaced by a resistor and the emitter follower has its output directly coupled to the CMOS inverter input. This means that the voltage across the resistor is that value that will operate the bias circuit at its trip point independent of the manufacturing variables that affect transistor threshold values. This amplifier configuration is useful in constructing high-speed, high-sensitivity clocked comparators and clocked latches.

Abstract: Field effect transconductance amplifiers having improved linearity and noise rejection characteristics to provide an amplifier output having excellent temporal coherence with the input signal are disclosed. The amplifiers utilize a series connection of two field effect devices, actual or emulated, preferably appropriately biased in a carrier velocity limited region to maximize linearity of the output. A high level of rejection of power supply noise may be achieved by a third series field effect device. Various embodiments including high gain and power amplifier embodiments are disclosed.

Abstract: In a transistor amplifier circuit of the type wherein two pairs of circuits are used each including a source follower type field effect transistor in the input stage and a bipolar type transistor in the succeeding stage and wherein the paired bipolar transistors constitute a differential amplifier, a plurality of constant current sources are connected such that the sum of the currents flowing through respective transistors will be constant for the purpose of driving the field effect transistors with small voltage in an active region.

Abstract: A biasing arrangement comprising: a pair of gate biasing resistors for Field Effect Transistors forming a push-pull amplifier, and a constant-current supplying means having two output terminals for supplying stabilized gate bias voltages to the transistors. The constant-current supplying means can be adjusted manually or automatically for setting a suitable operation point of the transistors and for balancing their bias voltages. By this arrangement, amplifiers can have a simplified structure. This arrangement greatly simplifies biasing means which also can be easily regulated.

Abstract: An automatic gain control circuit where the direct current potential levels of the gate and the source of a field effect transistor in a preamplifier stage are maintained substantial equal during automatic gain control. In the first embodiment, the gate of the field effect transistor is responsive to a high frequency input signal and the drain provides the amplified high frequency input signals as an output signal. The source is connected to electrical ground by an inductor and is connected to a voltage source having a voltage level controlled in accordance with the automatic gain control signal. The inductor acts to shunt to ground the direct current component of the supply voltage provided to the source. In the second embodiment, the gate of the field effect transistor is responsive to a high frequency input signal and the drain is connected to electrical ground.

Abstract: In a drive circuit having output current passing through at least one bipolar transistor, the rise and fall times of the output current are predetermined by controlling the rate of current change in the master path of a current mirror amplifier which has a separate slave path connected to supply base current for each bipolar transistor. The drain-source channel of an MOS transistor is connected to selectively supply current flow through the master path of the current mirror amplifier in one embodiment of the rate control means and the gate of the MOS transistor is connected in parallel with a capacitor to the output of a CMOS inverter to which control signals are applied.

Abstract: A high frequency oscillating circuit comprises an integrated circuitry composed of first and second lateral type transistors and a longitudinal type junction field effect transistor formed in a semiconductor layer of low impurity concentration epitaxially grown on a semiconductor substrate of high impurity concentration. An AT cut quartz crystal vibrator operable at a high oscillating frequency of more than several MHz is connected to the integrated circuitry, and a pair of capacitors are provided to adjust the vibrator oscillating frequency.

Abstract: A low-noise junction field effect depletion mode transistor amplifier and a signal retrieval network therefor is described. The junction (JFET) is used to amplify the signal from a piezoelectric transducer which forms the sensing element of a bone conduction microphone. A conventional transistor or Darlington pair is provided with a base electrode coupled to the source electrode of the JFET and a collector electrode coupled to the JFET drain electrode. The emitter circuit of the transistor includes a first voltage divider for feeding back a portion of the emitter signal to the base circuit of the transistor and another portion to the gate circuit of the JFET through the piezoelectric transducer. A second voltage divider is provided in the feedback path from the first divider to the transistor base to apply a portion of the base feedback signal to the JFET gate through the gate input resistor.

Abstract: Calibration means, including an optiosolator, for a hydrophone preamplifier hich couples to a remote DC supply source and a remote load through a long, two-wire cable. The output signal of the optoisolator is fed to the amplifier in series with the hydrophone output signal, the input to the optoisolator being an AC calibration signal. In an array of preamplifiers, the same calibration signal is fed to all the preamplifiers by connecting the optoisolators in series with each other and the source of the AC calibration signal.

Abstract: In active element of an audio amplifier, there exists a neutral point in which the amplification is minimum. When the middle point of AC mode in a circuit is coincident with the neutral point, noise elements accompanying with input signals are not amplified, i.e. the signal-to-noise ratio of an audio amplifier is improved. The middle point of AC mode in a circuit can be varied by adjusting resistors or capacitors of the circuit.

Abstract: A field effect transistor in common-drain amplifier connection is followed in direct-coupled cascade by a bipolar transistor of similar conductivity type, in common-emitter amplifier connection, and without emitter degeneration resistance for limiting its collector current by means of current feedback. Rather the collector current is limited by (a) restricting the range of source voltage variation of the field effect transistor by a threshold conducting means between the source electrode of the field effect transistor and the emitter electrode of the bipolar transistor and (b) inserting a resistance between the source electrode of the field effect transistor and the base electrode of the bipolar transistor to limit the maximum base drive current available to the bipolar transistor when the restricted source voltage of the field effect transistor departs most from the emitter voltage of the bipolar transistor.

Abstract: Disclosed is a low noise amplifier capable of handling large signals without significant distortion and which is particularly useful as the first electronic stage in hydrophone array systems utilizing piezoelectric sensor elements. The amplifier comprises three stages. The first stage uses an input field effect transistor (FET), which is protected against overload by very low leakage current diodes, and which acts as a voltage-to-current converter. The second stage comprises a junction transistor connected in a common emitter configuration which acts as a current-to-voltage converter. The third stage is a further junction transistor connected as an emitter follower. The overall gain of the amplifier is controlled by a feedback connection from the third stage to the first stage. The second and third stages are powered by a bipolar power supply.

Abstract: A source follower circuit using at least one FET in which an end of a resistor element is connected to the gate terminal of the FET and the other end of the resistor element is connected to a signal source which generates a comparatively large AC input signal. The resistance of the resistor element is determined to be at such a value as to prevent oscillation of the FET which is likely to occur depending on the length of the wiring between the signal source and gate terminal and the length of wiring between the source terminal and a load.

Abstract: A complementary or quasi-complementary Class B transistor amplifier stage, the halves of which have their output circuits serially connected between relatively negative and relatively positive operating supply voltages to receive direct current and are operated in push-pull with each other for signal to supply a common load from the interconnection of their output circuits, has driver circuitry including a pair of field effect transistors operated in push-pull to supply respective halves of the Class B transistor amplifier. A p-channel field effect transistor with source electrode connected to the relatively positive operating supply voltage drives one half of the Class B transistor amplifier stage from its drain electrode, and an n-channel field effect transistor with source electrode connected to the relatively negative operating supply voltage drives the other half of the Class B transistor amplifier stage.

Abstract: A plurality of inverted transitor current mirror and pull down circuits are disclosed which are suitable for providing current mirroring and base pull down functions in a variety of integrated circuit applications. The use of the inverted transistor as a current mirror is also utilized in gaining and/or level shifting any differential or single-ended analog or digital signal. The use of a multiple emitter inverted transistor for providing multiple pull down reduces to a fraction the chip area otherwise required by the use of multiple transistors.

Abstract: JFET and bipolar transistor devices are combined into an analog signal switching circuit. A JFET acts as a switch device for controlling analog signals. The JFET gate is charged through a bipolar transistor to turn if off and discharged through a second bipolar transistor to turn it on. A second JFET is used to control the conduction of the second bipolar transistor so that it only conducts heavily when a high slew rate is needed. The circuit can switch analog signals very rapidly and yet has very low quiescent current drain in both off and on states. The circuit is very simple and is amenable to monolithic integrated circuit construction.

Abstract: A current mirror amplifier (CMA) has master and slave mirroring transistors of bipolar type, input and output terminals to which the collector electrodes of the master and slave mirroring transistors respectively connect, and a common terminal to which the emitter electrodes of the mirroring transistors connect. The master mirroring transistor is provided with collector-to-base feedback for applying base potential to it which conditions its collector-to-emitter path to conduct input current applied between the common and input terminals of the CMA. The current gain of the CMA as between its input and output terminals is determined by the ratio of the transconductance of the slave mirroring transistor to that of the master mirroring transistor, whenever the base potential of the master mirroring transistor is applied to the base electrode of the slave mirroring via a transmission gate rendered transmissive responsive to a first level control potential being applied thereto.

Abstract: A pulse amplifier formed of first and second field effect transistors, each exhibiting an inherent input capacitance at its gate electrode, the field effect transistors being connected in push-pull relation whereby their drain or source electrodes are connected to a common output terminal. First and second resistive circuits are connected in a pulse supply circuit to supply pulse signals to the respective gate electrodes of the field effect transistors. Each of the resistive circuits exhibits a higher resistance when a pulse is supplied therethrough to turn the respective field effect transistor ON and a lower resistance when the pulse is terminated to turn the respective field effect transistor OFF.

Abstract: A complementary-symmetry amplifier is described, wherein a CMOS inverter has its P-channel MOSFET paralleled by the emitter-to-collector path of a simultaneously conductive PNP bipolar transistor and has its N-channel MOSFET paralleled by the emitter-to-collector path of a simultaneously conductive NPN bipolar transistor. The amplifier switches very rapidly due to the high transconductances of the bipolar transistors, while the MOSFET's permit the output terminal of the amplifier to swing over the full range of available supply potential.

Abstract: An ultra high input impedance and input voltage range amplifier wherein a low voltage input stage is cascaded with an emitter follower transistor stage which provides an excess current sink to keep the voltage across the input stage at a low value.

Abstract: A composite transistor device is described which comprises a field effect transistor having its transconductance multiplied by the current gain of a current mirror amplifier. The transconductances of such devices can be matched with an accuracy approaching that with which simple field effect transistors can be matched. The higher transconductances of the composite devices make possible a variety of new circuits with distinct performance advantages.

Abstract: Source-coupled first and second FET's arranged to receive input signal potential between their gate electrodes have their respective drain electrodes coupled to the base electrodes of first and second bipolar transistors. The collector electrode of the first and second bipolar transistors are connected to the source electrodes of the first and second FET's, respectively. The emitter electrodes of the first and second bipolar transistors supply balanced output signal currents.