Abstract: Non-linear asymmetric amplifiers incorporate different non-linear characteristics in single ended or differential configurations to avoid cancellation of non-linear characteristics and to produce the harmonic structures of vacuum tubes. The operating currents of the asymmetrical devices are different to create a bias shift in the coupling capacitance between the asymmetrical devices.

Abstract: A radio frequency circuit is disclosed which includes a low-noise amplifier and a mixer integrated on the same semiconductor chip by using a silicon BiCMOS process. The low-noise amplifier has a silicon bipolar junction transistor and the mixer has a silicon MOS type field effect transistor. In the radio frequency circuit, the mixer can include two silicon MOS type field effect transistors one of which has a source connected to a drain of the other silicon MOS type field effect transistor and a gate of one silicon MOS type field effect transistor is supplied with a local signal and a gate of the other silicon MOS type field effect transistor is supplied with a radio frequency signal amplified by the low-noise amplifier.

Abstract: A power amplifier including an amplifier stage including a heterojunction bipolar transistor for signal amplification having a base electrode connected to an RF signal input terminal, and a grounded emitter electrode; and a bias circuit including a silicon bipolar transistor having a base electrode connected to a power supply terminal, and a terminal from which a current amplified in response to a base current is output, which terminal is connected to the base electrode of the heterojunction bipolar transistor stage. In this power amplifier, since the voltage required for operating the bias circuit is reduced, a power amplifier capable of operating at a low voltage is realized.

Abstract: A method is disclosed for modifying the operational bandwidth of a signal amplification circuit, comprising the steps of providing an amplification circuit for amplifying the electrical signal, providing circuitry to selectably modify capacitive loading within the amplification circuit and coupled to the amplification circuit, and using the circuitry to selectively modify capacitive loading to alter a dominant pole of the amplification circuit, resulting in a modification of the operational bandwidth of the amplification circuit. A user switchable circuit 220 is coupled to an amplification portion (202, 204, 206, 208, 210, 216, 218) of the amplification circuitry such that a user may selectively activate or deactivate the switchable circuitry, effecting a corresponding and balanced increase or decrease of the capacitive loading within the amplification circuitry.

Abstract: An output stage of an amplifier circuit includes: a sinking bipolar circuit 23 for sinking current from an external load; a sourcing transistor 14 for sourcing current to the external load, the sourcing transistor 14 coupled in series with the sinking bipolar circuit 23, a common output node 34 is formed between the sourcing transistor 14 and the sinking bipolar circuit 23; a mirroring transistor 16 coupled to the sourcing transistor 14 such that current in the sourcing transistor 14 approximately mirrors current in the mirroring transistor 16; a current mirror circuit 39 responsive to the mirroring transistor 16 and coupled to control current flow through the sinking bipolar circuit 23; and a translinear bias circuit 48 coupled to the sinking bipolar circuit 23 for maintaining a minimum current in the bipolar circuit 23.

Abstract: A low-noise amplifier is disclosed that is capable of amplifying a signal with high gain (e.g., >60 dB) and low noise (e.g., <2 nV/Hz.sup.-1/2) over a large frequency bandwidth (e.g., from 1 Hz to 1 MHz) and with a high input impedance (e.g., >10.sup.6 .OMEGA.), high common mode rejection and high immunity to external noise sources.

Abstract: An interface stage for interfacing between input and output stages of a rail to rail comparator. The interface stage combines and amplifies four input stage output currents from the input stage, including by common base feeding them to a symmetrical set of virtual grounds, to generate a differential output signal for driving the output stage. In preferred embodiments, the interface stage includes two sets of bipolar transistors, each set connected in a common base configuration, which amplify each input stage output current and assert the resulting amplified signals to a pair of symmetrical virtual ground circuits. Each virtual ground circuit comprises a bipolar transistor and is configured to combine two of the amplified signals to generate one component of the differential output signal.

Abstract: A push-pull output stage includes an NPN pull-up transistor (Q6) and an NPN pull-down transistor (Q7) connected to an output. A compensation capacitor 17 is coupled between the collector and base of the pull-down transistor. A differential input stage includes emitter-coupled first (Q2) and second (Q3) NPN input transistors each coupled by a degeneration resistor to a constant current source. A base of the first NPN input transistor (Q2) is coupled to receive a shifted input voltage (V.sub.IN), and a base of the second NPN input transistor is coupled to the output conductor (3). The collectors of the first (Q2) and second (Q3) input transistors are connected to the sources of a folded cascode circuit including first (J1) and second (J2) cascode P-channel JFETs, respectively, the drains of which are connected to a current mirror output transistor (Q5) and a current mirror control transistor (Q4), respectively.

Abstract: The present invention relates to a current amplifier including a first MOS transistor with a drain defining a first terminal for controlling the amplifier with a current and a source connected to a first supply line. It also includes a second MOS transistor with a drain forming a terminal of current output of the amplifier and a source connected to the first supply line, and at least one first bipolar transistor having a base connected to the first control terminal, an emitter connected to a gate of the first MOS transistor and is, via a first biasing resistor, connected to the first supply line and having a collector of the first bipolar transistor being connected to a second supply line.

Abstract: In an amplifier circuit, bias feedback to an amplifying transistor is provided by interconnecting the DC bias voltage applied to the transistor output and the transistor input with a feedback circuit consisting of a switching transistor and bias resistors. Bias current and stable operation is provided by this design. In a particular embodiment two common emitter amplifying transistors are connected to a common output and each has a separate bias feedback circuit including a respective switching transistor. A single DC control input connected to the inputs of both switching transistors can be used to switch between the two amplifying transistors depending on the value of the control voltage thereby amplifying either an input signal of the first amplifying transistor or an input signal of the second amplifying transistor.

Abstract: A microwave power transistor device (20) is formed with impedance matching circuitry from a single elongated transistor die (70). Each of one or more transistor elements (56) is integrally formed with a blocking DC capacitor (54) on a common substrate of the transistor die. A wire (60 or 92) is connected between accurately positioned capacitor and transistor base connection points (90 and 80) to provide matching inductance for the parasitic base-collector capacitance of the transistor.

Abstract: A high speed fully differential operational amplifier with fast settling time for switched capacitor applications includes a high gain active cascode applied to the operational amplifier's input stage transistors to improve the gain, provide a higher output impedance, and thus, reduce the Miller feedback gate drain capacitance of the input stage devices. This improves the speed of the amplifier. A biasing technique is used to keep the active cascodes biased during transient overload so that settling will not be adversely affected during the recovery of the cascodes. A pair of transistors are used to feed forward a fraction of the tail current to "keep-alive" the cascode transistors. In other words, the fraction of the tail current that is fed to the source of the cascode transistors via the keep-alive transistors effectively biases the active cascodes sufficiently so that they do not turn off completely during slewing.

Abstract: A sense amplifier comprises an input node and an output node. An input transistor has a gate connected to the input node, a source connected to a first supply voltage rail, and a drain. A cascode transistor has a gate connected to a cascode node, a source connected to the drain of the input transistor, and a drain connected to the output node. A load transistor has a gate connected to a bias node, a drain connected to the output node, and a source connected to a second supply voltage rail. The gates of the cascode transistor and the load transistor are biased such that the input transistor and the cascode transistor are operated near their threshold and the load transistor is operated above threshold. In a presently preferred embodiment of the present invention, the input transistor and the cascode transistor of the sense amplifier are wide and short, such that they operate in below threshold, whereas the load transistor is made long and relatively narrow, so that it operates above threshold.

Abstract: An impedance-generating device that provides a resistance and a reactance that are non-linear functions of a signal over a wide impedance range (VariablE Non-Linear Impedance Circuit Electronics, "VENICE"). An electronic component that has a gain characteristic with a unity gain frequency that is directly proportional to that signal can be configured to generate such an impedance. Such an electronic component configured to provide a negative effective resistance and a variable non-linear reactance can be used to implement a high frequency harmonic generator. This generator can provide high order harmonics which can be used in high frequency communications systems. The electronic component can also be configured to provide only a voltage-variable non-linear reactance which can be used to implement a reactive mixer to frequency shift a high frequency signal to an intermediate frequency signal, from mixing the high frequency signal with a local oscillator signal.

Abstract: An operational amplifier having an input and an output stage. The input stage includes first and second source-coupled NMOS input transistors for accepting a differential input voltage and first and second PMOS load transistors for supplying current to each input transistor. A node between the first input transistor and first load transistor is coupled to a gate of a third PMOS transistor having its source coupled to a positive supply and its drain coupled to the sources of the input transistors and to a negative supply through a first biasing transistor. The output stage includes a fourth PMOS transistor having its gate coupled to a node between the second input transistor and the second load transistor and a source coupled to the positive supply voltage. A drain of the output transistor forms an output node and is coupled to the negative supply through a second biasing transistor.

Abstract: A gain-controlled amplifier for an integrated circuit includes a PNP gate controlled lateral bipolar transistor (GCLBT) which is configured in a common base configuration. The emitter electrode of the GCLBT is connected to a Bias-T having an inductor and a capacitor. The collector electrode of the GCLBT is coupled to a load capacitor, the capacitance of which is selected to alter the bandwidth of the amplifier. A gain control voltage is applied to the gate electrode of the GCLBT to control the amplifier gain. An input signal to be amplified is coupled to the emitter electrode of the GCLBT. An output signal, which is amplified in response to the gain control voltage, is provided from the collector electrode of the GCLBT. The gain-controlled amplifier can be used for an automatic gain control amplifier and also may be used for radio frequency and intermediate frequency amplifiers.

Abstract: A wide bandwidth fast settling operational amplifier (71) comprises a first stage (72) and a second stage (73). The first stage attenuates a differential input signal applied to the operational amplifier (71). The second stage (73) provides all the gain of the operational amplifier (71). The first stage is a wide bandwidth stage having a differential input transistor pair (74,75) coupled in a voltage follower configuration. The differential input transistor pair (74,75) are degenerated by resistors (76,77) to reduce voltage gain and to lower an impedance coupled to the second stage (73). The first stage (72) is biased via a current source. The first stage (72) provides a reference voltage to the second stage that corresponds to and varies with an input common mode voltage. The reference voltage is used to bias a cascode stage in the second stage (73) to increase common mode range.

Abstract: Low voltage operational amplifier (10) operates in a voltage range of one to eight volts over a temperature range of 0.degree. to 70.degree. centigrade. Op amp input stage (12) uses N-channel depletion-mode MOSFETs to provide amplification of the differential input and maintain constant transconductance. Source follower MOSFET (13) provides unity gain in transferring the AC signal, STAGE-1 OUTPUT, to the base of current sinking transistor (18). Sink control circuit (14) and source control circuit (22) generate the base drive currents for transistors (18) and (24). The signal at the output of MOSFET (13) either causes the sink transistor (18) to sink current or the signal to be transposed by means of a translinear loop (16) and causes the source transistor (24) to source current. An output stage provides approximately fifty milliamps of current drive and is quiescent until the output driver is selected.

Abstract: A MOSFET amplifier includes an amplifier stage with a boosted transconductance and a differential current mirror. The amplifier stage with a boosted transconductance includes complementary MOSFETs cross-connected with a fixed current source whereby the drain-to-source current and, therefore, the gate-to-source voltage, of the input MOSFET is fixed by the current source, while the drain-to-source current of the other MOSFET is dependent upon the input signal voltage. The differential current mirror includes a multiple branch differential input stage with a bridging resistor connected between the differential branches. The bridging resistor conducts a bridging current which equals one half of the difference between the differential branch currents, is substantially zero when the differential input voltage is zero and is nonzero when the differential input voltage is nonzero.

Abstract: A low noise amplifier (LNA), formed as a monolithic microwave integrated circuit (MMIC), includes a high-electron mobility transistor (HEMT) and utilizes tunable heterojunction bipolar transistor (HBT) active feedback to improve the amplifier's gain-bandwidth and linearity performance and to provide for self-biasing of the HEMT. In addition to enhancing the self-biasing, the MMIC, in accordance with the present invention, allows the frequency bandwidth and linearity characteristics of the LNA to be adjusted after the MMIC LNA has been fabricated without significantly degrading the noise figure performance.

Abstract: An amplifier having a current determiner to provide an operating current depending on a reference current, the operating current being used to operate an input amplifying device. The output of the input amplifying device is further amplified by one or more devices in the current determiner. The current determiner has a pair of matched devices used to set the output current in response to the supplied reference current.

Abstract: The operational amplifier which has a high input impedance as well as a high bandwidth, is designed particularly for capacitive loads and, above all, maintains its operating point within narrow limits irrespective of technological fluctuations. The BiCMOS amplifier uses bipolar cascades (Q6, Q16, Q7, Q17) as output paths which are driven at high impedance, via PMOS cascade transistors (M6, M7), directly by the differential amplifier transistor pair (M4, M5), as a result of which a current is output and the maintenance of the operating point of the operational amplifier is ensured even when technological fluctuations are taken into account.

Abstract: Low voltage operational amplifier (10) operates in a voltage range of one to eight volts over a temperature range of 0.degree. to 70.degree. centigrade. Op amp input stage (12) uses N-channel depletion-mode MOSFETs to provide amplification of the differential input and maintain constant transconductance. Source follower MOSFET (13) provides unity gain in transferring the AC signal, STAGE-1 OUTPUT, to the base of current sinking transistor (18). Sink control circuit (14) and source control circuit (22) generate the base drive currents for transistors (18) and (24). The signal at the output of MOSFET (13) either causes the sink transistor (18) to sink current or the signal to be transposed by means of a translinear loop (16) and causes the source transistor (24) to source current.

Abstract: A differential amplifier circuit of the present invention includes a device ("transistor") having a back gate electrode formed above the base region of a bipolar transistor between the emitter and collector regions. The back gate electrode of one such transistor is connected to the collector or emitter of another transistor in order to provide positive feedback so that the operation of each transistor is enhanced. The operational speed of the transistors is increased and the amplification factor of the differential amplifier circuit is improved to provide stabilized circuit operation. Accordingly, the degree of circuit integration and the operational stability of the differential amplifier are enhanced as compared with a differential amplifier circuit constructed of conventional bipolar transistors or FETs.

Abstract: A temperature compensated logarithmic detector biased with a proportional to absolute temperature (PTAT) voltage produced in accordance with an area ratio of biasing transistors is disclosed. According to one implementation of the invention, the temperature compensated logarithmic detector includes biasing circuitry and a logarithmic detector cell. The biasing circuitry receives an input signal and produces a PTAT bias voltage from the input signal. The PTAT characteristic of the PTAT bias voltage is produced by an area ratio. The logarithmic detector cell converts the input signal to a logarithmic output signal in accordance with a logarithmic transfer function over a narrow range.

Abstract: In an NPN type bipolar transistor, by employing AlGaAs or InGaAs having greater band gap than silicon, for an emitter and a base, doping amount of the emitter can be made smaller than that of the base to permit improvement of reverse withstanding voltage between the base and the emitter. Therefore, B class or C class bias can be used in a microwave band to improve efficiency.

Abstract: An integrated circuit photodetector includes a transimpedance amplifier including a differential amplifier stage with PNP emitter-coupled transistors and a PNP input transistor which are biased only by base currents of the emitter-coupled transistors, to achieve low input bias current. Low noise operation is achieved by bypass capacitors coupled between the bases and emitters of the input transistors, respectively. A constant current source supplies a current which develops a small pedestal voltage across a resistor to bias the non-inverting input of the transimpedance amplifier so as to avoid nonlinear amplification of low level light signals. A positively biased N-type guard tub surrounds the photodetector, which is formed in a junction-isolated N region on a P substrate, to collect electrons generated in the substrate by deep-penetrating IR light to prevent them from causing amplification errors.

Abstract: Multiplier based transconductance amplifiers utilizing the combination of FET differential input stages and Gilbert multiplier output stages are disclosed. The amplifiers provide a high input resistance, high output resistance, and wide g.sub.m adjustment range without need for output level-shifting stages. Also disclosed are various transconductance control circuits which require only a simple one-transistor voltage buffer in the feedback loop rather than the two more complex voltage amplifiers required by the prior art. Various embodiments are disclosed.

Abstract: An amplifier includes: a FET having a source electrode, a drain electrode and a gate electrode, wherein an input signal input to the gate electrode is amplified by the FET and an output signal indicating the amplified input signal is output from the drain electrode; a first voltage biasing unit, coupled to the source electrode of the FET, for biasing the source electrode at a preset positive potential; and a second voltage biasing unit, coupled to the gate electrode of the FET, for biasing the gate electrode at a potential lower than the potential of the source electrode during the operation of the FET.

Abstract: A high-frequency amplifier has a first signal amplifier which includes a field effect transistor, and a constant-current circuit which is direct current connected, as well as cascade-connected, to the field effect transistor for maintaining a constant drain current of the field effect transistor. This constant-current circuit also acts as a second amplifier. The constant-current circuit may comprise a bipolar transistor or temperature compensation circuit. In this high-frequency amplifier, its gain and noise figure are stable against ambient temperature changes and power consumption efficiency is improved. This high-frequency amplifier is also suitable for mass production.

Abstract: An amplifier topology for receiving signals output from a fiber optic rotation sensor and producing voltages that may be processed to determine the rotation rate includes a photodiode for receiving an optical signal and producing a corresponding electrical photodiode output signal. An ultra low noise and ultra low capacitance differential input stage is connected to receive the photodiode output signal. An operational amplifier having low noise and ultra-wide bandwidth is connected to the ultra low capacitance differential input stage to receive the output signal therefrom as a driving signal and to produce a low noise output signal. The differential input stage comprises a first amplifier circuit that includes a first transistor connected to the photodetector to act as a first buffer having low noise, low capacitance and unity gain.

Abstract: An integrated circuit is provided with particular application for high frequency modulation circuits, such as a mixer circuit, with reduced noise and gain. The circuit provides a novel application of a single device comprising a 4 or 5 terminal, gate controlled lateral bipolar junction transistor device, in the form of a merged MOS and lateral bipolar transistor. In a grounded base configuration, RF and LO signals are applied to the gate and emitter terminals respectively and provide for modulated output at the collector, and provides signal modulation with reduced noise compared with multi-device implementations of known mixer circuits using a summation circuit, diodes and FETs. Advantageously, operation of the device in the grounded base or grounded emitter configuration provides for strong modulation of the DC current gain, i.e. over 4 decades, as a function of gate voltage.

Abstract: The amplifier includes a pair of bipolar input transistors (Q1, Q2), each having a base adapted to receive a differential input signal, a collector and an emitter which is biased by a first fixed current source (M7, M8) of its own and a degeneration resistor (R) which connects the emitters of the two bipolar transistors. The collector of each bipolar transistor is also biased by a second fixed current source (M5, M6) with a smaller current than that of the first source, and the collectors of the two bipolar transistors are furthermore connected to the input terminals of respective MOS amplifier devices (M1, M2, M3, M4, R.sub.L). The amplifier can be made in BCD, BiCMOS or purely CMOS technology, in which case the bipolar transistors are obtained as lateral bipolar transistors.

Abstract: An amplifier has an output buffer having an input coupled to the second outputs of the first and second current mirrors for receiving the biasing current and having an output for providing an amplified drive current. The output buffer includes a first transistor of a first type having its base coupled to the input of the output buffer and to the base of a first transistor of a second type. The emitter of the first transistor of a first type coupled to the base of a second transistor of a second type, and a collector. The emitter of the first transistor of the second type is coupled to the base of a second transistor of the first type. The emitter of the second transistor of the first type is coupled to the emitter of the second transistor of the second type and to the output of the buffer. First and second current mirrors of complementary transistor types provide a reference current and a biasing current in response to a programming current and a feedback current.

Abstract: A temperature-stable variable gain amplifier having a differential input stage coupled to a first terminal of a voltage supply generator and a second terminal of the voltage supply generator through first and second field-effect transistors whose gate terminals are connected to two bipolar transistors which are also connected between the first terminal of the voltage supply generator, through two resistors, and the second terminal of the voltage supply generator, through third and fourth field-effect transistors. Also, the third and fourth transistors have gate terminals connected into a second common control terminal, and the collector terminals of the bipolar transistors form output terminals for the amplifiers.

Abstract: This invention includes a linear, low noise, low voltage operational amplifier which drives variable resistive and capacitive output loads and includes a slave emitter follower buffer stage.

Abstract: According to the invention, a circuit arrangement includes at least two bipolar transistors, each having a base electrode, an emitter electrode and a collector electrode. The two transistors are connected together at their base electrodes and the base electrodes are connected to an auxiliary voltage. The collector electrodes are arranged to be first and second outputs of the circuit arrangement. An emitter resistor is connected to the emitter electrode of each transistor. Each emitter resistor is a pinch resistor having a gate electrode for controlling a resistance value of the respective emitter resistor. The gate electrodes of the respective pinch resistors are configured to be first and second inputs of the circuit arrangement.

Abstract: An op-amp comprising a single gain stage amplifier cascaded with a buffer and an output stage. The buffer comprises an amplifier which isolates the gain stage from the output stage to prevent loading of the gain stage and create a more linear op-amp. For frequency compensation, the op-amp utilizes MOSFETs connected in a reversed biased configuration as load compensation capacitors. This technique reduces the non-linear effects of MOSFET gate capacitors utilized in conventional Miller compensation schemes and allows for digital fabrication technology of low distortion, low power supply operational amplifier design.

Abstract: In an operational amplifier circuit, noise is lowered by using junction FETs as an input transistor pair, and an input operating point and an output operating point can be set at different potentials by connecting a capacitor between an output terminal and an inverting input terminal. For this reason, the operational amplifier circuit can be properly biased and can be operated at a low power supply voltage. In addition, since transistors other than transistors used as constant current sources are constituted by bipolar transistors, the operational amplifier circuit can have wideband frequency characteristics.

Abstract: A wide dynamic range Operational Transconductance Amplifier (OTA) (100) includes a differential voltage to current converter (206) for converting an input voltage to a current level. A pair of programmable folded cascodes (201) are coupled to the output of the converter (206) in order to render the amplifier (100) programmable. Current sources (222 and 226) are employed to provide output sourcing current. There is also included a common mode feedback (106) for maintaining the output signal substantially and equally centered between rails of the operating voltage (208).

Abstract: An integration circuit includes a differential amplifier constituted by at least two bipolar transistors serving as amplifying elements, a capacitor connected, as a load, across the collection electrodes of the differential amplifier, and a field-effect transistor having source and drain electrodes connected between the emitter electrodes of the two bipolar transistors. A control voltage is applied to the gate electrode of the field-effect transistor. By changing the resistance value between the source and drain electrodes of the field-effect transistor using a gate voltage, the transconductance of the differential amplifier is changed over a wide range. As a result, the time constant of the integration circuit is changed, such that if the integration circuit is used for an active filter, for example, the cut-off frequency can be changed by changing the time constant of the integration circuit.

Abstract: A circuit device for neutralizing thermal drift in a transconductor differential stage using a first circuit portion which corresponds structurally to the transconductor differential stage and has a pair of MOS input transistors defining a transconductance value which is substantially proportional to that of the transconductor differential stage, a pair of bipolar output transistors coupled to the MOS input transistors in a cascode configuration, and a second circuit portion being supplied a current from an output of the first differential portion to thereby output a current to be passed to the transconductor differential stage. The value of the output current is inversely proportional to temperature-dependent parameters of the transconductance.

Abstract: A constant current generation circuit includes a current mirror circuit having an input PMOS transistor connected in the form of a diode connected in series to a constant current source. With a constant current I.sub.0 of the constant current source, a drain voltage V.sub.2 of the input PMOS transistor is set to a value near to the threshold voltage of the input PMOS transistor. A gate of the input PMOS transistor is connected to a gate of output PMOS transistor having its drain connected to an emitter of a PNP transistor, which has its base biased with an appropriate voltage. With this arrangement, a drain voltage V.sub.1 of the output PMOS transistor can be made equal to the drain voltage V.sub.2 of the input PMOS transistor, and therefore, the input current I.sub.0 flowing through the input PMOS transistor can be made equal to an output current I.sub.1 flowing through the output PMOS transistor.

Abstract: The invention is a novel charge sensitive preamplifier (CSP) which has no resistor in parallel with the feedback capacitor. No resetting circuit is required to discharge the feedback capacitor. The DC stabilization of the preamplifier is obtained by means of a second feedback loop between the preamplifier output and the common base transistor of the input cascode. The input transistor of the preamplifier is a Junction Field Transistor (JFET) with the gate-source junction forward biased. The detector leakage current flows into this junction. This invention is concerned with a new circuit configuration for a charge sensitive preamplifier and a novel use of the input Field Effect Transistor of the CSP itself. In particular this invention, in addition to eliminating the feedback resistor, eliminates the need for external devices between the detector and the preamplifier, and it eliminates the need for external circuitry to sense the output voltage and reset the CSP.

Abstract: Voltage control means output to a variable resistance part 2 a control voltage proportionate to an error between an input detection signal of an input terminal T.sub.i of a source follower field-effect transistor 1 and an output detection signal of an output-side transistor 5. Although said variable resistance part 2 changes its resistance value in accordance with a control voltage, a drain current flowing from the field-effect transistor to said variable resistance part is maintained constant by a constant-current source 3. Thus, an output voltage of the output side transistor changes in accordance with said error, thereby controlling the input detection voltage and the output detection voltage to be constantly the same.

Abstract: A low power operational amplifier adjusts its output slew rate by providing additional bias current to its differential amplifier stage when the amplitude of the differential input signal exceeds a given threshold. The additional bias current provides an enhanced current for charging or discharging an internal compensating feedback capacitor of the operational amplifier. The power dissipation of the operational amplifier is kept low by employing FET transistors for the basic operational amplifier functions and by minimally biasing the slew rate enhancement circuitry associated with monitoring the amplitude of the differential input signal as well as providing the additional current to the differential amplifier stage when the amplitude of the differential input signal exceeds the given threshold.

Abstract: A tiny pre-amplifier for a small, low voltage, high impedance signal source, usually an electret microphone, exhibiting near unity gain, has an input cascode stage connected to the microphone and a matched balancing cascode stage; both cascode stages are energized from the same power supply circuit. The two cascode stages supply intermediate signals to the inputs of a differential amplifier to generate an output signal having a greatly reduced noise content, independent of power supply variations. The pre-amplifier is wholly integratable, has low power drain, and fits into the microphone housing.

Abstract: A circuit apparatus suitable for use as a basic building block of very small geometry integrated circuits (on the order of 1 micron and smaller) comprising (i) a current mirror circuit with a cascode output, comprising a first transistor and a second transistor connected in series, the first transistor coupled between a ground and the second transistor, and (ii) a single stage gain loop comprising a transresistance amplifier coupled between a control input of the second transistor and the series connection of the first and second transistors, wherein the circuit apparatus provides an output with high impedance output and with maximum swing capability.

Abstract: A BiCMOS amplifier provides full swing with fast transitions from V.sub.dd to V.sub.ss and from V.sub.ss to V.sub.dd, and therefore has important applications in low voltage BiCMOS VLSI circuits. A bipolar totem pole output transistor pair is connected between a supply voltage, V.sub.dd and ground, V.sub.ss. A fast output transition from V.sub.dd to V.sub.ss is accomplished by extending the conduction range of the pull down bipolar transistor. An n-channel MOSFET is fabricated to provide a 0 V.sub.t pass transistor. The pass transistor is coupled to a first of the bipolar output transistor pair, the pull up transistor, to inject carriers into the base of the output transistor and extend the transistor's conduction, such that the transistor provides a fast output upswing from V.sub.ss to V.sub.dd.

Abstract: An electronic comparator circuit having a high speed during switch phase and combining the advantages of bipolar technology with those of CMOS technology. The circuit consists of a differential stage input circuit having a differential pair of bipolar transistors forming its outputs. The output stage contains a pair of MOS transistors having gate electrodes in common. The pair of MOS transistors is connected on one side to the outputs of the input portion and on the other side to a positive supply pole via a current mirror circuit. The output contains another pair of MOS transistors with gate electrodes in common connected between the out puts of the input portion and ground. The drain electrode of the first pair of MOS transistors forms the output for the comparator.