And Tuning Means Patents (Class 330/305)
  • Patent number: 7332970
    Abstract: An integrated amplifier has a resonant circuit with a tuneable center frequency, in which the resonant circuit has at least one coil and at least one varactor for varying a resonant frequency of the resonant circuit.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: February 19, 2008
    Assignee: Infineon Technologies AG
    Inventors: Christoph Kienmayer, Marc Tiebout
  • Publication number: 20080030279
    Abstract: According to an example embodiment, an amplitude feedback loop may include an RF amplifier, a detector, a comparator, and a Q-enhancement cell. In an example embodiment, the RF amplifier has an output signal, and the detector has an input coupled to the output signal of the RF amplifier and is configured to detect a level of the output signal of the RF amplifier. The comparator circuit may receive as inputs a reference voltage and the output of the detector. Also, the comparator circuit is configured to output a control signal based on a difference between the reference voltage and the output signal of the power detector. The Q-enhancement cell may be coupled to the RF amplifier and have an input coupled to an output of the comparator circuit. A bias current of the Q-enhancement cell may be adjusted based on the control signal output by the comparator circuit.
    Type: Application
    Filed: October 31, 2006
    Publication date: February 7, 2008
    Inventors: Adedayo Ojo, Arya Behzad
  • Patent number: 7323939
    Abstract: Provided is a low noise amplifier with a common source and a source degeneration, which has linearity, power gain, noise factor, and lossless input matching. The low noise amplifier includes: a first inductor having one terminal connected to an input terminal receiving a signal; a second inductor having one terminal connected to a ground; a MOS transistor having a gate connected to the first inductor, a source connected to the other terminal of the second inductor, and a drain transmitting a signal; and a variable capacitor connected between the source and gate of the MOS transistor and varying an input matching frequency at the input terminal.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: January 29, 2008
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seon-Ho Han, Mun-Yang Park, Hyun-Kyu Yu
  • Patent number: 7321273
    Abstract: Off-chip LC circuit for lowest ground and VDD impedance for power amplifier. A novel approach is made by which a chip to PCB (Printer Circuit Board) interface may be made such that the ground and VDD potential levels are effectively brought onto the die of the chip such that a true ground potential is maintained within the chip. This off-chip LC circuit operates cooperatively with an on-chip decoupling capacitor to reduce the overall effective inductance of the bond wires employed to bring signal and voltage levels from the die to the chip exterior. This circuit ensures a relatively low impedance for a PA (Power Amplifier) that is implemented within chip thereby providing for improved performance.
    Type: Grant
    Filed: October 9, 2006
    Date of Patent: January 22, 2008
    Assignee: Broadcom Corporation
    Inventors: Jesus Alfonso Castaneda, Qiang (Tom) Li
  • Patent number: 7315212
    Abstract: Circuits and methods are provided for building integrated transformer-coupled amplifiers with on-chip transformers that are designed to resonate or otherwise tune parasitic capacitances to achieve frequency tuning of amplifiers at millimeter wave operating frequencies.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: January 1, 2008
    Assignee: International Business Machines Corporation
    Inventors: Brian A. Floyd, David Goren, Ullrich R. Pfeiffer, Scott Kevin Reynolds
  • Patent number: 7282998
    Abstract: A method and an apparatus for calibrating the center frequency of a power amplifier. The apparatus includes a capacitor unit and an inductor unit. The capacitor unit and the inductor unit are connected in parallel so as to control the center frequency of the power amplifier. The method includes: (a) controlling the capacitor unit to correspond with a plurality of test capacitance values; (b) inputting an input signal with the center frequency to the power amplifier, and recording a plurality of test output powers generated according to the test capacitance values and the input signal; and (c) selecting one predetermined power among the test output powers, and utilizing a test capacitance value corresponding to the predetermined power to set a capacitance value of the capacitor unit.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: October 16, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventor: Tzung-Ming Chen
  • Patent number: 7245187
    Abstract: The present invention relates generally to amplifiers, and more specifically to multi-band and/or multi-standard low noise amplifiers. There are currently no inexpensive, highperformance, fully-integrable, multi-standard low noise amplifiers (LNAs) available. The invention provides a suitable LNA for a multi-band and/or multi-standard receiver in wireless and other applications.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: July 17, 2007
    Assignee: Sirific Wireless Corporation
    Inventor: Javad Khajehpour
  • Patent number: 7202734
    Abstract: A circuit and method for electronically tuning an RF power amplifier. The output filter includes at least one electronically variable reactance. The electronically tuned power amplifier may be tuned rapidly to a selected frequency, to a selected impedance, or to produce a selected output amplitude. An optional controller translates frequency, impedance, or modulation inputs into tuning signals. High-efficiency, wideband amplitude modulation is produced by varying the amplifier load impedance along preferred loci.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: April 10, 2007
    Inventor: Frederick Herbert Raab
  • Patent number: 7202748
    Abstract: Circuitry and methods for improved amplifiers with large bandwidth and constant gain are provided. The combination of a synthetic inductive drain load and a bridged-T matching network provide amplifiers that can drive a substantial capacitive load with the above mentioned improvements over prior amplifiers. Additionally, circuits presented allow for improved rise time and insensitivity to temperature variations.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: April 10, 2007
    Assignee: Linear Technology Corporation
    Inventor: Steven D. Roach
  • Patent number: 7202740
    Abstract: A gain boost circuit and methodology are described for providing improved gain boosting with tuned amplifier circuits, such as differential low noise amplifier circuits having output resonant tank circuits. By selectively controlling the current source for a negative transconductance stage coupled between the differential amplifier output and the output resonant tank circuits, the amplifier gain may be adjusted to compensate for temperature variations. In addition, the amplifier gain boost may be selectively added, removed or even incrementally adjusted by using a current source control circuit in the negative transconductance stage to adjust the negative transconductance value generated by the negative transconductance stage.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: April 10, 2007
    Assignee: Broadcom Corporation
    Inventor: John Leete
  • Patent number: 7202747
    Abstract: A self-tuning variable impedance circuit provides improved performance. A variation in the power applied to the variable impedance circuit causes a corresponding change in the impedance of the circuit, resulting in improved performance. For example, the variable impedance circuit may be a matching circuit that “follows” the output power of a power amplifier, thereby increasing the power efficiency of the power amplifier.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: April 10, 2007
    Assignee: Agile Materials and Technologies, Inc.
    Inventors: Roger J Forse, Vicki Chen, Robert A York, David R Chase
  • Patent number: 7193455
    Abstract: A programmable/tunable active low-pass filter at least has the resistors, capacitors and shunt control devices. It uses the linear property of the MOSFET to implement the shunt control devices. Based on the first-ordered linear analysis of the transfer function of the active-RC filter, it is found that the cut-off frequency of the active-RC filter can be tuned via the effective small-signal current controlled by the shunt control devices. Therefore, the filter of the present invention allowed users for fine tune the cut-off frequency linearly through the shunt control devices when the variation of the environment or procedure parameters of manufacture (i.e. thermo-effects) cause the cut-off frequency drift, thus, the cut-off frequency can be kept in a constant value. In addition, it needs the different cut-off frequency from the different application.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: March 20, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Hong Lou, Hung-I Chen
  • Patent number: 7183858
    Abstract: A method and apparatus are provided for enabling a transmitter to have a substantially linear magnitude response and a substantially linear phase response. The transmitter includes first and second programmable gain amplifiers (PGAs). The first PGA is tuned to have a resonant frequency that is less than an operating frequency of the first PGA. The second PGA is tuned to have a resonant frequency that is greater than an operating frequency of the second PGA. A magnitude response at an output of the first PGA and a magnitude response at an output of the second PGA combine to provide a substantially linear magnitude response across a frequency range that includes the operating frequency of the first or second PGA. According to an embodiment, the first and second PGAs have the same operating frequency.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: February 27, 2007
    Assignee: Broadcom Corporation
    Inventor: Meng-An Pan
  • Patent number: 7158772
    Abstract: A Gaussian family filter (e.g. an equiripple filter) comprises a first pole, a second pole, a third pole and a signal combiner. The first pole has a biquadratic low pass characteristic and is configured to provide a first low pass signal. The second pole is coupled to the first low pass signal, the second pole having a first-order low pass characteristic, and providing a second low pass signal and a high pass signal. The third pole is coupled to the second low pass signal and has a biquadratic low pass characteristic for generating a third low pass signal. The signal combiner is configured to combine the third low pass signal and the high pass signal to provide a combined signal.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: January 2, 2007
    Assignee: LSI Logic Corporation
    Inventor: Brian Merrigan
  • Patent number: 7151411
    Abstract: An embodiment of the present invention provides an amplifier system, comprising at least one variable impedance matching network, the output of which provides the input to at least one amplifier stage or provides an output of the power amplifier itself, and a bias network associated with the at least one amplifier stage. The amplifier system may further comprise a controller enabling impedance control to the at least one variable impedance matching network and a supply voltage provided to the at least one variable impedance network and/or the at least one amplifier stage and wherein the at least one variable impedance network and the at least one amplifier stage may be a plurality of impedance networks connected to a plurality of amplifier stages. The at least one variable impedance network may include at least one variable capacitor and the at least one variable capacitor may be a voltage tunable dielectric capacitor which may include Parascan® voltage tunable dielectric material.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: December 19, 2006
    Assignee: Paratek Microwave, Inc.
    Inventors: James Martin, Izzac Khayo, Rich Keenan, Valter Karavanic, Greg Mendolia
  • Patent number: 7145395
    Abstract: A transconductance cell is disclosed. The transconductance cell may be single-ended or differential. The transconductance cell may include a tunable degeneration circuit. The tunable degeneration circuit may have a plurality of field effect transistors connected in series with each of the field effect transistors having a gate configured to receive a tuning voltage.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: December 5, 2006
    Assignee: Qualcomm Incorporated
    Inventors: Prasad Gudem, Gurkanwal Kamal Sahota
  • Patent number: 7123097
    Abstract: Circuitry and methods for improved amplifiers with large bandwidth and constant gain are provided. The combination of a synthetic inductive drain load and a bridged-T matching network provide amplifiers that can drive a substantial capacitive load with the above mentioned improvements over prior amplifiers. Additionally, circuits presented allow for improved rise time and insensitivity to temperature variations.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: October 17, 2006
    Assignee: Linear Technology Corporation
    Inventor: Steven D. Roach
  • Patent number: 7119631
    Abstract: Off-chip LC circuit for lowest ground and VDD impedance for power amplifier. A novel approach is made by which a chip to PCB (Printer Circuit Board) interface may be made such that the ground and VDD potential levels are effectively brought onto the die of the chip such that a true ground potential is maintained within the chip. This off-chip LC circuit operates cooperatively with an on-chip decoupling capacitor to reduce the overall effective inductance of the bond wires employed to bring signal and voltage levels from the die to the chip exterior. This circuit ensures a relatively low impedance for a PA (Power Amplifier) that is implemented within chip thereby providing for improved performance.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: October 10, 2006
    Assignee: Broadcom Corporation
    Inventors: Jesus Alfonso Castaneda, Qiang (Tom) Li
  • Patent number: 7091792
    Abstract: Methods and apparatus for amplifying a tuner input signal are disclosed. One embodiment of the invention is directed to a tuner amplifier system comprising a tuner amplifier input that receives a tuner amplifier input signal and a first amplifier comprising an input and an output. The input of the first amplifier is coupled to the tuner amplifier input. The system further comprises a second amplifier comprising an input and an output, the input of the second amplifier being coupled to the tuner amplifier input, and a switch adapted to couple one of the first amplifier output and the second amplifier output to an output of the tuner amplifier. Another embodiment of the invention is directed to a method of amplifying a tuner input signal. The method comprises acts of detecting a power of the tuner input signal, selecting a tuner amplifier to amplify the tuner input signal based on the power of the tuner input signal, and amplifying the tuner input signal using the selected amplifier.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: August 15, 2006
    Assignee: Analog Devices, Inc.
    Inventor: Iuri Mehr
  • Patent number: 7091784
    Abstract: The frequency of a differential circuit can be advantageously adjusted using a switchable inductor. Specifically, the switchable inductor allows a base inductance to be increased by activating one of a plurality of inductor stages. A switch in an inductor stage can be opened to activate that inductor stage. In one embodiment, the switch can be implemented using a PMOS transistor and closing the switch means turning on the PMOS transistor. Advantageously, the switches have non-ideal behavior when closed which may be mitigated by disposing the switch between differential sides of a circuit, thereby providing a more optimal Q for certain applications. Moreover, the switches ensure that the first and second sides of the differential circuit receive an equal resistance to a virtual ground.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: August 15, 2006
    Assignee: Atheros Communications, Inc.
    Inventor: Manolis Terrovitis
  • Patent number: 7057464
    Abstract: The present invention relates to a lineariser for use with an amplifier. The lineariser comprises an input means and an output means. Input matching means are provided to receive an input signal. A transistor is provided, said transistor being arranged to operate substantially close to a switched on condition. The transistor is arranged to apply a non-linear gain to said input signal. The output means output the non-linear gain signal to said amplifier. The lineariser may be used with a RF power amplifier. The lineariser may be used in elements of a communication system.
    Type: Grant
    Filed: November 23, 2001
    Date of Patent: June 6, 2006
    Assignee: Nokia Corporation
    Inventor: Jaspal Bharj
  • Patent number: 7038548
    Abstract: An amplifier circuit for AM broadcasting for amplifying an inputted AM broadcast signal by an FET and outputting it. The amplifier circuit comprises FETs for signal amplification which are P-channel MOSFETs (4, 5) of relatively small flicker noise. While suppressing the flicker noise to a lowest possible level, more circuits including the RF amplifier for AM broadcasting can be integrated on one chip, thereby realizing small size and low noise of the circuits.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: May 2, 2006
    Assignee: Niigata Seimitsu Co., Ltd.
    Inventors: Takeshi Ikeda, Hiroshi Miyagi
  • Patent number: 7019594
    Abstract: A method and an apparatus for analyzing performance of a multi-stage radio frequency amplifier are described. The method simplifies the multi-stage radio frequency amplifier into equivalent input parts, output parts and mid-stage parts. The mid-stage parts are temporarily unset. Therefore, the equivalent input parts and output parts will be adjusted to make best gain performance and the mid-stage parts will be the next targets for analysis. Repeating the above-mentioned methods for decomposing the circuit can systemize the method for analyzing circuits and problems in each part of the circuit may be found more quickly.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: March 28, 2006
    Assignee: Richwave Technology Corp.
    Inventor: Chun Hsueh Chu
  • Patent number: 7009455
    Abstract: A power amplifier matching circuit is provided. The matching circuit includes a ferro-electric tunable component. A control signal is applied to the tunable component, changing the component's impedance. This changes the impedance of the matching circuit.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: March 7, 2006
    Assignee: Kyocera Wireless Corp.
    Inventors: Stanley S. Toncich, Tim Forrester
  • Patent number: 6980051
    Abstract: The present invention relates to a method and circuit arrangement for adjusting a gain, wherein said circuit arrangement comprises at least a first output branch connected to a first load and a second output branch connected to a second load. The gain control function is realized based on a current splitting, wherein a non-operated output branch is used as a kind of dummy branch for receiving a part of the output current. Thus, only as many output branches as there are outputs are required to implement a gain control based on splitting. Thereby, a complexity of the layout design is reduced and control and biasing of dummy branches is not required.
    Type: Grant
    Filed: May 8, 2001
    Date of Patent: December 27, 2005
    Assignee: Nokia Corporation
    Inventors: Jussi Ryynänen, Jarkko Jussila
  • Patent number: 6977562
    Abstract: A passive interface circuit for coupling an output signal from a power amplifier to a load is disclosed. The interface presents an impedance to the power amplifier that increases as the power level in the output signal decreases. In one embodiment, the interface circuit includes a fixed network and a capacitor having a capacitance that varies with the potential across the capacitor. The fixed network couples the output signal to the load. The capacitor is connected in parallel with the load and has a capacitance that increases in response to an increase in potential across the capacitor. The capacitor is preferably a MEM capacitor having plates that move with respect to one another in response to changes in the average potential difference between the plates.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Chul Hong Park
  • Patent number: 6977555
    Abstract: A tuner circuit includes a variable attenuator circuit including a PIN diode, disposed upstream of a variable-gain amplifier circuit and controlled according to the same AGC voltage used to control the variable-gain amplifier circuit. The operations of the variable-gain amplifier circuit and the variable attenuator circuit in relation to the AGC voltage are set such that when an input RF signal is at a maximum assumed level, a direct current that flows through the PIN diode will be less than a value of a direct current that maximizes intermodulation distortion.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: December 20, 2005
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Sadao Kotera, Hiroshi Taniguchi
  • Patent number: 6977542
    Abstract: A digital tuning circuit which generates a digital code representative of a difference of signals generated by a mirror trans-conductor circuit (having electrical characteristics similar to a trans-conductor circuit in a filter) and a reference circuit. The digital code is used to adjust the trans-conductance of both the mirror trans-conductor circuit and the filter. Some of the most/more significant bits may be used to selectively activate the respective trans-conductor elements contained in the mirror trans-conductor circuit and the filter. The remaining bits may be used to fine-tune the trans-conductance of the trans-conductor elements and the filter.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: December 20, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Saravana Kumar Ganeshan, Srinivasan Venkatraman
  • Patent number: 6963247
    Abstract: A resonant load circuit is disposed in an integrated circuit, where the resonant load circuit includes an integrated inductance in parallel with an integrated capacitance, and further includes a first integrated resistance Rs in series with one of the inductance and capacitance, preferably in series with the inductance, and a second integrated resistance Rp in parallel with the inductance and capacitance. The first and second integrated resistances have values selected for reducing an amount of resonant load circuit Q over a plurality of instances of the integrated circuit. In a preferred, but non-limiting, embodiment the resonant load circuit forms a load in an RF low noise amplifier, such as a balanced inductively degenerated common source low noise amplifier (LNA).
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: November 8, 2005
    Assignee: Nokia Corporation
    Inventors: Pete Sivonen, Ari Vilander
  • Patent number: 6958652
    Abstract: The present invention relates to a circuit for varying bandwidth of transconductance-capacitor filter by controlling transconductance of a transconductance circuit, and a digital tuning circuit of transconductor-capacitor filter. A transconductor of an embodiment of the present invention comprises a first and second amplifying devices; a resistor; a first and second bias current sources; and transconductance varying circuit. A tuning circuit of another embodiment of the invention relates to a digital tuning circuit comprising a transconductor that outputs current proportional to input voltage and a varying capacitance that is connected with output node of transconductor and between grounds and varies its capacitance depending upon the level of control signal.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: October 25, 2005
    Assignee: Integrant Technologies Inc.
    Inventors: Seyeob Kim, Bo-Eun Kim, Minsu Jeong
  • Patent number: 6949979
    Abstract: The designing method and circuits for a multi-band electronic circuit having at least one transistor have been proposed. The proposed method includes steps of: (a) changing the capacitance between the input terminal and the output terminal of the transistor of the circuit, and (b) obtaining the resonant frequency of the circuit in response to the changed capacitance for switching among multiple bands. The designing method and circuits for a multi-band amplifier, which includes at least one transistor having an input terminal and an inductor electrically connected to the input terminal of the transistor, have been proposed too. The designing method for a multi-band amplifier includes steps of: changing the bias of the transistor, and switching the resonant frequency of the input impedance of the transistor and the inductor in response to the changed bias for switching among multiple bands.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: September 27, 2005
    Assignees: Memetics Technology Co. LTD, National Taiwan University
    Inventors: Shey-shi Lu, Hung-Wei Chiu, Po-Wei Lee, Yu-Che Yang
  • Patent number: 6946914
    Abstract: Circuitry and methods for improved amplifiers with large bandwidth and constant gain are provided. The combination of a synthetic inductive drain load and a bridged-T matching network provide amplifiers that can drive a substantial capacitive load with the above mentioned improvements over prior amplifiers. Additionally, circuits presented allow for improved rise time and insensitivity to temperature variations.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: September 20, 2005
    Assignee: Linear Technology Corporation
    Inventor: Steven D. Roach
  • Patent number: 6933779
    Abstract: The present invention is related to a variable gain low noise amplifier that optimizes input matching, gain and noise characteristics, and linearity. The variable gain low noise amplifier according to an embodiment of the present invention includes a first amplifying cell that operates in a high gain mode, a second amplifying cell that operates in a low gain mode, a selectively matching circuit, and a first short-circuit means. The variable gain low noise amplifier according to the present invention selects the best operation in each gain mode so that the circuit operated in high and low gain modes does not affect a load of another circuit.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: August 23, 2005
    Assignee: Integrant Technologies Inc.
    Inventors: Kwyro Lee, Tae Wook Kim
  • Patent number: 6903612
    Abstract: A tunable low noise amplifier matching circuit is provided. The matching circuit includes a ferroelectric tunable component. A control signal is applied to the tunable component, changing the component's impedance. This changes the impedance or the noise figure response, or both, of the matching circuit.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: June 7, 2005
    Assignee: Kyocera Wireless Corp.
    Inventors: Stanley S. Toncich, Tim Forrester
  • Patent number: 6859097
    Abstract: A radio frequency feedback amplifier circuit of high linearity within the range of frequencies with which the circuit is to be used includes a high gain amplifier incorporating a bandpass filter in the form of a single resonator which may be tunable, connected in the forward path of the amplifier stage and tuned so that its resonant frequency is at substantially the signal frequency, and a linear passive feedback circuit. A tuning arrangement (64, 65, 66, 67) includes phase detection elements (66), such as a Gilbert cell, for determining the phase shift across the resonator (62) and for adjusting a variable capacitance (64, 65) within the resonator (62) to tune the resonant circuit, in dependence on the frequency of the input to the circuit. Such an amplifier circuit may be used to achieve high linearity and stability at reasonable manufacturing cost, with much greater simplicity than can be achieved using other feedback techniques.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: February 22, 2005
    Inventor: Stephen Anthony Gerard Chandler
  • Patent number: 6859104
    Abstract: A power amplifier matching circuit is provided. The matching circuit includes a ferro-electric tunable component. A control signal is applied to the tunable component, changing the component's impedance. This changes the impedance of the matching circuit.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: February 22, 2005
    Assignee: Kyocera Wireless Corp.
    Inventors: Stanley S. Toncich, Tim Forrester
  • Patent number: 6853249
    Abstract: A method and apparatus for calibrating a Gm cell using a Gm replica cell. A digital to analog converter receives a Gm setting code and generates a reference current. The Gm replica cell adjusts the tuning voltage until the difference between a pair of drain currents is substantially equal to the reference current. Where this condition is satisfied, the proper tuning voltage has been acquired. This results in proper calibration for the tuning voltage, which then may be utilized by a Gm cell connected with the Gm replica cell.
    Type: Grant
    Filed: January 9, 2004
    Date of Patent: February 8, 2005
    Assignee: Infineon Technologies AG
    Inventor: Sasan Cyrusian
  • Patent number: 6838944
    Abstract: An electrically tunable radio frequency (RF) amplifier includes a resonant circuit having a voltage variable capacitance as one of its elements. In one approach, a drain diffusion capacitance of one of the transistors within the amplifier is used as the voltage variable capacitance. A voltage adjustment unit is provided to adjust a bias voltage on the voltage variable capacitance to change the capacitance value thereof and thus modify the operating frequency range of the amplifier. In one embodiment, the voltage adjustment unit also provides a power supply noise blocking function.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: January 4, 2005
    Assignee: Intel Corporation
    Inventor: Luiz M. Franca-Neto
  • Patent number: 6809594
    Abstract: A low noise amplifier (LNA) for amplifying an input signal communicated over a transmission line having an impedance. The LNA includes a current sensing amplifier having an input to connect to the transmission line. The current sensing amplifier has an input impedance that matches the transmission line impedance. The current sensing amplifier amplifies the input signal to generate a first output signal. A voltage sensing amplifier receives the input signal and generates a second output signal. A combiner combines the first output signal and the second output signal to generate an LNA output signal.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: October 26, 2004
    Assignee: Marvell International, Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 6806776
    Abstract: A transconductor tuning circuit for controlling transconductance of a transconductor. The tuning circuit includes a first MOS (Metal-Oxide Semiconductor) transistor. A source terminal of the first MOS transistor is connected to a power source. A gate terminal and a drain terminal of the first MOS transistor being connected to each other. A gate terminal and a drain terminal of a second MOS transistor being connected. A first input terminal of a first error amplifier is connected to the gate terminal of the first MOS transistor. A second input terminal of the first error amplifier is connected to the gate terminal of the second MOS transistor. The first error amplifier outputs an output signal in form of a bias signal for controlling tuning of the transconductor.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: October 19, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-won Lee, Gea-ok Cho, Jung-eun Lee
  • Patent number: 6803824
    Abstract: A method and apparatus for a variable gain cascode amplifier (or attenuator) is disclosed. Embodiments provide for a compensated input impedance. A gain/impedance controller compensates input impedance corresponding to gain adjustments.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: October 12, 2004
    Assignee: Anadigics, Inc.
    Inventors: Hamid Reza Rategh, Payman Hosseinzadeh Shanjani, Ngar Loong Alan Chan, Mehdi Frederik Soltan
  • Publication number: 20040174220
    Abstract: A power amplifier matching circuit is provided. The matching circuit includes a ferro-electric tunable component. A control signal is applied to the tunable component, changing the component's impedance. This changes the impedance of the matching circuit.
    Type: Application
    Filed: March 15, 2004
    Publication date: September 9, 2004
    Inventors: Stanley S. Toncich, Tim Forrester
  • Publication number: 20040164806
    Abstract: An amplifier circuit for AM broadcasting for amplifying an inputted AM broadcast signal by an FET and outputting it. The amplifier circuit comprises FETs for signal amplification which are P-channel MOSFETs (4, 5) of relatively small flicker noise. While suppressing the flicker noise to a lowest possible level, more circuits including the RF amplifier for AM broadcasting can be integrated on one chip, thereby realizing small size and low noise of the circuits.
    Type: Application
    Filed: February 25, 2004
    Publication date: August 26, 2004
    Applicant: NIIGATA SEIMITSU CO., LTD.
    Inventors: Takeshi Ikeda, Hiroshi Miyagi
  • Patent number: 6778020
    Abstract: A resonance circuit of a transmission line and a capacitor is connected to the base circuit of a transistor. The transmission line is shorter than one-quarter wavelength to make the resonant frequency of the resonant circuit higher than the frequency of a second harmonic. As a result, the angle of the reflection coefficient of the second harmonic when an input matching circuit side is viewed from the input terminal of the transistor ranges from 170° to 270° on a polar chart, and phase difference between the fundamental wave of the base current and the second harmonic decreases.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: August 17, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Ohta, Shingo Matsuda, Akira Inoue, Seiki Goto
  • Patent number: 6753736
    Abstract: An amplifier circuit for AM broadcasting for amplifying an inputted AM broadcast signal by an FET and outputting it. The amplifier circuit comprises FETs for signal amplification which are P-channel MOSFETs (4, 5) of relatively small flicker noise. While suppressing the flicker noise to a lowest possible level, more circuits including the RF amplifier for AM broadcasting can be integrated on one chip, thereby realizing small size and low noise of the circuits.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: June 22, 2004
    Assignee: Niigata Seimitsu Co., Ltd.
    Inventors: Takeshi Ikeda, Hiroshi Miyagi
  • Publication number: 20040113702
    Abstract: A tuner circuit includes a variable attenuator circuit including a PIN diode, disposed upstream of a variable-gain amplifier circuit and controlled according to the same AGC voltage used to control the variable-gain amplifier circuit. The operations of the variable-gain amplifier circuit and the variable attenuator circuit in relation to the AGC voltage are set such that when an input RF signal is at a maximum assumed level, a direct current that flows through the PIN diode will be less than a value of a direct current that maximizes intermodulation distortion.
    Type: Application
    Filed: November 13, 2003
    Publication date: June 17, 2004
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Sadao Kotera, Hiroshi Taniguchi
  • Publication number: 20040100330
    Abstract: A radio frequency feedback amplifier circuit of high linearity within the range of frequencies with which the circuit is to be used includes a high gain amplifier incorporating a bandpass filter in the form of a single resonator which may be tunable, connected in the forward path of the amplifier stage and tuned so that its resonant frequency is at substantially the signal frequency, and a linear passive feedback circuit. A tuning arrangement (64, 65, 66, 67) includes phase detection elements (66), such as a Gilbert cell, for determining the phase shift across the resonator (62) and for adjusting a variable capacitance (64, 65) within the resonator (62) to tune the resonant circuit, in dependence on the frequency of the input to the circuit. Such an amplifier circuit may be used to achieve high linearity and stability at reasonable manufacturing cost, with much greater simplicity than can be achieved using other feedback techniques.
    Type: Application
    Filed: November 18, 2002
    Publication date: May 27, 2004
    Inventor: Stephen Anthony Gerard Chandler
  • Patent number: 6737919
    Abstract: A method and apparatus for calibrating a Gm cell using a Gm replica cell. A digital to analog converter receives a Gm setting code and generates a reference current. The Gm replica cell adjusts the tuning voltage until the difference between a pair of drain currents is substantially equal to the reference current. Where this condition is satisfied, the proper tuning voltage has been acquired. This results in proper calibration for the tuning voltage, which then may be utilized by a Gm cell connected with the Gm replica cell.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: May 18, 2004
    Assignee: Infineon Technologies North America Corp.
    Inventor: Sasan Cyrusian
  • Publication number: 20040085136
    Abstract: Apparatus for providing a controllable impedance at a reference plane in a circuit comprises a unidirectional transmission line loop having first and second input/output terminals. The first input/output terminal is connected to the reference plane and an amplifier is located in the transmission line loop to amplify signals passing in a direction from the second input/output terminal to the first input/output terminal. A variable tuned circuit couples the second input/output terminal to a terminating device.
    Type: Application
    Filed: September 4, 2003
    Publication date: May 6, 2004
    Applicant: Agilent Technologies, Inc.
    Inventor: Jan Verspecht
  • Patent number: 6727761
    Abstract: Base ballast resistors used to control thermal runaway are each bypassed with a series-resonant inductor and capacitor pair. In some embodiments each inductor and capacitor pair is unique. In other embodiments a common inductor is used for each inductor and capacitor pair.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: April 27, 2004
    Assignee: TriQuint Semiconductor, Inc.
    Inventor: Thomas R. Apel