Combined With Automatic Amplifier Disabling Switch Means Patents (Class 330/51)
  • Patent number: 12107548
    Abstract: An amplifier circuit includes an input terminal used to receive an input signal, an output terminal used to output an output signal, an amplification unit, and a phase adjustment unit. The amplification unit includes an input terminal coupled to the input terminal of the amplifier circuit, an output terminal coupled to the output terminal of the amplifier circuit, a first terminal coupled to a first voltage terminal, and a second terminal coupled to a second voltage terminal. The phase adjustment unit is coupled to the amplification unit. When the amplifier circuit is operated in a first mode, the output signal has a first phase, and when the amplifier circuit is operated in a second mode, the output signal has a second phase. A difference between the first phase and the second phase is within a predetermined range.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: October 1, 2024
    Assignee: RichWave Technology Corp.
    Inventors: Pin-Yi Huang, Chih-Sheng Chen, Ching-Wen Hsu
  • Patent number: 12101065
    Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
    Type: Grant
    Filed: October 23, 2023
    Date of Patent: September 24, 2024
    Assignee: pSemi Corporation
    Inventors: Miles Sanner, Emre Ayranci, Parvez Daruwalla
  • Patent number: 12101612
    Abstract: A smart speaker power controller may be configured to receive power conforming to one of a plurality of power modes from an input power source. The power controller may be further configured to communicate the power mode to at least one component of a processing system or at least one component of an audio system for operating the smart speaker according to the received power mode, including determining a current limit of a power converter; determining a shutdown voltage threshold and safely shutting down the smart speaker if the input voltage falls below the threshold, and/or modifying audio operation of the smart speaker in response to the power mode. The smart speaker can further include an audio power supply controller configured to monitor energy required to reproduce an audio signal and to servo a power supply voltage provided to an audio amplifier in response to this energy level.
    Type: Grant
    Filed: December 11, 2023
    Date of Patent: September 24, 2024
    Assignee: Apple Inc.
    Inventors: Zhigang Dang, Daniel Naito, Evan Thompson, Peter Poon, Manasi Lagare, Michael Nussbaum, David Sumberg
  • Patent number: 12074573
    Abstract: Multi-mode broadband low noise amplifiers (LNAs) are disclosed herein. In certain embodiments, an LNA includes a first amplification stage and a second amplification stage having a lower gain than the first amplification stage. The LNA is operable in a plurality of operating modes including a first mode in which the first amplification stage and the second amplification stage operate in a cascade to amplify a radio frequency (RF) receive signal, and a second mode in which the first amplification stage amplifies the RF receive signal and the second amplification stage is bypassed.
    Type: Grant
    Filed: October 6, 2023
    Date of Patent: August 27, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Aravind Kumar Padyana, Rimal Deep Singh, Junhyung Lee, Bipul Agarwal
  • Patent number: 12034419
    Abstract: RF transistor amplifiers include an RF transistor amplifier die having a semiconductor layer structure, a coupling element on an upper surface of the semiconductor layer structure, and an interconnect structure on an upper surface of the coupling element so that the RF transistor amplifier die and the interconnect structure are in a stacked arrangement. The coupling element includes a first shielded transmission line structure.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: July 9, 2024
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: Kwangmo Chris Lim, Basim Noori, Qianli Mu, Marvin Marbell, Scott Sheppard, Alexander Komposch
  • Patent number: 12021495
    Abstract: Disclosed herein are signal amplifiers that include a plurality of switchable amplifier architectures so that particular gain modes can use dedicated amplifier architectures to provide desired characteristics for those gain modes, such as low noise figure or high linearity. The disclosed signal amplifier architectures provide tailored impedances using a degeneration block or matrix without using switches in the degeneration switching block. The disclosed signal amplifier architectures provide a plurality of gain modes where different gain modes use different paths through the amplifier architecture. Switches that are used to select the path through the amplifier architecture also provide targeted impedances in a degeneration block or matrix. The switches that select the gain path are provided in the amplifier architecture and are thus not needed or used in the degeneration block, thereby reducing the size of the package for the amplifier architecture.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: June 25, 2024
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Yan Yan, Bumkyum Kim, Aravind Kumar Padyana, Joshua Haeseok Cho, Rimal Deep Singh, Bipul Agarwal
  • Patent number: 11996811
    Abstract: A power amplifier circuit includes a first amplifier; a first transformer including a first primary coil connected to an output of the first amplifier and a first secondary coil electromagnetically coupled to the first primary coil; a second amplifier connected to one end of the first secondary coil; a third amplifier connected to another end of the first secondary coil; a second transformer including a second primary coil having one end connected to an output of the second amplifier and another end connected to an output of the third amplifier, and a second secondary coil electromagnetically coupled to the second primary coil; a first capacitance element provided between the second secondary coil and a ground; and a second capacitance element having one end connected to one end of the second secondary coil and another end connected to another end of the second secondary coil.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: May 28, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masafumi Kazuno
  • Patent number: 11990876
    Abstract: A transceiver interface circuit, comprising a driver amplifier (DA), a load line impedance modulation circuit coupled to the DA; and multiple selectable output ports coupled to the load line impedance modulation circuit, an impedance presented by the load line impedance modulation circuit being adjustable dependent on at least a number of output ports coupled to the load line impedance modulation circuit.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: May 21, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Yung-Chung Lo, Hyejeong Song, Bhushan Shanti Asuri, Sahar Nozari
  • Patent number: 11973474
    Abstract: The disclosed technology includes device, systems, techniques, and methods for amplifying a complex modulated signal with a broadband power amplifier. A broadband power amplifier may include an input network connected a long an input signal path, a driver stage, an interstage matching network stage, a power amplification stage, and a broadband matching output network. The broadband matching output network may include two coupled transmission lines and a compensation line connected between the two coupled transmission lines. Further, the broadband matching output network may include a capacitor connected with a secondary winding and a capacitor connected to each of the primary windings. The disclosed technology further includes transmission systems incorporating the broadband power amplifier.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: April 30, 2024
    Assignee: Georgia Tech Research Corporation
    Inventors: Fei Wang, Hua Wang
  • Patent number: 11929717
    Abstract: An output stage of an operational amplifier includes a low voltage (LV) metal oxide semiconductor (MOS) device and a dynamic current limit circuit. An output current of the operational amplifier flows through the LV MOS device. The dynamic current limit circuit is configured to sense a drain voltage of the LV MOS device and increase a clamping voltage for the LV MOS device when the drain voltage of the LV MOS device is less than a threshold voltage.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: March 12, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mahadevan Shankara Venkiteswaran, Arun Singh, Jofin Vadakkeparasseril Joseph
  • Patent number: 11909366
    Abstract: Various technologies described herein pertain to variable gain amplification for a sensor application. A multistage variable gain amplifier system provides variable gain amplification of an input signal. The multistage variable gain amplifier system includes a plurality of amplification stages. The multistage variable gain amplifier system further includes a power detector configured to detect a power level of an input signal received by the multistage variable gain amplifier system. The multistage variable gain amplifier system also includes a controller configured to control the amplification stages based on the power level of the input signal. The multistage variable gain amplifier system can output an output signal such that the amplification stages are controlled to adjust a gain applied to the input signal by the multistage variable gain amplifier system to output the output signal.
    Type: Grant
    Filed: December 19, 2021
    Date of Patent: February 20, 2024
    Assignee: GM CRUISE HOLDINGS LLC
    Inventors: Kamel Benboudjema, Richard Kalantar Ohanian, Aram Garibyan, Abdelkrim El Amili, Scott Singer
  • Patent number: 11870399
    Abstract: A receiver for cancelling common mode offset and crosstalk that amplifies a voltage difference between an input signal and a reference voltage to generate first and second output signals and an internal signal, that generates the same third and fourth output signals as the first and second output signals, generates average voltage levels of the third and fourth output signals by using first and second switching elements and low pass filters to output the average voltage levels as first and second feedback signals, and cancels a common mode offset between the first output signal and the second output signal based on a voltage difference between the first feedback signal and the second feedback signal, and that generates a control signal to cancel crosstalk of the internal signal by turning on/off the first and second switching elements connected to the low pass filters.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: January 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seunghwan Hong, Youngsoo Sohn, Jeongdon Ihm, Changhyun Bae, Yoochang Sung
  • Patent number: 11855672
    Abstract: A converged device with dual RFPA technology for a dynamic switchable mode. One example provides a communication device comprising a RF transmitter system and a controller. The RF transmitter system includes a plurality of RFPAs, each RFPA having a biasing system and outputting an output signal, and a summing junction, wherein the output signal of each RFPA are combined to form an output RF transmitter signal. The controller is configured to control the biasing state of each biasing system to a nominal bias state for a first mode of the communication device. The controller is configured to control a first plurality of offset voltages applied to each biasing system for a second mode of the communication device. The controller is configured to control a second plurality of offset voltages applied to each biasing system for a third mode of the communication device.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: December 26, 2023
    Assignee: MOTOROLA SOLUTIONS, INC.
    Inventors: Wai Mun Lee, Hui Boon Chua, Alexander Oon, Kee Sin Thong, Soon Leng Yap
  • Patent number: 11831280
    Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: November 28, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Miles Sanner, Emre Ayranci, Parvez Daruwalla
  • Patent number: 11824391
    Abstract: A device includes an amplifier having inverting and non-inverting inputs and an output. The device includes a capacitor coupled to a first node and to ground, a resistor coupled to the first node and the amplifier output, and a first switch coupled to the first node and a current sink, which is coupled to ground. The device includes AND gate having inputs and an output coupled to control terminal of first switch. The device includes a first comparator having non-inverting and inverting inputs and an output coupled to an AND gate input; a second comparator having a non-inverting input coupled to the amplifier output, an inverting input coupled to a transistor stack, and an output coupled to an AND gate input; and a second switch coupled to the transistor stack and to a current source, the second switch having a control terminal coupled to the first comparator output.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: November 21, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hakan Oner, Kevin Scoones
  • Patent number: 11811368
    Abstract: A power amplifier circuit includes a first amplification path including a first power amplifier, a second amplification path including a second power amplifier, a first switching circuit configured to electrically connect either the first amplification path or the second amplification path and a first output terminal to each other, a second switching circuit configured to electrically connect an input terminal and any one of a plurality of second output terminals to each other, and a matching circuit configured to electrically connect the first output terminal and the input terminal to each other and achieve impedance matching between the first output terminal and the input terminal.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: November 7, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Goto, Tomoaki Sato, Hisanori Namie
  • Patent number: 11765668
    Abstract: Apparatuses, systems, and methods for providing maximum transmit power control when utilizing multiple radio access technologies. For example, a wireless communication device comprising two cellular radios may intend to transmit on the first radio, while concurrently transmitting on the second radio. To ensure compliance with a maximum transmit power limitation, the device may determine an allowed transmit power level of the first radio, representing a difference between the maximum transmit power limitation and the current transmit power level being transmitted by the second radio. The device may also determine a threshold power level for a communication by the first radio. If the allowed transmit power level meets the threshold power level, then the device may transmit the first communication having a power level between the threshold power level and the allowed transmit power level. Otherwise, the device may forego transmission of the first communication.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: September 19, 2023
    Assignee: Apple Inc.
    Inventors: Haitong Sun, Johnson O. Sebeni, Zhu Ji, Dawei Zhang, Wei Zhang, Yuchul Kim, Tianyan Pu, Pengkai Zhao, Wei Zeng, Jia Tang, Ping Wang, Wanping Zhang, Yang Li
  • Patent number: 11750153
    Abstract: A high-frequency circuit includes an amplifier, a power distributor disposed on an output route of the amplifier, a first by-pass route that bypasses the amplifier, a second by-pass route that bypasses the power distributor, a first switch and a second switch disposed in series on the first by-pass route, and a third switch disposed in series on the second by-pass route. The first by-pass route is connected to a first node on a route connecting a signal input terminal and the amplifier and a second node on a route connecting the amplifier and the power distributor. The second by-pass route is connected to a third node between the first switch and the second switch and a fourth node on an output route of the power distributor.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: September 5, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masamichi Tokuda
  • Patent number: 11750992
    Abstract: A switching amplifier includes: a driver circuit with differential inputs and differential outputs; and a fault detection circuit coupled to the differential outputs. The fault detection circuit includes: a power supply input; and a sense circuit coupled to the differential outputs. The sense circuit includes: a first resistor between the power supply input and a positive output of the differential outputs; a second resistor between the positive output and ground; a third resistor between the power supply input and a negative output of the differential outputs; and a fourth resistor between the negative output and ground. The fault detection circuit also includes an analyzer circuit coupled to the sense circuit and configured to determine a fault location relative to the differential outputs based on an output of the sense circuit.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: September 5, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Venkata Ramanan Ramamurthy, Mohit Chawla
  • Patent number: 11728775
    Abstract: Envelope tracking systems for power amplifiers are provided herein. In certain embodiments, an envelope tracker system includes a first power amplifier that amplifies a first radio frequency (RF) signal and receives power from a first supply voltage, a second power amplifier that amplifies a second RF signal and receives power from a second supply voltage, and an envelope tracker including a first modulator that generates a first output current based on an envelope of the first RF signal and a plurality of regulated voltages, a second modulator that generates a second output current based on an envelope of the second RF signal and the regulated voltages, a first combiner that combines a first DC voltage with the first output current to generate the first supply voltage, and a second combiner that combines a second DC voltage with the second output current to generate the second supply voltage.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: August 15, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Serge Francois Drogi, Florinel G. Balteanu, David Richard Pehlke
  • Patent number: 11676529
    Abstract: Methods and apparatus for in-pixel driving of micro-light-emitting diodes are disclosed. An example light-emitting diode driver includes a first input node to receive a data signal, a second input node to receive a reference signal having a first frequency, and a driver circuit including thin-film transistors to output a current pulse for driving a light-emitting diode, the current pulse having a width based on the data signal and the reference signal, the output signal having a second frequency that is greater than the first frequency.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: June 13, 2023
    Assignee: INTEL CORPORATION
    Inventor: Khaled Ahmed
  • Patent number: 11646703
    Abstract: Methods and devices to implement efficiently an AUX terminal in RF front end receivers using LNAs are described. The described methods implement a smaller number of switches resulting in an overall performance improvement by reducing the noise figure at the input of the LNA. The presented devices can be used in low/high gain and bypass modes and can accommodate an arbitrary number of bands over a wide frequency range.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: May 9, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Rong Jiang, Khushali Shah
  • Patent number: 11616475
    Abstract: Circuits and methods for improving the noise figure (NF) of an amplifier, particularly an LNA, in high-gain modes while improving the IIP3 of the amplifier in low-gain modes. The source of an amplifier common-source FET is coupled to circuit ground thorough a degeneration circuit comprising a two-port inductor and a bypass switch coupled in parallel with the inductor. A switched feedback circuit is coupled between the gate of the common-source FET and a feedback node in the amplifier output signal path. During a low gain mode, the inductor is entirely bypassed and the enabled feedback circuit lowers the input impedance of the common-source FET and reduces the gain of the amplifier circuit, essentially eliminating the need for a degeneration inductor. During a high gain mode, the source of the common-source FET is coupled to circuit ground through the inductor and the feedback circuit is disabled. Other gain modes are supported.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: March 28, 2023
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah, Ravindranath D. Shrivastava, Parvez Daruwalla
  • Patent number: 11606109
    Abstract: In many examples, a device comprises a transmitter. The transmitter comprises a power amplifier, a first transformer coil coupled to the power amplifier, and a second transformer coil adapted to be electromagnetically coupled to the first transformer coil. The transmitter also comprises a first bond wire coupled to a first end of the second transformer coil and adapted to be coupled to a first end of an antenna, a capacitor coupled to a second end of the second transformer coil, a switch coupled to the capacitor and configured to engage and disengage the capacitor from the transmitter, and a second bond wire coupled to the switch and adapted to be coupled to a second end of the antenna.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: March 14, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Rohit Chatterjee
  • Patent number: 11581861
    Abstract: An operational amplifier includes a first differential input pair, a first switch and a second switch. The first differential input pair includes a first input transistor and a second input transistor. The first input transistor has a gate terminal coupled to an output terminal of the operational amplifier. The second input transistor has a gate terminal. The first switch is coupled between the gate terminal of the first input transistor and the gate terminal of the second input transistor. The second switch is coupled between a first input terminal of the operational amplifier and the gate terminal of the second input transistor.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: February 14, 2023
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Ying-Hsiang Wang, Tsung-Hau Chang, Jung-Hsing Liao
  • Patent number: 11509271
    Abstract: A power amplifier module includes an output-stage amplifier, a driver-stage amplifier, an input switch, an output switch, an input matching circuit, an inter-stage matching circuit, an output matching circuit, and a control circuit. The input switch selectively connects one of a plurality of input signal paths to an input terminal of the driver-stage amplifier. The output switch selectively connects one of a plurality of output signal paths to an output terminal of the output-stage amplifier. The control circuit controls operations of the driver-stage amplifier and the output-stage amplifier. The input switch, the output switch, and the control circuit are integrated into an IC chip. The control circuit is disposed between the input switch and the output switch.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: November 22, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hiroshi Okabe
  • Patent number: 11482977
    Abstract: An amplifier circuit structure can include an amplifier located in a main path, and a first switch located in a bypass. One end of a second switch is a signal output end of the amplifier circuit structure, and the other end of the second switch is configured to selectively connect to a signal output end of the bypass or a signal output end of the main path. The first and second switches are configured to control their respective operating states when a first instruction is received, such that the main path is connected to the signal input end and the signal output end of the amplifier circuit structure; and to control their respective operating states when a second instruction is received, such that the bypass is connected to the signal input end of the amplifier circuit structure and the signal output end of the amplifier circuit structure.
    Type: Grant
    Filed: December 12, 2020
    Date of Patent: October 25, 2022
    Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
    Inventors: Yaohua Zheng, Ping Li, Minjun He
  • Patent number: 11476807
    Abstract: A power amplifier module includes a first amplifier circuit that amplifies a radio frequency signal with a first gain corresponding to a first control signal to generate a first amplified signal; a second amplifier circuit that amplifies the first amplified signal with a second gain corresponding to a second control signal to generate a second amplified signal; and a control unit that generates the first control signal and the second control signal. The second control signal is a control signal for increasing a power-supply voltage for the second amplifier circuit as a peak-to-average power ratio of the radio frequency signal increases. The first control signal is a control signal for controlling the first gain of the first amplifier circuit so that a variation in the second gain involved in a variation in the power-supply voltage for the second amplifier circuit is compensated for.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: October 18, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shigeki Koya, Takayuki Tsutsui, Yasunari Umemoto, Isao Obu, Satoshi Tanaka
  • Patent number: 11444458
    Abstract: Disclosed is a device for supplying power to an electronic computer having a first connection terminal coupled to a power supply, a second connection terminal coupled to an electrical ground, a microprocessor having a microprocessor supply input coupled, firstly, to a first terminal of first capacitance of a first capacitor and, secondly, coupled to a supply output of the power supply device, the second terminal of first capacitance being coupled to the electrical ground, the power supply device has a first supply input. It has a diode coupled to the supply input, and to the supply output, and a switching device coupled in parallel with the diode.
    Type: Grant
    Filed: October 8, 2018
    Date of Patent: September 13, 2022
    Assignees: CONTINENTAL AUTOMOTIVE FRANCE, CONTINENTAL AUTOMOTIVE GMBH
    Inventor: Philippe Boissiere
  • Patent number: 11437965
    Abstract: A variable gain amplifier according to an embodiment comprises a first path, a matching circuit, an amplifier circuit, a second path, and a third path. The first path includes an attenuation circuit, has one end connected to a first input terminal, and attenuates an input signal and outputs an attenuated signal. The matching circuit has one end connected to the other end of the first path. The amplifier circuit has an input connected to the other end of the matching circuit and an output connected to a first output terminal, and amplifies an input signal. The second path is connected in parallel to the first path. The third path has one end connected to the first input terminal, and the other end connected to the first output terminal.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: September 6, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Shinji Ohno, Toshifumi Ishimori
  • Patent number: 11431301
    Abstract: Circuit and methods using a single low-noise amplifier (LNA) to provide amplification for a wide band of RF frequencies while maintaining high gain and a low noise factor. Embodiments include an amplifier circuit including an input signal path for receiving a wideband RF signal; a switched inductor tuning block coupled to the input signal path and configured to selectively couple one of a plurality of inductances to the input signal path; and an amplifier coupled to the switched inductor tuning block and configured to receive the RF signal after passage through the selected coupled inductance. The switched inductor tuning block includes a plurality of selectable branches, each including an RF input switch; an RF output switch; an inductor coupled between the RF input switch and the RF output switch; and first and second shunt switches coupled between a respective terminal of the inductor and circuit ground.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: August 30, 2022
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah
  • Patent number: 11431298
    Abstract: An apparatus that generates and limits a bias current of a power amplifier is provided. The apparatus includes a bias current circuit that generates a bias current to bias the power amplifier, and critically limit an increase in bias current, and a band gap reference circuit that provides a reference voltage or a reference current to the bias current circuit. The bias current circuit is configured to critically limit the increase in bias current, as a first bias transistor that generates the bias current is converted from a triode region to a saturation region, based on the reference voltage or the reference current.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: August 30, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong Ok Ha, Iizuka Shinichi, Kwang Du Lee, Jeong Hoon Kim, Young Wong Jang
  • Patent number: 11418884
    Abstract: Embodiments of the present disclosure provide an audio processing apparatus, and an audio crosstalk processing method and apparatus. The audio processing apparatus includes: an audio processing chip, a control switch and an audio output interface. The audio processing chip includes a first power amplifier and a second power amplifier; wherein the first power amplifier is configured to output a left channel signal; the second power amplifier is configured to output a right channel signal; and the control switch is coupled with a common negative terminal of the first power amplifier and the second power amplifier, and is configured to feed back a reference feedback signal to the common negative terminal, and connect a headphone ground signal of the audio output interface with a main board ground, the reference feedback signal is obtained by performing voltage sampling on the headphone ground signal.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: August 16, 2022
    Assignee: ZTE Corporation
    Inventor: Shaochen Guo
  • Patent number: 11366187
    Abstract: A multi-channel RF transmit system (1) especially for use in a magnetic resonance examination system comprising, a plurality of RF channels (18, 19) wherein each of the RF channels (18, 19) has an RF amplifier. The multi-channel RF transmit system (1) further comprises a power supply device (2) configured to supply power to the amplifiers (4, 5), a first capacitor bank (6), wherein the first capacitor bank (6) is connected to the power supply device (2) and connected to a first RF amplifier (4), a second capacitor bank (7), wherein the second capacitor bank (7) is connected to the power supply device (2) and connected to a second RF amplifier (5) and a third capacitor bank (8) also connected to the power supply device (2). The third capacitor bank (8) is connected to a DC switch (9), wherein the DC switch (9) is configured to switch the power supplied by the third capacitor bank (8) to the first amplifier (4) or the second amplifier (5).
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: June 21, 2022
    Assignee: Koninklijke Philips N.V.
    Inventors: Peter Vernickel, Christoph Leussler
  • Patent number: 11356063
    Abstract: Amplification device and processes capable of miniaturization in a device for performing linear amplification and switching amplification operations on incoming signals are provided. The amplifying device includes a first amplifying unit for amplifying an input signal and outputting a first output signal, the input switch unit connected in parallel with the first amplifying unit for performing a switching operation by an input signal and outputting a switch output signal, and a second amplifying unit for amplifying a first output signal or a switch output signal and outputting a second output signal, and the first amplifying unit or the input switch unit operates based on the type of the input signal.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: June 7, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takuya Ito, Tomoumi Yagasaki
  • Patent number: 11309847
    Abstract: An amplifier circuit has an amplification path including an amplifier and a bypass path configured to bypass at least the amplifier. The bypass path includes a switch coupled in series on the bypass path and another switch coupled in series between the bypass path and ground. The amplification path further includes an inductor coupled on an output side with respect to the amplifier and a switch coupled between the inductor and ground on a path between the inductor and the amplifier.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: April 19, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Ken Wakaki
  • Patent number: 11290076
    Abstract: An amplifier circuit includes a first terminal and a second terminal, an amplifier disposed in a first path connecting the first terminal and the second terminal, a first switch circuit disposed in the first path between the amplifier and the second terminal, an attenuator disposed in the first path between the amplifier and the first switch circuit, and a second switch circuit disposed in a second path that is connected to the first terminal and the second terminal while bypassing the amplifier, the attenuator, and the first switch circuit.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: March 29, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Nobuyasu Beppu
  • Patent number: 11288992
    Abstract: A display driving circuit includes a gamma generator configured to output, to nodes, gamma voltages having different voltage levels, and a selector configured to select one of the nodes to which the gamma voltages are output, and output a voltage of the selected one of the nodes. The display driving circuit further includes a voltage regulator configured to selectively input a first current to the selected one of the nodes and output a second current from the selected one of the nodes, based on the voltage of the selected one of the nodes, to adjust a voltage level of the voltage of the selected one of the nodes to a voltage level of a respective one of the gamma voltages that is output to the selected one of the nodes.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: March 29, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Ho Lee, Jinwoo Kim, Yongjoo Song
  • Patent number: 11283413
    Abstract: An amplification circuit includes a filter circuit, an amplifier, a capacitor, a bypass line, and a switch circuit that includes a first FET and a second FET connected in series between one end and the other end of the bypass line, a first resistance element connected in series to a gate of the first FET, and a second resistance element connected in series to a gate of the second FET. A first control signal is supplied to the gate of the first FET. A second control signal is supplied to the gate of the second FET. A product of a gate length and a gate width of the first FET and a resistance value of the first resistance element is smaller than a product of a gate length and a gate width of the second FET and a resistance value of the second resistance element.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: March 22, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Daisuke Watanabe, Takayuki Tomita
  • Patent number: 11283416
    Abstract: Systems and methods are provided herein that include an amplifier arrangement and a balun arrangement that accommodate two or more frequency bands using various common components that are operated and/or coupled in differing ways based upon which frequency band is in operation.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: March 22, 2022
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Yuan Cao, Yu-Jui Lin, Bo Pan
  • Patent number: 11272133
    Abstract: Multi-stage auto-zeroing signal amplifiers are deployed within event-shuttering pixels of a quanta image sensor (QIS) pixel array to enable reliable per-pixel reporting of photonic events, down to resolution of a single photon strike, for each of a continuous sequence of sub-microsecond event-detection intervals.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: March 8, 2022
    Assignee: Gigajot Technology, Inc.
    Inventors: Dexue Zhang, Saleh Masoodian, Jiaju Ma
  • Patent number: 11245371
    Abstract: An electronic device including an amplifier which includes a first transistor configured to receive an input signal through a gate terminal thereof and having a source terminal electrically connected to ground, a second transistor configured to transmit an output signal through a drain terminal thereof and having a gate terminal electrically connected to the ground, and a switch electrically connected to the gate terminal of the second transistor and configured to switch a voltage being supplied to the gate terminal of the second transistor in accordance with turn-on or turn-off of the amplifier.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: February 8, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kihyun Kim, Hyunchul Park, Kyuhwan An, Jaesik Jang, Yunsung Cho
  • Patent number: 11227930
    Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). An amplifier is provided. The amplifier includes a first resistor electrically connected to the input terminal, a second resistor electrically connected to the output terminal, a switch including a metal-oxide-semiconductor field-effect transistor (MOSFET) and electrically connected to one end of the second resistor, and a switch control processor configured to electrically connect the gate terminal of the MOSFET constituting the switch and the bulk terminal of the MOSFET constituting the switch to an impedance having an impedance value higher than a preset first threshold.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: January 18, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangmin Lee, Youngchang Yoon, Daehoon Kwon, Jaehyup Kim
  • Patent number: 11218104
    Abstract: A control method for controlling a three-phase dynamoelectric machine that has phase coils arranged in groups includes setting values of a time phase difference of electric currents to be supplied to the in-phase coils of respective groups and a time phase difference of carrier frequencies with which three-phase inverters are PWM-controlled to satisfy a predetermined relationship among the time phase difference of electric currents, the time phase difference of carrier frequencies, and a space phase difference of in-phase coils of the respective groups. The predetermined relationship is based on a result of a comparison between a current amplitude of a primary component and a current amplitude of a secondary component of a carrier harmonic current.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: January 4, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yoshihiro Miyama, Haruyuki Kometani
  • Patent number: 11201226
    Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). An amplifier is provided. The amplifier includes a first resistor electrically connected to the input terminal, a second resistor electrically connected to the output terminal, a switch including a metal-oxide-semiconductor field-effect transistor (MOSFET) and electrically connected to one end of the second resistor, and a switch control processor configured to electrically connect the gate terminal of the MOSFET constituting the switch and the bulk terminal of the MOSFET constituting the switch to an impedance having an impedance value higher than a preset first threshold.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: December 14, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangmin Lee, Youngchang Yoon, Daehoon Kwon, Jaehyup Kim
  • Patent number: 11177776
    Abstract: A bias timing control circuit includes a current source, a bias switch circuit, a duty cycle sensing circuit, and a switching control circuit. The bias switch circuit includes a first path switch, connected between an output node of the current source and a bias amplifying circuit, and a second path switch, connected between the output node of the current source and a temperature compensation circuit. The duty cycle sensing circuit is configured to generate a timing control signal based on a duty cycle of a transmission enable signal. The switching control circuit is configured to control a first turn-on time of the first path switch during an initial startup period, and a second turn-on time of the second path switch during a normal driving period subsequent to the initial startup period to adjust a warm-up time of a power amplifying circuit based on the timing control signal.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: November 16, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong Ok Ha, Byeong Hak Jo, Jeong Hoon Kim, Young Wong Jang, Shinichi Iizuka
  • Patent number: 11152907
    Abstract: An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: October 19, 2021
    Assignee: pSemi Corporation
    Inventors: Emre Ayranci, Miles Sanner
  • Patent number: 11139784
    Abstract: An example audio play circuit includes a power supply module, a power amplifier, a coupling capacitor, a load, and a plosive suppression circuit. An output terminal of the power amplifier is connected to a first terminal of the coupling capacitor and an output terminal of the plosive suppression circuit, a second terminal of the coupling capacitor is connected to the load, and an output terminal of the power supply module is connected to a power supply terminal of the power amplifier and a power supply terminal of the plosive suppression circuit. The power supply module is configured to provide a direct current power supply voltage for the power amplifier and the plosive suppression circuit. When the direct current power supply voltage rises to the first voltage threshold, the plosive suppression circuit connects the first terminal of the coupling capacitor to the ground terminal.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: October 5, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Deyang Yin, Jun Li, Ding Li, Shuai Du
  • Patent number: 11139564
    Abstract: An electronic device according to an embodiment disclosed in the present document comprises: a housing; a first antenna element placed on the housing, or at a first position inside the housing; a second antenna element placed on the housing, or at a second position inside the housing; a communication processor; and at least one communication circuit electrically connected to the first antenna element and the second antenna element, wherein the at least one communication circuit can comprise: a first RF circuit, which generates an IF signal having a first frequency, a local oscillation (LO) signal of a second frequency lower than the first frequency, and a control signal of a third frequency lower than the second frequency; a second RF circuit, which provides, to the second antenna element, an RF signal of a fourth frequency higher than the third frequency and lower than the second frequency; and a third RF circuit, which receives the IF signal from the first RF circuit, up-converts the IF signal, and provides
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: October 5, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Chul Park, Hyung Wook Kim
  • Patent number: 11128266
    Abstract: Various embodiments relate to an amplifier circuit including: a first transistor having a first and second current conducting terminals and a control terminal; a second transistor having a first and second current conducting terminals and a control terminal, in which the second current-conducting terminal of the first transistor is connected to the first current-conducting terminal of the second transistor; a first inductor with a first terminal coupled to a first current-conducting terminal of the first transistor and a second terminal coupled to an output of the amplifier circuit; a feedback circuit connected between the output and the control terminal of the second transistor, wherein the feedback circuit includes a first resistor, a second inductor, and a first capacitor; and an input of the amplifier circuit connected between the first resistor and the second inductor, wherein a second current-conducting terminal of the second transistor is connected to a first ground terminal, and wherein a control term
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: September 21, 2021
    Assignee: NXP B.V.
    Inventors: Michael Lee Fraser, Venkata Naga Koushik Malladi