Abstract: A VCO includes a reference current module and a clock signal generating module. The reference current module generates a reference current according to a reference voltage. The clock signal generating module generates a clock signal according to the reference current. The reference current module utilizes the negative feed-back mechanism to keep the generated reference current at the predetermined size without being changed with the variation of the process and the bias source.

Abstract: An integrated circuit and an apparatus are provided. The integrated circuit comprises a bias circuit, an LC resonator circuit, and a current mode logic (CML) frequency divider. The bias circuit generates first and second bias voltages. The LC resonator circuit generates an oscillation signal having an oscillation frequency. The CML frequency divider, coupled to the bias circuit and the LC resonator circuit, biased by the first and second bias voltages, receives the oscillation signal to generate an output signal having an output frequency with a fractional rate of the oscillation frequency. The oscillation signal comprises AC and DC components, the CML frequency divider receives the AC component to determine an injected frequency and reuses the DC component to provide tail currents to determine a natural frequency of the CML frequency divider. The output frequency is determined by the injected frequency and the natural frequency.

Abstract: Disclosed is an oscillator including a reference voltage generator generating a reference voltage, and a logic combination circuit generating complementary first and second internal clock signals in response to the reference voltage and complementary first and second output voltages. One of the first and second output voltages—the one going high—is provided to the logic combination circuit before the other one of the first and second output voltages—the one going low.

Abstract: A reference clock circuit (170), has a low-power mode, in which the frequency consumption is reduced, and including an internal counter, accumulating time spent in low-power mode. The circuit includes a crystal resonator (60), an oscillator circuit (70), and a temperature compensation circuit (80), providing a stable clock output (85). During low-power mode temperature compensation can be switched off. The circuit further provides a wakeup signal (107) after a preset time in low-power mode.

Abstract: A VCO circuit includes: a control portion to which a first voltage is inputted and from which a second voltage corresponding to the first voltage is outputted; a current source portion to which the second voltage is inputted and from which a current corresponding to the second voltage is outputted; and an oscillator circuit to which the current is inputted and from which a signal with a frequency in accordance with the current is outputted. The control portion includes an adjusting circuit which changes the second voltage in conjunction with fluctuation of a power supply voltage. Accordingly, fluctuation of the frequency Fo of an output signal of the VCO circuit can be suppressed even when the power supply voltage of the VCO circuit fluctuates.

Abstract: An oscillator device for generating an oscillator signal, includes a heater arrangement, a first switching element, a temperature sensor, signal process means, and voltage controlled oscillator; an output of the temperature sensor being connected to an input of the signal processing means, and an output of the signal processing means being connected to an input of the voltage controlled oscillator. The first switching element is arranged for receiving the oscillator signal from the voltage controlled oscillator and for providing a heater drive signal to either a first heater element or a second heater element of the heater arrangement based on the oscillator signal. The signal processing means comprise a synchronous demodulator.

Abstract: A voltage controlled oscillator circuit comprises a variable current generator to supply an operation current to a voltage controlled oscillator, the voltage controlled oscillator to include a resonance circuit having a variable capacitor and inductor, and to output an output signal having an amplitude based on a current generated by the variable current generator, and a first optimization circuit to which the output signal is inputted, the first optimization circuit generating and outputting a current setting signal based on an amplitude change of the output signal corresponding to a change of a current outputted by the variable current generator to the variable current generator.

Abstract: A low noise oscillator includes a resonator 102 that is excited with a pulsed signal (i.e., an impulse of energy) to replace energy lost to parasitic resistive losses once every Nth period (where N=1, 2, 3 . . . ). The resonating signal is monitored by a level detector and when the signal falls below a predetermined threshold, the pulse generator outputs a pulse or adjusts pulse width, pulse amplitude (or both) of a pulsed signal to create the necessary impulse for application to the resonator to recoup losses resulting from resonator operation. A phase shifting circuit may be provided to ensure the pulses are time aligned with the resonating signal to reduce noise.

Abstract: A method for compensating NCO jitter by changing a step value used to increment an accumulator in the NCO to make up for inaccuracies, or jitters. In one approach, a remainder in the accumulator may be monitored and a compensated clock close to the current edge of an ideal clock may be generated. In another approach, a compensated clock close to the next edge of the ideal clock may be generated after the current edge of the ideal clock is missed. The step value may be stored in a memory, which may be a register. A jitter compensator may include a comparator for monitoring the remainder in the accumulator or a detector for detecting whether an ideal clock has been missed. The jitter compensator may also change the step value to a step value for a faster clock to compensate jitter.

Abstract: The present invention discloses a two-step VCO calibration method. The two-step VCO calibration method, comprising power-on calibration, used to provide a coarse VCO tuning; real-time calibration, used to provide a fine VCO tuning according to the loaded result of said power-on calibration. The two-step VCO calibration method according to the present invention can cover all the variation of process and temperature and gain the advantages of shorter calibration time, smaller gain of VCO, pretty smaller size of passive loop filter and less operating power consumption.

Abstract: Described is a circuit comprising an oscillator, an amplifier unit and a control unit. The amplifier unit is coupled to the oscillator and to the control unit; and the control unit is arranged to regulate a load capacitance to the oscillator at startup.

Abstract: An object of the present invention is to provide a sensing instrument capable to detect a substance existing in a very small quantity, such as environmental pollutants, instantly with a high degree of precision. As a specific means for solving the problem, a frequency signal from a crystal oscillator is sampled using a frequency signal from a reference clock generating part, the sampling value is outputted in a digital signal, quadrature detection is conducted with the digital signal for a frequency signal corresponding to the output signal, the rotational vector rotating at a frequency corresponding to the difference between the frequency of the frequency signal and the frequency of a sinusoidal wave used for the quadrature detection is taken out, and the variation of the frequency is detected by detecting the velocity of the rotational vector based on the respective sampling values.

Abstract: A frequency stabilizing device of an oscillator is disclosed. The frequency stabilizing device of an oscillator is used for stabilizing the frequency of an oscillator to keep the frequency in constant when input voltage is changed. The frequency stabilizing device comprises a plurality of transmission gates for receiving an input voltage and generating a current and a plurality of resistors for control the value of the current, wherein the current is positive in relation to the input voltage and the frequency of the oscillator is determined by the current.

Abstract: Circuits, methods, apparatus, and code that provide low-noise and high-resolution electronic circuit tuning. An exemplary embodiment of the present invention adjusts a capacitance value by pulse-width modulating a control voltage for a switch in series with a capacitor. The pulse-width-modulated control signal can be adjusted using entry values found in a lookup table, by using analog or digital control signals, or by using other appropriate methods. The capacitance value tunes a frequency response or characteristic of an electronic circuit. The response can be made to be insensitive to conditions such as temperature, power supply voltage, or processing.

Abstract: In one exemplary implementation, an electronic apparatus includes: a reference clock source, for generating a reference clock; a global navigation satellite system (GNSS) receiver for receiving satellites signals and the reference clock, comprising: a monitoring circuit, for monitoring a status of the GNSS receiver to generate a monitoring result; and a compensating circuit, coupled to the reference clock source and the monitoring circuit, for compensating the reference clock according to the monitoring result.

Abstract: To set a best oscillation state of a voltage-controlled oscillator (VCO) circuit, it is necessary to evaluate variability of manufactured ICs to specify set values based on the variability. Provided is an oscillator including: a terminal receiving a first signal; a VCO coupled to the terminal, the VCO oscillating to generate a second signal and to change a frequency of the second signal in response to an amplitude of the first signal, and revealing gain-slope characteristics in the frequency of the second signal versus the amplitude of the first signal; and a control circuit coupled to the VCO to alter the gain-slope characteristics in response to the amplitude of the first signal, the VCO having so-called self regulating characteristics in which the VCO is locked up based on the variability of the manufactured ICs without depending on external control.

Abstract: A circuit arrangement for frequency modulation is provided, which includes a voltage-controlled oscillator having at least one varactor diode that is driven by a drive signal, wherein a capacitance of the varactor diode depends on the drive signal, includes a modulating unit that creates a modulation signal for frequency modulation of the voltage-controlled oscillator, and includes a drive unit that generates the drive signal for the at least one varactor diode from the modulation signal, wherein the drive unit generates the drive signal from the modulation signal in such a manner that a linear relationship results between the modulation signal and the capacitance of the varactor diode.

Abstract: A relaxation oscillator compensates for system delay. The relaxation oscillator includes first and second input signal units that generates first and second capacitor voltages, a delay compensation unit that receives a reference voltage and the first and second capacitor voltages and that generates a compensation voltage. In certain embodiments, a voltage generating unit applies the reference voltage to the delay compensation unit, and a latch unit stores first and second comparison signals compared by the first and second input signal units and transmits a clock signal and a inverted clock signal to the first and second input signal units. The first and second input signal units compare the first and second capacitor voltages with a compensation voltage transmitted from the delay compensation unit.

Abstract: A voltage controlled oscillator controls an oscillation frequency based on a control voltage supplied from an external control voltage terminal. The voltage controlled oscillator includes a reference bias voltage circuit and a gain adjustment circuit. The reference bias voltage circuit includes multiple serial resistances between a reference voltage and a ground. The reference bias voltage circuit controls a switch coupled in parallel to at least one of the serial resistances and thus changes a voltage dividing ratio of the serial resistances so as to set a reference bias voltage. The gain adjustment circuit adjusts a gain of the control voltage. The gain adjustment circuit includes multiple resistances and multiple switching elements. The gain adjustment circuit controls the switching elements to form a voltage dividing circuit between the reference bias voltage and the external control voltage terminal so as to generate an automatic frequency control voltage.

Abstract: Provided is a PLL oscillation circuit that can reduce the variability of modulation sensitivity of a VCO 101 and obtain a desired output amplitude quickly with high precision. An amplitude detector 103 detects an output amplitude of the VCO 101. An amplitude controller 105 controls a current value of a variable current source 109 so as to have an output amplitude of the VCO 101 detected by the amplitude detector 103 to be a desired amplitude. A LPF 108 is connected between the amplitude controller 105 and the variable current source 109. A switch 107 connects or disconnects the LPF 108 between the amplitude controller 105 and the variable current source 109. The amplitude controller 105 is connected to the variable current source 109 through either the LPF 108 or the switching switch 107.

Abstract: A noise cancellation signal is generated for a fractional-N phase-locked loop (200). A divide value is provided to a first delta sigma modulator circuit (203), which generates a divide control signal to control a divide value of a feedback divider (208) in the phase-locked loop. An error term (e) is generated that is indicative of a difference between the generated divide control signal and the divide value supplied to the first delta sigma modulator circuit. The error term is integrated in an integrator (320) to generate an integrated error term (x), where xk+1=xk+ek; and a phase error correction circuit (209) utilizes the error term ek and the integrated error term xk to generate the phase error cancellation signal.

Abstract: A PLL circuit includes a phase detector, a loop filter (LF), a voltage-controlled oscillator (VCO), and a frequency divider. The phase detector compares a phase of a signal Fs which is input from outside with a phase of a signal Fo/N which is input from the frequency divider. The loop filter generates a signal Vin by removing alternating current components from a signal input from the phase detector. The voltage-controlled oscillator outputs a signal Fo based on the signal Vin input from the loop filter. The frequency divider converts the signal Fo output from the voltage-controlled oscillator into Fo/N (frequency division by N), and outputs it to the phase detector.

Abstract: A system that includes a phase locked loop and an activation circuit; wherein the phase locked loop includes an oscillator, a frequency divider, a phase detector, a control circuit, and a memory circuit. The activation circuit is adapted to activate the memory circuit and the oscillator; to deactivate the frequency divider, the phase detector and the control circuit during deactivation periods and to activate the frequency divider, the phase detector and the control circuit during activation periods. The timing relationship between a deactivation period and an activation period is responsive to an output signal jitter limitation and to a power consumption limitation.

Abstract: A control circuit includes a phase frequency detector that receives a reference phase ?REF (signal) as an input and a feedback phase ?FBK (signal) as control feedback. A voltage controlled oscillator is in electrical communication with the phase frequency detector. The VCO provides an output and the feedback phase ?FBK (signal). An auxiliary feedback loop receives error phase ?E (signal) from each of the reference phase ?REF (signal) and the feedback phase ?FBK (signal). The auxiliary feedback loop provides an adjustment signal to the control circuit to correct for static phase offset.

Abstract: A modulator including a direct modulation synthesizer circuit, a reference frequency oscillator for providing an input reference signal to the direct modulation synthesizer circuit for locking a carrier frequency to a stable frequency and a pre-emphasis unit for data bits and for producing a modulating signal for direct modulation of the direct modulation synthesizer circuit, the modulating signal having data bit dependent voltage levels.

Abstract: In one embodiment, a voltage-controlled oscillator (VCO) is provided that includes: a plurality of differential inverter stages coupled to form a loop, each differential inverter stage having including a switched capacitor circuit configured to control a signal delay through the differential inverter stage responsive to a control circuit, whereby an output frequency for the VCO is inherently compensated against changes in semiconductor process variations and thermal variations.

Abstract: A signal generation technique is based on a reference frequency provided by a MEMS resonator. The signal generation technique compensates for temperature- and fabrication process-induced frequency variations collectively. In some embodiments, a device implementing the disclosed signal generation technique includes a fractional-N synthesizer, a temperature sensor, calibration data, and a sigma-delta modulator to adjust the reference frequency of the MEMS resonator to a desired frequency value while compensating for the temperature variation of the MEMS resonator.

Abstract: An oscillation circuit includes a cross-coupled circuit having a first active element and a second active element which are differentially connected to each other. The oscillation circuit oscillates in a resonance frequency of a resonator connected between the first active element and the second active element.

Abstract: A phase recovery circuit for avoiding noise interfering with the clock signal generated from an oscillator is disclosed. The phase recovery circuit includes a noise detector, a phase detector, and a phase locker. The noise detector detects noise and accordingly generates a noise detecting signal. The phase detector is triggered by the noise detecting signal for detecting the phase of the clock signal and accordingly generating a phase detecting signal. The phase locker locks the phase of the clock signal to a predetermined phase within a predetermined period after the occurrence of the noise detecting signal, and after the predetermined period, the phase locker releases the clock signal. In this way, the phase of the clock signal is not affected by noise.

Abstract: Device and method for temperature compensation in a clock oscillator using quartz crystals, which integrates dual crystal oscillators. The minimal power consumption is achieved through an efficient use of a processor in charge of the synchronization of the two oscillators. The invention is particularly adapted for the provision of a precise reference clock in portable radiolocalization devices.

Abstract: Techniques for voltage controlled oscillator (VCO) circuits that are independent of temperature and process variations are described herein.

Abstract: A power supply circuit includes a first voltage regulator to generate a first supply voltage for a first circuit of a phase-locked loop and a second voltage regulator to generate a second supply voltage for a second circuit of the phase-locked loop. The first and second supply voltages are independently generated by the first and second voltage regulators based on the same reference signal. The first circuit may be a charge pump and the second circuit may be a voltage-controlled oscillator. Different circuits may be supplied with the independently generated supply voltages in alternative embodiments.

Abstract: An oscillator structure has a sync signal processor with an input interface for an external clock based sync signal and an output interface for a duty cycle indication signal depending on a signal property of the sync signal and an oscillator with an input interface for the duty cycle indication signal and the sync signal and an output interface for an oscillation signal synchronized with the external clock and having a duty cycle adjusted according to the duty cycle indication signal.

Abstract: An oscillator signal stabilization method is provided for a radio transceiver, for example. In the present stabilization method, amplitude variation of a radio frequency oscillator signal generated by a frequency-adjustable oscillator signal generator is stabilized in an adaptive compensation circuit having adjustable compensation parameters. The stabilized oscillator signal is fed from the compensation circuit to one or more frequency dividers for frequency division. The compensation circuit is configured to stabilize signal variations caused by component non-idealities and, thereby, prevent undesired frequency division errors in the frequency dividers.

Abstract: A voltage controlled oscillator (VCO) with improved frequency characteristics is provided. The VCO includes a converting circuit supplied between a bias voltage and a ground voltage for converting the control voltage into a control current, a replica bias circuit coupled to the converting circuit for providing a swing voltage, and a ring oscillating circuit coupled to the replica bias circuit having at least two delay units coupled in series for successively delaying an input signal as the oscillating signal after a period of delay time.

Abstract: A system and method for generating a highly stable holdover clock utilizing an integrated circuit and an external OCXO is presented. The integrated circuit comprises an input reference clock receiver, a phase and frequency detector that generates an error signal between the input reference clock signal and a feedback clock signal, a data storage block that stores model parameters to predict frequency variations of the OCXO, an adaptive filtering module that includes a digital loop filter and algorithms for updating the model parameters and predicting frequency variations based on the model, a switch that enables the system to operate in normal or holdover mode, a digitally controlled oscillator, and a feedback divider.

Abstract: The present invention relates to an oscillating circuit arrangement having a resonating arrangement with a first resonance frequency (coo) comprising a voltage controlled oscillator arrangement. It further comprises a tunable filter arrangement connected to the source node of said voltage controlled oscillator (VCO) arrangement. Said filter arrangement particularly comprises an equivalent current source resonating at a second resonance frequency c?f, the second resonance frequency being a multiple n, n=1 or 2 of said first resonance frequency (?>o), n being equal to the minimum number of switch transistors required for oscillation of said VCO arrangement. The filter arrangement particularly comprises an inductor connected in parallel with a capacitor, said capacitor being adapted to be tunable such that the phase noise of the resonating arrangement can be minimized through tuning of the filter arrangement.

Abstract: Methods and apparatus for controlling frequency in a crystal oscillator are provided that allows for continued reception of GPS signal solution in a continuous high G environment. One method comprises measuring G-forces asserted on the crystal oscillator, determining a shift in frequency of the crystal oscillator due to the measured G-forces, determining a temperature that would shift the crystal oscillator's frequency back to a rate that would occur without the measured G-forces, and changing the temperature of the crystal oscillator based on the determined temperature to shift the crystal oscillator's frequency back to a rate that would occur if the G-forces were not present.

Abstract: Linear wideband phase modulation system. Apparatus is provided for linear phase modulation utilizing a phase-locked loop. The apparatus includes a limiting circuit that restricts a range of a modulation signal that is coupled to a voltage controlled oscillator (VCO) associated with the phase-locked loop, and a linearizing circuit that reshapes the modulation signal to improve linearity.

Abstract: In one embodiment, a signal control system has a signal output and includes: 1) a phase-locked loop (PLL) having a voltage-controlled oscillator (VCO), a phase error detector, an oscillating output coupled to the signal output of the signal control system, and a programmable frequency divider coupled in a feedback path between the oscillating output and the phase error detector; 2) at least one automatic level controller (ALC), coupled to the oscillating output; and 3) a plurality of switchable integrators, including first and second switchable integrators that are respectively coupled between the phase error detector and the VCO, and in the at least one ALC. Each of the switchable integrators is switchable between a narrow bandwidth mode that provides for stable operation of the signal control system, and a wide bandwidth mode that enables fast signal transitions at the signal output.

Abstract: The present invention concerns a differential oscillator device, comprising resonant electronic means, capable to provide on at least two terminals at least one oscillating signal VOUT, which comprises a generator electronic means capable to supply at least one power supply pulsed signal to said resonant electronic means in phase relation with said at least one oscillating signal VOUT. The present invention further concerns a process of supplying pulsed power to such a differential oscillator device.

Abstract: A disclosed device for generating a pulse-width modulated signal according to image data and based on a pixel clock signal includes a pixel clock generating unit configured to generate the pixel clock signal and a modulated data generating unit configured to generate the pulse-width modulated signal. The pixel clock generating unit includes a multi-phase clock signal generating unit, a comparing unit, a frequency calculation unit, a counting unit, and a pixel clock signal output unit. The modulated data generating unit includes a data converting unit, an edge time calculation unit, and a pulse-width modulated signal output unit.

Abstract: An oscillator includes an oscillator circuit and a resonator that produces an output frequency. A temperature compensation circuit is coupled to the oscillator circuit. The temperature compensation circuit stabilizes the output frequency in response to changes in temperature. At least one temperature sensor and a temperature sensor signal modification circuit are coupled to the temperature compensation circuit. The temperature sensor signal modification circuit receives a temperature signal from the temperature sensor and generates a modified temperature sensor signal that is transmitted to the temperature compensation circuit.

Abstract: A radiation hard design for oscillator circuits and circuits having differential outputs is described. The design includes connecting or otherwise coupling outputs of these circuits to a passive polyphase filter. The passive polyphase filter provides four quadrature outputs that are free of glitches that may have occurred at the filter input.

Abstract: A device for generation of a reference frequency includes a component configured for generating a reference voltage, and a slaving circuit configured for slaving the reference frequency to the reference voltage.

Abstract: A phase lock loop pre-charging system and method are described. In one embodiment, a phase lock loop pre-charge system includes a bias component for generating a pre-charge voltage, and an activation component for activating the bias component. In one exemplary implementation the pre-charge voltage is utilized to facilitate pre-charging of a phase lock loop voltage controlled oscillator. In one embodiment, the bias component includes replica bias components that track the voltage controlled oscillation control voltage over varying process, voltage and temperature characteristics. The phase lock loop pre-charging systems and methods can be utilized to reduce lock time for a circuit.

Abstract: In one exemplary implementation, an electronic apparatus has a reference clock source for generating a reference clock, a monitoring circuit for monitoring a non-temperature factor indicative of frequency drift occurrence of the reference clock to thereby generate a monitoring result, and a compensating circuit for compensating the reference clock according to the monitoring result. In another exemplary implementation, an electronic apparatus has a reference clock source for generating a reference clock, a processing logic for performing a designated operation according to the reference clock, a monitoring circuit for monitoring a non-temperature factor indicative of frequency drift occurrence of the reference clock to thereby generate a monitoring result, and a compensating circuit for compensating the designated operation according to the monitoring result.

Abstract: Timing oscillators as well as related methods and devices are described. A timing oscillator may include a mechanical resonating structure with major elements and minor elements coupled to the major element. The timing oscillator can generate stable signals with low phase noise at very high frequencies which allows a timing oscillator to be used effectively in a number of devices including computers and mobile phones for time and data synchronization purposes. The signal generated by the timing oscillator can be tuned using a driver circuit and a compensation circuit.

Abstract: A phase-locked loop circuit is proposed for providing an output signal having a frequency depending on the frequency of a reference signal, the circuit including means for deriving a feedback signal from the output signal, means for providing a control signal indicative of a phase difference between the reference signal and the feedback signal, means for controlling the frequency of the output signal according to the control signal, and means for causing the circuit to enter a lock condition when the reference signal and the feedback signal have the same frequency and a pre-defined phase difference. In the circuit of an embodiment of the invention, the means for causing the circuit to enter the lock condition includes means for conditioning the control signal to have an instantaneous value substantially zero in the lock condition by means of a conditioning signal consisting of a series of pulses each one corresponding to the pre-defined phase difference.

Abstract: A voltage-controlled oscillator has an oscillation frequency controlled through a voltage applied across ends of a variable-capacitance element. The voltage-controlled oscillator has a frequency control bias circuit which applies to a first end of the variable-capacitance element a voltage for frequency control according to a control voltage, a first current source which generates a first current according to the control voltage, a second current source which generates a second current according to temperature, independent of the control voltage, a converting resistor which converts a current, obtained by adding together the first and second currents, into a voltage, and a temperature compensation bias circuit which applies to the second end of the variable-capacitance element a voltage for temperature compensation according to the voltage produced by the converting resistor.