Frequency Stabilization Patents (Class 331/175)
  • Patent number: 6542041
    Abstract: A phase locked loop (PLL) and method for stable clock generation in applications of wide band channel clock recovery performs frequency detection and phase detection with respect to an eight to fourteen modulation (EFM) signal and a PLL clock signal, and adjusts the current based on the results of the frequency detection and the phase detection, thereby generating the PLL clock signal synchronized with the EFM signal. The PLL includes a charge pump, a first low-pass filter, a voltage controlled oscillator and a static phase error controller. The charge pump sources or sinks the current in response to the results of the frequency detection and the phase detection and outputs the result of sourcing or sinking the current. The first low-pass filter low-pass filters the signal output from the charge pump and outputs the filtered result as a direct current control voltage.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: April 1, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-myung Choi
  • Publication number: 20030058057
    Abstract: A clock oscillator embedded in an integrated circuit, including a piezoelectric resonator formed on the integrated circuit; a clock generator coupled to the on-chip piezoelectric resonator, one or more sensors adapted to sense one or more environmental parameters affecting the piezoelectric resonator; and a processor coupled to the clock generator and the one or more sensors to adjust the frequency of the clock generator based on the one or more environmental parameters.
    Type: Application
    Filed: September 21, 2001
    Publication date: March 27, 2003
    Inventor: Dominik J. Schmidt
  • Patent number: 6538520
    Abstract: Circuitry for a phase locked loop (PLL) includes a first frequency doubler; a first equalizer having an input coupled to an output of the first frequency doubler; a second frequency doubler having an input coupled to an output of the first equalizer; and a second equalizer having an input coupled to an output of the second frequency doubler and an output which is fed into the PLL. Each frequency doubler includes a first delay circuit having an input coupled to the input of the frequency doubler; and an XOR circuit having a first input coupled to an output of the delay circuit and a second input coupled to the input of the frequency doubler. The combination of the two frequency doublers in series quadruples the reference signal into the PLL, which allows the, PLL to have a smaller feedback divider ratio and a higher loop gain for reducing jitter. Advantageously, controls for the selection of the initial reference signal are provided.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: March 25, 2003
    Assignee: Applied Micro Circuits Corporation
    Inventors: Allen Carl Merrill, Joseph James Balardeta, Wei Fu, Mehmet Eker
  • Patent number: 6538519
    Abstract: A phase locked loop wherein the voltage controlled oscillator is controlled by the output of a phase comparison circuit through a split loop filter. The oscillator has two varactors in parallel in its tuning circuit. The first branch of the loop filter includes an integrator filter generating a first error voltage and the second branch includes a low pass filter generating a second error voltage. The first error voltage controls one varactor and the second error voltage controls the other varactor. As a result the error voltages are effectively summed in the capacitance domain to obviate the need for a dedicated error voltage adder and to allow the total capacitance required in the loop filter to be reduced while still retaining an adequate signal to noise ratio in the filter.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: March 25, 2003
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Chi Wa Lo, Howard Cam Luong
  • Patent number: 6531928
    Abstract: A voltage-controlled oscillator includes a multilayer substrate having two grounding electrodes. A bare chip IC, a grounding capacitance connected to the collector of a transistor in an oscillator stage disposed in the IC, an electronic component, and other elements, are mounted on one surface of the multilayer substrate, and the electronic components are connected by an electrode pattern. A microstrip line electrode is disposed between the grounding electrodes inside the multilayer substrate, and the collector of the transistor and the capacitor disposed in the IC are connected by through-holes. A sealing resin is filled between the IC and the multilayer substrate to maintain the mounting strength of the IC. A space is provided between the IC and the capacitor to prevent adhesion of the sealing resin to the grounding capacitance.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: March 11, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kiyofumi Takai, Fumitoshi Sato
  • Publication number: 20030042989
    Abstract: A conventional voltage-controlled oscillator, when formed as an integrated circuit, suffers from a low Q factor of its resonant portion and thus poor phase noise characteristics. To overcome this, a voltage-controlled oscillator of the invention has a resonant portion including at least one variable-capacitance device and at least one inductor, an active portion including differential pair transistors and supplying electric power to the resonant portion in such a way as not to attenuate the oscillation of the resonant portion, and a current source connected to the emitters or sources of both of the differential pair transistors. The current source is a circuit having a resistor and a capacitive device connected in parallel.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 6, 2003
    Inventor: Shoji Sakurai
  • Patent number: 6525619
    Abstract: A crystal-oscillator circuit includes an oscillation transistor having the collector or the base thereof at a ground potential. A first capacitor is connected between the base and the emitter of the oscillation transistor. A second capacitor is connected between the emitter and the collector. A quartz crystal resonator and a third capacitor are connected in series between the base and the collector. The third capacitor is disposed at the ground potential side. An oscillation signal is extracted from a node between the quartz crystal resonator and the capacitor.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: February 25, 2003
    Assignee: Alps Electric Co., Ltd.
    Inventors: Takeshi Shimizu, Masataka Kumaki
  • Publication number: 20030034848
    Abstract: An apparatus compensates for voltage and temperature variations on an integrated circuit with: a voltage sensor having a digital voltage output; a temperature sensor having a digital temperature output; a register coupled to the voltage sensor and the temperature sensor, the register adapted to concatenate the digital voltage output and the temperature output into an address output; and a memory device having an address input coupled to the address output of the register, the memory device being adapted to store one or more corrective vectors.
    Type: Application
    Filed: August 15, 2001
    Publication date: February 20, 2003
    Inventors: Robert D. Norman, Dominik J. Schmidt
  • Patent number: 6522208
    Abstract: An oscillator includes an oscillator circuit that receives a control signal having a signal level. The oscillator circuit generates an oscillator signal having a frequency that is proportional to the signal level and that is within a frequency range. A compensation circuit stabilizes the oscillator circuit such that the frequency range includes first and second predetermined frequencies. Thus, such an oscillator can be used to generate an oscillator signal having a first frequency in one application and having a second frequency in another application. The compensation circuit stabilizes the frequency range of the oscillator signal so that it includes the first and second frequencies over broad ranges of operating conditions such as temperature and supply voltage and over broad ranges of component characteristics such as gate dielectric thickness.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: February 18, 2003
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventor: Kenneth R. Knowles
  • Patent number: 6518846
    Abstract: In a voltage controlled oscillator (VCO) having a voltage-current conversion circuit, a ring oscillator, and a main power supply for feeding a power supply voltage to these components, it is constructed so that a voltage which is fed to the voltage-current conversion circuit and ring oscillator may be applied with an internal voltage via a regulator circuit, thus effecting an oscillation output having only slight variations to the variations of the power supply voltage. Therefore, a phase synchronous circuit such as PLL circuits may be maintained at a locked status. In some instances, such a VCO may be modified not only to stabilize the dynamic range to the VCO control voltage, but also to switch the dynamic range. Thus, the oscillation frequency oscillated and outputted by the ring oscillator may be stabilized even upon the occurrences of the variations of the power supply voltage Vcc which is fed at a locked status.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: February 11, 2003
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric System LSI Design Corporation
    Inventor: Yukio Ichihara
  • Patent number: 6515552
    Abstract: An integrated circuit with a voltage-controlled oscillator that provides an oscillation signal with an unmodulated frequency that remains constant in response to reception of a bias current having a constant magnitude and with a modulated frequency that varies in response to reception of a modulation voltage. A current-to-voltage (I:V) conversion stage converts a bias clamp current to a control voltage. A voltage-to-current (V:I) conversion stage receives the control voltage and an external modulation voltage signal and generates the control current for a current-controlled oscillator (ICO). The control voltage is based upon the threshold voltage of one of the semiconductor devices forming the I:V conversion stage and is used to drive the V:I conversion stage so long as the external modulation voltage signal is substantially zero.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: February 4, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Hon Kin Chiu, Peyman Hojabri
  • Patent number: 6515551
    Abstract: An oscillator circuit configured to generate an output signal having a frequency comprising a current source, a trim circuit, and one or more capacitors. The current source may be configured to generate a temperature independent current in response to a first adjustment signal. The trim circuit may be configured to generate the first adjustment signal. The one or more capacitors may be configured to charge to a controlled voltage using the temperature independent current. The controlled voltage may regulate a variation of the frequency of the output signal.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: February 4, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventors: Monte F. Mar, Warren A. Snyder
  • Patent number: 6507248
    Abstract: Disclosed is an integrated voltage-controlled crystal oscillator intended to present the conditions for circuit constants in an oscillator circuit that can improve the oscillator's frequency tuning range with respect to the variable capacitance range of a variable-capacitance element. The voltage-controlled crystal oscillator comprises a crystal, an amplifier, and a load capacitor, wherein the load capacitor includes a voltage-controlled variable-capacitance element integrated on a semiconductor substrate and a DC cut capacitor element connected in series with the voltage-controlled variable-capacitance element, and the DC cut capacitor element has a capacitance value (Ccut) whose ratio to a maximum capacitance value (Cvmax) of the voltage-controlled variable-capacitance element (Ccut/Cvmax) is more than 0.5 and not more than 10.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: January 14, 2003
    Assignee: Citizen Watch Co., Ltd.
    Inventor: Rikoku Nakamura
  • Publication number: 20030006854
    Abstract: A voltage controlled oscillator (VCO) for connection and operation in a phase locked loop arrangement has two or more operational states in each of which the VCO circuit is operable to provide activation of a selected one of two or more different phase locked loops when connected to the VCO circuit, the VCO circuit including switching means for switching the state of the VCO circuit to allow the operational state of the VCO to be selected.
    Type: Application
    Filed: May 23, 2002
    Publication date: January 9, 2003
    Inventors: Moshe Ben-Ayun, Mark Rozental, Gabi Nocham
  • Patent number: 6504441
    Abstract: A frequency sweep voltage controlled oscillator (VCO), with a selectable range of output frequencies is provided. The VCO includes a frequency range circuit to accept an input signal, differentially delay the signal, and selectably sum the delayed signals to provide signals in discrete frequency ranges. A frequency sweep circuit accepts the signal output from the frequency range circuit, differentially delays the signal, and sums the delayed signal in such a way as to modify the previously selected frequency range. A method for generating a signal from a frequency sweep VCO is also provided.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: January 7, 2003
    Assignee: Applied Micro Circuits Corporation
    Inventor: Mehmet M. Eker
  • Patent number: 6498538
    Abstract: System and method for providing low noise signal having a broad tuning range (1 GHz to 10 GHz, or larger), with associated jitter no more than about 10 percent of the selected period of a target output signal. In a first stage, a ring-based VCO phase locked loop system provides a broad tuning range with some associated noise, and a second stage in a first state is relatively transparent, with no substantial differential attenuation based on frequency. After phase lock is achieved, the second stage is switched to a second state with low associated noise and high differential attenuation based on input signal frequency.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: December 24, 2002
    Assignee: Lattice Semiconductor Corporation
    Inventors: Ming Qu, Ji Zhao
  • Patent number: 6489853
    Abstract: An oscillator is described which exhibits low phase noise characteristics. The oscillator circuit of the invention includes an inductor in series with a low value capacitor, this series combination of an inductor and a capacitor, in parallel with a low value inductor forms a resonator whose inductive and capacitive reactances are a very low value. This causes the loaded Q to be very close to the resonator's unloaded Q.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: December 3, 2002
    Assignee: Z-Communications, Inc.
    Inventor: Charles Lewis
  • Patent number: 6486745
    Abstract: An adjustable voltage controlled oscillator has an input for receiving a voltage signal and an integrator coupled to the input for generating a ramp signal. The circuit also includes an adjustable current supply coupled to an output of the integrator for supplying an adjustable amount of current. A comparator compares the ramp signal with a predetermined voltage. The circuit further includes an output for generating a frequency output as a function of the comparison, wherein the circuit is calibratible by adjusting current generated by the adjustable current supply.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: November 26, 2002
    Assignee: Delphi Technologies, Inc.
    Inventors: Gregory J. Manlove, Lawrence D. Hazelton, Mark B. Kearney
  • Patent number: 6476682
    Abstract: A temperature compensated crystal oscillation circuit adapted to be contained within a small device package and providing an output frequency accuracy of approximately +/−2 ppm over a temperature range or less than 2 minutes per year over the temperature range. The device includes crystal and a single integrated circuit wherein the integrated circuit has a temperature sensing circuit with a digital output, control circuitry, a memory circuit and a switched capacitor array for compensating the oscillation of the crystal oscillator over temperature.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: November 5, 2002
    Assignee: Dallas Semiconductor Corporation
    Inventors: Douglas Gene Cole, Ranganath Bagade, Titkwan Hui
  • Publication number: 20020158693
    Abstract: An oscillating circuit (10) includes a quartz crystal oscillator (12) for generating a clock signal (20). The clock signal is synchronized to a master signal (19) during the lock-in periods when the oscillating circuit (10) has access to the master signal (19). During the holdover periods when the oscillating circuit (10) loses access to the master signal (19), an oscillation frequency function predicts the crystal oscillation frequency in terms the physical parameters, e.g., time and temperature, that may affect the crystal oscillation frequency. The predicted frequency is compared with a standard frequency to generate an error signal. In response to the error signal, a fraction handler block (28) determines whether adding cycles to or deleting cycles from the clock signal, thereby calibrating the oscillation signal (13) of the oscillating circuit (10).
    Type: Application
    Filed: April 13, 2001
    Publication date: October 31, 2002
    Applicant: Telefonaktiebolaget LM Ericsson
    Inventors: Anthony Chak Keung Soong, Bruce S. Schwartz, Kate Jennings Lainson, David Purdy
  • Patent number: 6472944
    Abstract: A VCO (voltage-controlled oscillator) that can realize stable oscillation operation over a broad frequency range with a low level of jitter. The VCO includes a plurality of basic cells having differential input/output, and a center frequency adjustment circuit. The plurality of basic cells are serially connected in a ring. Each basic cell includes a circuit constituted by two delay circuits and an adder circuit, the delay times of the two delay circuits being each independently determined by the center frequency adjustment circuit. The output amplitude of each of the basic cells is controlled to a fixed value. In the adder circuit, the output of one of the delay circuits is multiplied by an addition proportion coefficient, following which the outputs of both delay circuits are added. In this way, the delay time for each basic cell can be set over a broad range.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: October 29, 2002
    Assignee: NEC Corporation
    Inventor: Masaaki Soda
  • Patent number: 6469586
    Abstract: Recent trends have seen the desire for lower and lower supply voltages in radio frequency (RF) components as this leads to lower power consumption and, therefore, longer battery life. As well, lower voltages and less current means that mobile products can be made to require fewer battery cells leading to lighter, more compact devices. The present invention discloses a novel topology for providing a low-voltage voltage-controlled oscillator (VCO). The novel topology is based on the negative transconductance oscillator. However, the novel topology of the invention eliminates transistor ‘stacking’ in the oscillator circuit, thereby allowing the oscillator circuit to be operated at a supply voltage only slightly higher than the turn-on voltage for a single transistor.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: October 22, 2002
    Assignee: SiGe Semiconductor Inc.
    Inventors: John William Mitchell Rogers, Calvin Plett
  • Publication number: 20020145474
    Abstract: A digitally controlled oscillator includes an adjustable signal generating circuit adapted to generate an oscillation signal. A feedback loop receives the oscillation signal from the adjustable signal generating circuit. The feedback loop detects error in the oscillation signal and produces an error signal based on the error. The control logic circuit receives the error signal from the feedback loop and maintains the oscillation signal within a predetermined error range. Also, a state device that is connected to the adjustable signal generating circuit maintains a previous operating state of the adjustable signal generating circuit when the digitally controlled oscillator is temporarily powered down.
    Type: Application
    Filed: April 5, 2001
    Publication date: October 10, 2002
    Applicant: International Business Machines Corporation
    Inventors: Richard Jordan, Anthony J. Perri
  • Patent number: 6462627
    Abstract: The present invention, generally speaking, allows for a substantial reduction in oscillator phase noise by modifying the transfer function of a portion of the oscillator, e.g., by adding a zero to the transfer function. Modifying the transfer function reduces the open-loop gain of the oscillator but achieves a desired phase compensation, allowing the oscillator to be operated at the resonance of the resonator instead of off resonance. In an exemplary embodiment, the transfer function is modified by choosing a capacitance value such that, instead of operating as a bypass at the frequency of interest, adds a zero to the transfer function of the oscillator and causes a change in frequency characteristics, achieving an increase in the effective Q of the oscillator. This increase in effective Q translates directly into reduced phase noise. Phase noise improvement in the range of 3dB has been demonstrated.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: October 8, 2002
    Assignee: Tropian Inc.
    Inventor: Jerold Lee
  • Patent number: 6456169
    Abstract: A voltage-controlled oscillator has a frequency of oscillation that is varied using a substrate on which the same circuit pattern as that of the voltage-controlled oscillator is printed. In a resonant circuit included in the voltage-controlled oscillator, a first land is arranged substantially parallel to an inductor. A second land is arranged substantially parallel to the inductor and to a variable-capacitance diode. The capacitances of capacitors attached to the first land and second land are changed in order to vary the frequency of oscillation of the voltage-controlled oscillator. The frequency of oscillation can be varied without the necessity of scraping the inductor through which a major signal passes. Therefore, electrical characteristics of the voltage-controlled oscillator are not degraded and the frequency of oscillation is very steady. The frequency of oscillation can be varied merely by changing the capacitances of the capacitors attached to the first and second lands.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: September 24, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Teruaki Oshita, Shinji Goma
  • Patent number: 6456166
    Abstract: Object of the present invention is to provide a semiconductor integrated circuit and a voltage control oscillator capable of performing stable oscillating operation and generating an oscillating signal with little jitter. The present invention has a VCO cell, a replica cell constituted in the same way as the VCO cell, an operational amplifier, and a current generator bias circuit. A NMOS transistor is connected between a node in the VCO cell and a ground terminal. The operational amplifier controls the voltages of a node in the replica cell and the node in the VCO so that they are equal to the reference voltage. Because of this, the PMOS transistor composing of a current generator always operates at pentode region, thereby stabilizing the oscillating operation. Furthermore, according to the present embodiment, a CC jitter at low frequency side can be reduced more efficiently than that of the conventional circuit.
    Type: Grant
    Filed: April 18, 2001
    Date of Patent: September 24, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomoaki Yabe
  • Patent number: 6445258
    Abstract: A crystal oscillator circuit includes a crystal driven by a variable current source having a transconductance device with transconductance dependent on current, and a CMOS buffer circuit for receiving a sinusoidal signal from the crystal and providing a square wave output signal. The buffer circuit includes first and second bi-level buffers capacitively coupled to receive sinusoidal signals and operating in a push-pull mode for providing square wave output signals from each of said first and second buffers, and a third buffer driven by output signals from the first and second buffers, whereby duty cycle of the first and second buffers is controlled by bias voltages applied to CMOS transistors in the buffers.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: September 3, 2002
    Assignee: Zeevo, Inc.
    Inventor: Tom C. Truong
  • Patent number: 6441672
    Abstract: An explanation is given of a circuit arrangement for generating the control potential for a field-effect transistor from the output voltage (VA) of a filter circuit (20). In order to reduce the noise component thereof, the output terminal (A) of the filter circuit (20) is connected to a capacitive voltage divider (C1, C2), the tap of which carries the control potential. It is possible to control the charge state of the voltage divider (C1, C2) for the purpose of setting a predetermined potential value at the tap (10).
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: August 27, 2002
    Assignee: Micronas GmbH
    Inventor: Theus Ulrich
  • Patent number: 6441690
    Abstract: A phase-locked loop frequency synthesizer includes circuitry which determines the real gain of a voltage-controlled oscillator from at least one measurement parameter and delivers a signal representative of the real gain of the voltage-controlled oscillator.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: August 27, 2002
    Assignee: Alcatel
    Inventors: Patrick Savelli, Christian Massy
  • Patent number: 6437651
    Abstract: An electric potential of an epitaxial layer 2A provided under a bonding pad 5 to which a resonance circuit for a VCO is to be connected is fixed to a predetermined (Vcc) electric potential through a resistor 6 in a conventional floating state. Consequently, a speed of a change in the electric potential of the epitaxial layer 2A is increased and a value of a parasitic capacity is stabilized quickly. Consequently, a drift can be improved when a power supply is turned ON.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: August 20, 2002
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hirokazu Chigira, Masao Okumura, Tatsuro Koyanagi, Naoshi Mashimo, Tomoyuki Saito, Mitsuo Osawa, Nobukazu Hayakawa, Kouki Kubo
  • Patent number: 6437652
    Abstract: A resonant oscillator circuit includes an active device and a resonator that causes the active device to oscillate at a resonant frequency of the resonator. The active device includes one or more transistors that are DC biased using one or more resistors. The bias resistors generate thermal noise that is proportional to the resistance value. An external inductor circuit is connected across the output terminals of the active device and in parallel with the resonator. The external inductor circuit shorts-out at least some of the thermal noise that is generated by the bias resistors, and thereby reduces the overall phase noise of the resonant oscillator.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: August 20, 2002
    Assignee: Broadcom Corporation
    Inventor: Ramon A. Gomez
  • Patent number: 6424230
    Abstract: A phase locked loop circuit and method that substantially decouples control of the phase/frequency and the amplitude of the oscillation output such that the frequency of the oscillation can be controlled independently of the amplitude. The phase locked loop circuit comprises a phase/frequency control loop and an amplitude control loop wherein both loops control an oscillator that oscillates at a certain frequency in response to a phase/frequency control signal generated by the phase/frequency control loop. In addition, the oscillation amplitude is determined by an amplitude control signal generated by the amplitude control loop. As with conventional circuits of this type, a parasitic gain is coupled from the amplitude control loop into the phase/frequency control loop, thereby causing interference between the loops that leads to stability problems.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: July 23, 2002
    Assignee: Intel Corporation
    Inventors: Namik K. Kocaman, Michael W. Altmann
  • Patent number: 6411168
    Abstract: A voltage-controlled oscillator is constructed to greatly reduce the number of parts required, its overall size, and manufacturing cost. The voltage-controlled oscillator includes first and second resonance circuits, first and second oscillation circuits, a buffer circuit amplifying the oscillation signals output from the first and second oscillation circuits, and an output-matching circuit. In addition, the voltage-controlled oscillator includes a first switching circuit for controlling the oscillation of the first oscillation circuit and a second switching circuit for controlling the oscillation of the second oscillation circuit. The impedance changing of the matching circuit is simultaneously performed while switching between the switching circuits.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: June 25, 2002
    Assignee: Murata Manufacturing, Co. Ltd.
    Inventor: Daisuke Yoshida
  • Patent number: 6411171
    Abstract: A voltage controlled oscillator includes an amplifier having a positive feedback construction, configured to output an oscillation signal of a frequency corresponding to a control voltage supplied to a variable capacitor of a tank circuit having an inductor and the variable capacitor, and a variable current source configured to change an operation current supplied to the amplifier according to the control voltage. When a certain oscillation frequency at which phase noise becomes minimum is set as a reference point, the variable current source increases the operation current supplied to the amplifier as the oscillation frequency becomes lower than the certain oscillation frequency, or decreases the operation current supplied to the amplifier as the oscillation frequency becomes higher than the certain oscillation frequency. With this construction, a voltage controlled oscillator having a stable and sufficiently suppressed phase noise characteristic can be realized irrespective of the oscillation frequency.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: June 25, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Nobuyuki Itoh
  • Patent number: 6407644
    Abstract: A voltage controlled oscillator operates over a wide operating frequency range and reduces the fluctuation of the gain due to the fluctuation of the frequency characteristic. The variable frequency oscillator includes a first voltage/current converter for controlling the variable frequency oscillator such that the output oscillating frequency is varied by &Dgr;F hertz by changing the input voltage by &Dgr;V volt when the input voltage is less than a prescribed threshold voltage, and includes a second voltage/current converter for controlling the variable frequency oscillator such that the output oscillating frequency is varied by more than &Dgr;F hertz by changing the input voltage by &Dgr;V volt, when the input voltage exceeds a prescribed threshold voltage.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: June 18, 2002
    Assignee: NEC Corporation
    Inventors: Masayuki Mizuno, Koichiro Minami
  • Patent number: 6404292
    Abstract: A phase locking oscillator (60, 70, 80, 90, or 110) and a radio frequency oscillator (62, 72, 82, 92, or 112) achieve reduced incidental frequency modulation. A frequency-deviation sensitivity is reduced by a divider (66 or 100) that reduces a frequency-control voltage, thereby decreasing voltage spikes and other electrical noise, and thereby reducing incidental frequency modulation. In embodiments having an AC voltage divider (66), the frequency-control voltage is reduced when a frequency thereof is above a predetermined roll-off frequency. Below the roll-off frequency, the voltage dividing function ceases, and full deviation sensitivity of the radio frequency oscillator (62, 72, or 82) is restored, whereby a capture range of the phase locking oscillator (60, 70, or 80) and a maximum frequency range of the radio frequency oscillator (62, 72, or 82) are restored.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: June 11, 2002
    Assignee: Emhiser Research Ltd.
    Inventor: Lloyd L. Lautzenhiser
  • Patent number: 6404295
    Abstract: A voltage controlled oscillator includes a first converter, a second converter and an oscillator. The first converter outputs a first current proportional to an input voltage. In this case, an increase rate of the first current is decreased as the input voltage is increased. The second converter outputs a second current proportional to the input voltage. An increase rate of the second current is increased as the input voltage is increased. The oscillator outputs an oscillation signal in response to a summation of the first current and the second current.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: June 11, 2002
    Assignee: NEC Corporation
    Inventors: Koichiro Minami, Masayuki Mizuno
  • Patent number: 6400231
    Abstract: An oscillator includes a resonator, such as a crystal (12) coupled to first and second capacitor banks (14). The first and second capacitor banks (14) each comprise a plurality of capacitors (16) coupled to the resonator (12) through respective switching devices (18) that may be selectively enabled. The switches (18) are selectively enabled to couple a desired set of said capacitors (16) to said resonator (12). At least one of the switches (18sd) is controlled with a clock signal having a programmable duty cycle from a sigma-delta modulator (20) to enable at least one of said capacitors (16sd) during a first phase of the clock signal and disable that capacitor (16sd) during a second phase of the clock signal.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: June 4, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Yves Leduc, Pascal Guignon, Pierre Carbou
  • Patent number: 6400230
    Abstract: One embodiment of the present invention provides a system that generates a clock signal within an integrated circuit. This system includes four clocking elements organized into a ring, wherein each clocking element includes at least one input and at least one output, and wherein a signal at an input is complemented at a corresponding output. These clocking elements are spatially distributed throughout the integrated circuit, so that each clocking element provides the clock signal to a different region of the integrated circuit. These clocking elements are also coupled together though a plurality of interconnections, so that each output of each clocking element is coupled to at least one input of a neighboring clocking element. Furthermore, a given signal is inverted an odd number of times in traversing a closed path beginning and ending at any output of any of the four clocking elements and passing through a neighboring clocking element.
    Type: Grant
    Filed: January 22, 2001
    Date of Patent: June 4, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Scott M. Fairbanks
  • Patent number: 6392497
    Abstract: A phase-locked loop circuit includes a voltage-controlled oscillator that includes a series circuit having a P-channel transistor, N-channel transistor, a third resistor and a first resistor connected in series in this order; a second resistor connected in parallel with a series circuit of the N-channel transistor and the third resistor; and an operational amplifier having its non-inverting input terminal connected to an output terminal of a lowpass filter, its inverting input terminal connected to a connected point of the third resistor and first resistor, and its output terminal connected to a gate of the N-channel transistor. The variable region of the resistance of the parallel circuit consisting of the N-channel transistor and the third and first resistors can be limited, which in turn enables the variable region of the control voltage of the voltage-controlled oscillator including a locking control voltage to be limited to a desired range.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: May 21, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric System LSI Design Corporation
    Inventor: Yutaka Takikawa
  • Patent number: 6388534
    Abstract: A crystal oscillator including a laser light source for emitting a laser beam to an aligned quartz crystal coupled to an oscillator circuit by an optical feedback network. The optical feedback network is responsive to variations of misalignment of the laser beam with the crystal and correction signals generated for introduction back to the crystal to bring its frequency back to a constant standard frequency output.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: May 14, 2002
    Inventors: Alfiero Balzano, Armando Benavides, Carl Peterson
  • Patent number: 6380817
    Abstract: The present invention relates to an oscillator with the multi-layer non-radiative dielectric waveguide structure, which is able to generate various frequencies through oscillator elements and resonators, built in a multi-space structure with non-radiative dielectric waveguides of different sizes. Because it would not be necessary to construct many different packages in order to generate various frequencies, the present invention has an economical advantage.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: April 30, 2002
    Assignees: Sensing Tech, Corp.
    Inventor: Cheon Woo Shin
  • Patent number: 6380810
    Abstract: A reduced lock time phase locked loop has a speed up circuit with an operational amplifier to amplify a differential voltage across a filter resistor of an RC noise filter, the RC noise filter coupling a coarse tune voltage to a VCO. The amplifed differential voltage is applied to the bases of a pair of opposite polarity transistors, the emitters of the transistors being coupled to a filter capacitor in the RC noise filter for rapid charging/discharging. Alternatively the amplified differential voltage is applied to a pair of parallel, opposite polarity diodes coupled to the filter capacitor for rapid charging/discharging.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: April 30, 2002
    Assignee: Tektronix, Inc.
    Inventor: Brian P. Sutton
  • Patent number: 6373344
    Abstract: A microwave synthesizer apparatus features very low phase noise, fine frequency resolution and wide tuning range coverage. The microwave synthesizer apparatus utilizes a fundamental offset source in an offset phase lock loop (PLL) to translate an output signal Fout to a lower IF signal Fif for locking to a low frequency interpolation signal Fint. The use of the fundamental offset source instead of the conventional multiple frequency offset signal from a comb generator or sampler results in superior phase noise and spurious performance. The synthesizer comprises a main signal loop having a main loop VCO that produces an output signal Fout and an offset signal loop having an offset VCO that produces an output signal Fos. The signals Fos and Fout are mixed in the main loop to control the frequency of the signal Fout. The main loop VCO and the offset loop VCO preferably are YIG-tuned Oscillators (YTOs) that share a main coil.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: April 16, 2002
    Assignee: Agilent Technologies, Inc.
    Inventor: Wing J. Mar
  • Publication number: 20020041217
    Abstract: A precision oscillator circuit providing a periodic waveform is provided. A periodic waveform is provided by the use of an integrating op-amp circuit in conjunction with a switched capacitor frequency control loop and a user input adapted to be coupled with a frequency-setting resistor. The frequency of the periodic waveform is determined by the values of the switched capacitor and the resistor. The oscillator circuit has an arrangement which minimizes the effect of the op-amp circuit's offset voltage. The user input is kept robust against user-introduced capacitance by the use of controllable current sources and/or controllable voltage sources to bias the op-amp circuit. A linearity correction circuit is also provided to correct for non-ideal op-amp circuits.
    Type: Application
    Filed: November 21, 2001
    Publication date: April 11, 2002
    Applicant: Linear Technology Corporation
    Inventors: Andrew H. Crofts, Michael A. Kultgen
  • Patent number: 6369662
    Abstract: An oscillator, a dielectric waveguide device and a transmitter incorporating the same, wherein a special temperature-compensating circuit provides a temperature-compensated device with reduced size and cost, and greater productivity. In the oscillator, a dielectric plate having a strip line of a specified length is arranged between conductive plates which enclose a Gunn diode. The oscillation output signal of the Gunn diode is extracted via the strip line. In addition, the sign of the dielectric-constant temperature coefficient of the dielectric plate is set such that changes in the oscillation frequency caused by changes in temperature of the Gunn diode are suppressed.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: April 9, 2002
    Assignee: Murata Manufactoring Co., Ltd.
    Inventors: Kazumasa Haruta, Sadao Yamashita
  • Patent number: 6369665
    Abstract: An oscillator circuit that adjusts the oscillation voltage such that the voltage oscillates in a uniform manner independent of changes to frequency. Slope compensation is derived from the oscillation voltage. The adjustment is implemented by using a window comparator to establish a range of operation of the oscillation voltage. When the oscillation voltage is outside the range of operation, the window comparator instructs a counter circuit to either count up or count down, depending on the value of the oscillation voltage relative to the range. This counting then is used to adjust the amount of current which charges the capacitor. Thus, when the peak voltage is too low, the amount of current is adjusted upward. When the peak voltage is too high, the amount of current is adjusted downward. In this fashion, the oscillation voltage is maintained at a substantially uniform value, while the frequency is synchronized to an external clock signal.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: April 9, 2002
    Assignee: Linear Technology Corporation
    Inventors: San Hwa Chee, Stephen W. Hobrecht, Randy Flatness
  • Patent number: 6366176
    Abstract: The invention relates to a method of generating a control signal and to an arrangement comprising a D/A converter for receiving a digital signal and converting the received signal into an analog control signal. The arrangement comprises measuring means for measuring the operating voltage of the D/A converter, means for generating a difference signal from the measurement result obtained from the measurement of the operating voltage, and the nominal value of the operating voltage, whereby the difference signal is used to change the control signal when the operating voltage differs from a nominal value preset for the operating voltage of the D/A converter.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: April 2, 2002
    Assignee: Nokia Networks Oy
    Inventor: Seppo Peltola
  • Publication number: 20020030547
    Abstract: The invention relates to a method of generating a control signal and to an arrangement comprising a D/A converter for receiving a digital signal and converting the received signal into an analog control signal. The arrangement comprises measuring means for measuring the operating voltage of the D/A converter, means for generating a difference signal from the measurement result obtained from the measurement of the operating voltage, and the nominal value of the operating voltage, whereby the difference signal is used to change the control signal when the operating voltage differs from a nominal value preset for the operating voltage of the D/A converter.
    Type: Application
    Filed: August 28, 2001
    Publication date: March 14, 2002
    Inventor: Seeppo Peltola
  • Patent number: 6353370
    Abstract: A method and apparatus for modulation of a voltage-controlled oscillator (VCO). The VCO receives a tuning control voltage for adjusting a center frequency of an output periodic signal formed by the VCO. In addition, the VCO receives a modulation control voltage for modulating the output periodic signal by a content-carrying signal according to frequency modulation techniques. A frequency deviation obtained in the output periodic signal in response to changes in the modulation control voltage is linearized by forming the modulation control voltage as the result of a linear correction polynomial. A linear correction circuit forms the modulation control voltage. More particularly, a first amplifier having a gain of K1 receives the tuning control voltage. A first summing block then receives the output of the first amplifier and adds the constant K0. A second amplifier having a gain of m receives the content-carrying signal.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: March 5, 2002
    Assignee: Micro Linear Corporation
    Inventors: Robert Cox, Gwilyn Luff