Abstract: A resonant oscillator circuit includes an active device and a resonator that causes the active device to oscillate at a resonant frequency of the resonator. The active device includes one or more transistors that are DC biased using one or more resistors. The bias resistors generate thermal noise that is proportional to the resistance value. An external inductor circuit is connected across the output terminals of the active device and in parallel with the resonator. The external inductor circuit shorts-out at least some of the thermal noise that is generated by the bias resistors, and thereby reduces the overall phase noise of the resonant oscillator.

Abstract: A LC controllable oscillator (LCCO) according to the invention comprises a voltage-controlled oscillator (VCO) and a first voltage controlled current source (VCCS) of a first type for supplying a current to the VCO. The VCO is realized with a flit pair of VCCCS of the first type coupled with a second paw of VCCS of a second type end a LC resonator. The VCO generates a periodical oscillation frequency that is controllable by a control signal (V). The LCCO further comprises a replica scaled bias module (RSBM) supplied from the external voltage source. The RSBM is conceived to generate a control signal (BIAS CONTROL) for controlling the supplied current delivered by the first VCCS to the VCO.

Abstract: Disclosed is an oscillator circuit (1A) for use in a local oscillator of an RF communications device (100) that communicates over an RF channel. The oscillator circuit includes an oscillator circuit portion (2) and a bias circuit portion (3) coupled to the oscillator circuit portion for setting the operating point of the oscillator transistors. The oscillator circuit further includes a switch (6) for selectively one of connecting or disconnecting the bias circuit portion from the oscillator circuit portion, and a capacitance (5) for storing an output of the bias circuit portion during a time that the switch disconnects the bias circuit portion from the oscillator circuit portion, thereby maintaining control of the operating point of the oscillator transistors of the oscillator circuit portion. When the switch is open any noise generated by the biasing circuit portion is prevented from reaching the oscillator circuit portion, thereby reducing the overall noise floor of the oscillator circuit.

Abstract: A method and a circuit for minimizing glitches in phase-locked loops is presented. The circuit includes an input terminal connected to an input of a phase detector; a series of a charge pump generator, a filter and a voltage controlled oscillator connected downstream of the phase detector; and a frequency divider feedback connected between an output of the voltage controlled oscillator and a second input of the phase detector. The circuit provides for the inclusion of a compensation circuit connected between the charge pump generator and the filter to absorb an amount of the charge passed therethrough. This compensation circuit includes a storage element connected in series to two switches. The first switch is coupled to and controlled by an output of the charge pump and the second switch is coupled to and controlled by an output of a phase detector.

Abstract: A clock oscillator circuit that includes an inverting amplifier and a resonator configured to generate an oscillating signal. The clock oscillator includes a bias circuit having a relatively constant current source configured to create a bias voltage to bias the amplifier in an operating state that can sustain the oscillating signal. The inverting amplifier and the bias circuit are configured to operate in a low power state.

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Abstract: The microwave pulse generator of the invention for generating microwave pulses with a pulse duration in the nanosecond range has a pulse generator that generates pulses of constant width, and a microwave resonant circuit for generating microwave oscillations. Additionally provided is a pulse-shortening stage, to which the pulses from the pulse generator are fed and which generates output pulses in the nanosecond range. The output pulses are fed as supply voltage pulses to a microwave oscillator, at the output of which the microwave pulses can be picked off. A voltage-controlled varicap diode arrangement is provided to influence the pulse lengths and/or pulse amplitudes.

Abstract: A circuit, system, and method are provided for regulating the mark-to-space ratio of a clocking signal. In instances where the mark-to-space ratio is targeted at 1:1 (i.e., a 50% duty cycle), then a regulated signal is formed which will produce a 50% duty cycle whenever that regulated signal is forwarded to a buffer which will produce a duty cycle other than 50% if the input signal were not regulated. The regulated signal is derived from a feedback circuit which will take into account the periodic nature of the clocking signal and whatever threshold skews might be attributable to the clock buffer. The feedback signal derives its input from a tap connected to receive the clocking signal from an output of the buffer, and the tap forwards that clocking signal to switching transistors which impute the periodic clocking frequency onto a threshold skewed output which will then form the regulated signal. Any skew resulting from the oscillator will not be passed to the node which bears the regulated signal.

Abstract: A quartz crystal oscillator comprises a balanced circuit with a quartz crystal resonator device connected in series resonance across a balanced, low-impedance node within a sustaining amplifier. A phase modulator such as a quadrature modulator is included in the feedback loop to allow programming of the loop phase shift thereby to alter the frequency point on the crystal resonance curve at which the circuit oscillates. The in-phase loop signal is hardlimited while the quadrature loop signal component is not hardlimited with the effect that the frequency control curve slope is more accurately defined. An active neutralization of the crystal's parasitic shunt capacitance is disclosed for obtaining a linear frequency control curve.

Abstract: An oscillator circuit (300) comprising: a resonator (Q) connected between an input (IN)and an output (OUT); an inverter having first and second driver transistors (MP, MN) connected in series via an output-coupled node; first and second biasing transistors (MPD, MND) for biasing the driver transistors; and first and second limiting means between the gate electrodes of the driver transistors respectively and the output. The CMOS circuit allows regulation of the oscillation amplitude without need for well-controlled DC current sources to polarize correctly the driver transistors, and without need for a start-up circuit to ensure that both driver transistors remain in saturation when the circuit is powered on. A simple oscillator circuit (600) has an inverter whose input is capacitively coupled to the input (IN), first limiting means coupled between the inverter input and the output (OUT), and second limiting means coupled between the input (IN) and the output (OUT).

Abstract: A circuit including an oscillator circuit, a current generator circuit and a voltage generator circuit. The oscillator circuit may be configured to generate an output signal having a frequency in response to (i) a first control signal and (ii) a second control signal. The current generator may be configured to generate said first control signal in response to a first adjustment signal. The voltage generator circuit may be configured to generate the second control signal in response to a second adjustment signal.

Abstract: An analog memory cell that may be incorporated into a low power oscillator is provided. The analog memory cell stores an analog voltage as a digital signal and converts the digital signal back to an analog voltage to allow continued generation of an accurate constant output voltage regardless of temperature-dependent leakage currents associated with parasitic diodes and non-ideal devices. The accurate constant output voltage provided by the analog memory cell may be used by the low power oscillator to generate an accurate low frequency output signal. This accurate low frequency output signal may be used to maintain long-term timing accuracy in host devices during sleep modes of operation. Incorporation of the analog memory cell in the low power oscillator is fully implementable in a CMOS process.

Abstract: Systems for controlling the amplitude of the output signal of a controllable oscillator in a frequency synthesizer are provided. One such system provides a circuit having a controllable oscillator and an amplitude control circuit. The controllable oscillator is configured to generate an output signal having a predefined frequency and a predefined amplitude. The controllable oscillator is also configured with a plurality of operational states that are controlled by the amplitude control circuit. Each operational state of the controllable oscillator defines a particular current bias associated with a distinct amplitude of the output signal of the controllable oscillator. The amplitude control circuit receives the output signal of the controllable oscillator and determines the amplitude. When the amplitude of the output signal of the controllable oscillator is less than the predefined amplitude, the amplitude control circuit provides a control signal to the controllable oscillator.

Abstract: An oscillator circuit is specified, having an LC resonator, to which two or more current paths are connected, which are connected in parallel with one another and can be connected and disconnected individually by switches. The attenuation compensation amplifiers are in this case coupled to the resonant circuit in order to compensate for its attenuation. The oscillator circuit allows the gradient of the compensation for the attenuation of the resonant circuit to be adjusted, without moving the operating point of the amplifiers. This makes it possible to compensate for manufacturing-dependent component tolerances and any amplitude discrepancy caused by them, in a simple way. The oscillator circuit is suitable, for example, for use in voltage-controlled oscillators in order to form phase-locked loops when using mass production technologies.

Abstract: The controlling circuit element of a voltage controlled oscillator (VCO) for use in a phase lock loop (PLL) is a varactor connected between the terminals used to convey the power supply voltage and the frequency control voltage. The loop filter, implemented in a shunt configuration at the input of the VCO, is also connected between the power supply and frequency control voltage terminals. As a result, any variations in the power supply voltage appear at both terminals of the varactor due to the voltage coupling effect of the loop filter between the shared power supply and frequency control voltage terminals.

Abstract: A neutralization of an equivalent parallel capacitor of a piezoelectric resonator is realized to obtain a stable activation of oscillation and secure a large frequency variation. A crystal resonator is connected between an input and output terminals of an inverting amplifier to form a Colpitts-type oscillator circuit, an input terminal of another inverting amplifier is connected to the output terminal through a capacitor and the output terminal is connected to the input terminal through another capacitor to form a Miller capacitor circuit for electrically neutralizing a parallel capacitor existing equivalently between both sides of the crystal resonator.

Abstract: A voltage controlled oscillator (VCO) for connection and operation in a phase locked loop arrangement has two or more operational states in each of which the VCO circuit is operable to provide activation of a selected one of two or more different phase locked loops when connected to the VCO circuit, the VCO circuit including switching means for switching the state of the VCO circuit to allow the operational state of the VCO to be selected. A frequency synthesizer circuit for use in radio communications to generate a stable frequency signal, the circuit includes the VCO circuit. The synthesizer circuit includes two or more different phase locked loops each having a first state in which the loop is activated and a second state in which the loop is deactivated. At least part of the VCO circuit is connected in and shared by the loops, so that the loop to be activated can be selected by selecting the operational state of the VCO.

Abstract: A circuit generally comprising a tank circuit and an inverter circuit. The tank circuit may be configured to generate a first signal having a frequency of oscillation in response to a second signal. The inverter circuit may be configured to (i) generate the second signal in response to inverting the first signal and (ii) adjust a delay in generating the second signal in response to an input signal to change the frequency of oscillation.

Abstract: According to an apparatus form of the invention, oscillator circuitry for operating a number of inverters in a loop (also known as a “ring”) includes a number of inverters. The inverters include a series of M inverters and a series of N inverters. The M inverters have signal propagation delay of m and the N inverters have signal propagation delay of n. The circuitry also includes means for selecting whether to exclude the N inverters from operating in the loop operable for receiving a select signal on a data input. The selecting means times assertion of the select signal on an output to select the number of inverters. In order to glitchlessly change the number of inverters operating in the loop, the selecting means has a certain delay greater than delay n.

Abstract: A timing reference system is provided for correcting inaccuracies in an output of a crystal oscillator experienced by the crystal oscillator during use in a mobile platform. The system utilizes a three-axis accelerometer mounted adjacent to the crystal oscillator on a substrate for sensing the acceleration experienced by the crystal oscillator. An offset generator converts the acceleration measurements generated by the accelerometer to error correction signals. These error correction signals represent the offset values needed to compensate for crystal timing drift due to the acceleration acting on the crystal oscillator thereby allowing the system to produce a corrected timing reference signal.

Abstract: An oscillator circuit having an expanded operating range includes an amplifier portion amplifying an oscillating signal. A gain controlling portion controls the gain of the amplified oscillating signal. A switching circuit electrically connected across the gain controlling portion provides a low impedance electrical path in parallel with the gain controlling portion in response to a switch input signal. The switching circuit further includes a switch signal generator portion producing the switch input signal to switch the switching circuit ON or OFF when power supplied to the oscillator circuit reaches a first predetermined voltage level and to switch the switching circuit OFF or ON when power supplied to the oscillator circuit reaches a second predetermined voltage level. In this circuit design, the initiation of an oscillating signal by the oscillator circuit is unaffected by supply voltage variation or, in other words, fluctuation in the power supplied to the oscillator circuit.

Abstract: There is described a time base comprising a resonator (4) and an integrated electronic circuit (3) for driving the resonator into oscillation and for producing, in response to the oscillation, a signal having a determined frequency. The resonator is an integrated micromechanical ring resonator supported above a substrate (2) and adapted to oscillate, according to a first oscillation mode, around an axis of rotation (O) substantially perpendicular to the substrate, the ring resonator comprising a central post (5) extending from the substrate along the axis of rotation, a free-standing oscillating structure (6) connected to the central post and including an outer ring (60) coaxial with the axis of rotation and connected to the central post by means of a plurality of spring elements (62), and electrode structures (9; 9*) disposed around the outer ring and connected to the integrated electronic circuit.

Abstract: An oscillation circuit uses a SAW oscillator and is able to control the oscillation frequency easily and correct the temperature characteristic of the oscillator so that an oscillation signal with high temperature stability can be generated. A clock signal CLK having a prescribed frequency difference from the ideal oscillation frequency is generated by the SAW oscillator 10. Register 30 is driven by a frequency-divided clock signal obtained by dividing the frequency of the clock signal at a predetermined frequency division rate. In-phase signal SI and quadrature signal SQ generated corresponding to the data Da that is incremented by a prescribed addition value F every period of the frequency-divided clock signal are output, and the clock signal is IQ-modulated on the basis of these signals. The frequency error of clock signal CLK can be corrected, and an output signal Sout having near ideal oscillation frequency can be obtained.

Abstract: A circuit and method are disclosed herein for a multi-phase voltage-controlled LC oscillator. The oscillator is configured as a ring containing N sections, each of which has an LC tank circuit that determiines the oscillation frequency. All the oscillator sections produce a signal at the same frequency, but with a constant phase angle offset between one section and the next. Thus, for example, a 4-phase version of the oscillator would have 4 sections, producing signals with phase angles of 0°, 90°, 180°, and 270°. The phase offset in each section results from the use of amplified quadrature signals to drive the LC circuits. An advantage of this approach to obtaining multiple phases is enhanced frequency stability, since the LC circuits in the oscillator sections all operate at resonance. Frequency modulation is accomplished without the use of varactors or other voltage-controlled tuning devices.

Abstract: An adjustable oscillating frequency function generator. The oscillating frequency of the function generator can be adjusted externally. The oscillation frequency is independent of the magnitude of the voltage source. Therefore, a pulse signal that withstands the voltage source signal can be provided.

Abstract: The ring oscillator circuit is made by connecting K units of inverter circuits U11, U12, . . . , U1K in a ring shape. The inverter circuit U11 comprises a CMOS inverter IV1 which includes MOS transistors MP4 and MN4, a P-channel MOS transistor MP3 which functions as the current source for a CMOS inverter IV1, an N-channel MOS transistor MN3 which functions as the current source for a CMOS inverter IV1, and a CMOS inverter IV2 which is connected in parallel to the CMOS inverter IV1 and includes MOS transistors MP5 and MN5.

Abstract: A modification of the synchronous oscillator is described, having regenerative positive feedback. The circuit includes an amplifier, a high-Q tank circuit, and a conventional synchronous oscillator feedback network. An additional feedback path provides a negative impedance conversion effect.

Abstract: An amplifier for high gain, narrowband signal amplification is disclosed. An embodiment is an amplifier including a first means capable of oscillating and a second means for controlling the operating state of the first means between oscillation and close to oscillation. By operating close to oscillator high gain, narrowband signal amplification occurs. By operating between oscillation and close to oscillation, rather than between startup and close to oscillation, the amplifier is always narrowband. Accordingly, an advantage of the invention is operation with minimum affect from interfering.

Abstract: An apparatus and method for continuous variable reactive impedance control. The apparatus and method enable the continuous variation of the reactive impedance of an oscillating circuit. A reactive component, in one embodiment a capacitor, is switched into the oscillating circuit for a duration at the beginning and end of each half cycle of the oscillation frequency. Through varying the duration, the oscillation frequency is varied between the frequency that occurs without the reactive component in the circuit and the frequency with the reactive component permanently in the circuit. A controller determines the duration and controls a switch coupled to the reactive component. The apparatus and method may be used to adjust the oscillation frequency of a resonant circuit or to match the resonant frequency to a driving frequency in a driven oscillating circuit so as to improve efficiency.

Abstract: A multiphase voltage controlled oscillator (e.g., a quadrature VCO) 100, which includes multiple voltage controllable transconductance phase drivers 102, 104, 106 and 108. The output of each voltage controllable transconductance phase driver 102, 104, 106, 108 supplies one of 4 oscillator phases and receives 2 of the 4 phases as inputs. Each of the voltage controllable transconductance phase drivers 102, 104, 106 and 108 corresponds to a pair of controllable transconductance inverting amplifiers 132, 134, 136, 138. The controllable transconductance inverting amplifiers may be a simple inverter 150 that includes N-type FET (NFET) 152 and P-type FET (PFET) 154. Transconductance is controlled in the simple inverter by raising or lowering supply voltage (Vdd) levels. A more complex controllable transconductance inverting amplifier may be used, replacing PFET 154 with series connected PFETs 164, 166. The gate of one PFET 166 is controlled by a bias control voltage VCON.

Abstract: An oscillator circuit including an integrated circuit amplifier, an integrated circuit active resistance circuit to set the gain of the amplifier, a crystal resonator to set the frequency of the signal generated by the oscillator circuit, and a pair of capacitors respectively situated at the inputs and outputs of the amplifier to assist in the starting of the oscillation signal. The active resistance circuit is responsive to an input signal in order to set the gain of the amplifier slightly above unity gain in order to meet the criterion for oscillation, but not too much above unity gain where the oscillator would unduly consume too much power. Thus, the oscillator has inherent low power characteristics. The active resistance circuit allows the amplifier gain to be set by software or other electronic means.

Abstract: A resonant oscillator circuit includes an active device and a resonator that causes the active device to oscillate at a resonant frequency of the resonator. The active device includes one or more transistors that are DC biased using one or more resistors. The bias resistors generate thermal noise that is proportional to the resistance value. An external inductor circuit is connected across the output terminals of the active device and in parallel with the resonator. The external inductor circuit short-out at least some of the thermal noise that is generated by the bias resistors, and thereby reduces the overall phase noise of the resonant oscillator.

Abstract: A precision, low jitter oscillator circuit is provided that is particularly well-suited for generating a clock signal in miniature digital systems, such as digital hearing aids. The oscillator includes a plurality of differential inverters configured in a feedback loop to generate an oscillating clock signal. The differential inverters include a capacitive trimming network for adjusting the frequency of the oscillating clock signal and employ resistive loads for minimizing jitter in the clock signal. The components of the oscillator are fabricated in a common silicon process to minimize the size of the oscillator.

Abstract: VCO frequency is continuously variable through a wide frequency range in proportion to a first control voltage VC produced by a PLL containing the VCO. A second control voltage NVC is produced as a monotonically decreasing function of VC. A first current I0 is produced in proportion to VC and a second current I1 is produced in proportion to NVC. I1 is subtracted from I0, producing a control current IC=I0-I1 which is applied to the VCO.

Abstract: An oscillator has a current source for generating a first signal connected to a plurality of odd numbered serially connected inverters. The current source comprises a resistor, and an NMOS transistor having a first terminal and a second terminal with a channel therebetween and a gate for controlling the current flow therebetween. The first terminal and the second terminal of the MOS transistor are connected in parallel with the resistor with a voltage connected to the gate of the MOS transistor to maintain the MOS transistor in a conduction state. The frequency output of such an oscillator would then be virtually independent of the voltage.

Abstract: An oscillator includes a comparator and a variable voltage element. The comparator has a first input set to a reference voltage, a second input, and an output configured to produce an output voltage as a function of the voltages at the first and second inputs. The variable voltage element delivers to the second input a second voltage that is a function of a switched current. The switched current is a function of the reference voltage.

Abstract: The present invention is directed to a system and method which utilizes a fixed base current to control the output voltage instead of a variable base current. In one embodiment, instead of modulating the base current, the converter uses output current to determine the voltage produced at the output. By sinking current out of the DC-to-DC converter, a high output impedance is achieved which, in turn, allows a fairly low modulating current to offer a large change in output voltage. This circuit eliminates at least one of the feedback loops found in existing designs, further increasing stability. As a result of the circuit design, there is achieved a DC-to-DC converter which allows the user to easily define the frequency at which the circuit operates and which is tolerant of component variations.

Abstract: Is disclosed a method and a relative circuit adapted to transfer to a microwave transmission carrier the angle modulation of an intermediate frequency signal. The conveyor of angle modulation is a PLL (100) which VCO (2) generates the microwave carrier (RF) modulated like the intermediate frequency signal (S4), taken as reference for the phase comparator (10) of the PLL. The comparator receives moreover a copy of the signal generated by the VCO, converted at intermediate frequency (S3) by means of a subharmonic mixer, and it generates an error signal (S5). The PLL comprises further a regulator circuit (101) which maintains automatically constant relation K between the locked band of the PLL and the bandwidth of the reference signal (S4), the lanter being a signal susceptible of band width variations, generally due to the choice of different transmission speeds.

Abstract: An RF Voltage Controlled Oscillator (VCO) design having improved power supply noise immunity. More particularly, a VCO resonant circuit that provides a high circuit Q, immunity to noise, and is tunable over multiple distinct bands. The resonant circuit is implemented in conjunction with an integrated circuit oscillator that requires a tuned circuit to determine the frequency of operation. When the integrated circuit oscillator is used as a Local Oscillator (LO) within a wireless phone it is subjected to numerous sources of power supply noise. In a Code Division Multiple Access (CDMA) wireless phone system the power supply to portions of the RF transmit path are cycled on and off depending on the transmitted data rate. The present invention provides an oscillator with increased immunity to the noise induced on the power supply due to power supply cycling.

Abstract: A method and a circuit for minimizing glitches in phase-locked loops is presented. The circuit includes an input terminal connected to an input of a phase detector; a series of a charge pump generator, a filter and a voltage controlled oscillator connected downstream of the phase detector; and a frequency divider feedback connected between an output of the voltage controlled oscillator and a second input of the phase detector. The circuit provides for the inclusion of a compensation circuit connected between the charge pump generator and the filter to absorb an amount of the charge passed therethrough. This compensation circuit includes a storage element connected in series to two switches. The first switch is coupled to and controlled by an output of the charge pump and the second switch is coupled to and controlled by an output of a phase detector.

Abstract: A timing reference system is provided for correcting inaccuracies in an output of a crystal oscillator experienced by the crystal oscillator during use in a mobile platform. The system utilizes a three-axis accelerometer mounted adjacent to the crystal oscillator on a substrate for sensing the acceleration experienced by the crystal oscillator. An offset generator converts the acceleration measurements generated by the accelerometer to error correction signals. These error correction signals represent the offset values needed to compensate for crystal timing drift due to the acceleration acting on the crystal oscillator thereby allowing the system to produce a corrected timing reference signal.

Abstract: In an electronic circuit supplied from supply terminals, a terminal in the circuit being biased to a voltage between the supply terminal voltages, connections from power supply terminals are made via current generator means. The circuit is preferably an RF, balanced and/or oscillator circuit. The current generator means are preferably controllable current generators, preferably controlled by an AGC, or a common mode or differential voltage control circuit. Preferably, the controllable current generators comprise a FET or are substantially constituted by each one MOS-FET. A balanced, common-base, low-voltage Pierce crystal oscillator with two transistors and four to six current generator means is disclosed.

Abstract: An oscillator having multi-phase complementary outputs comprises a first plurality of single ended amplifiers connected in series to form an input and an output and a second plurality of single ended amplifiers connected in series to form an input and an output. The first and second plurality have the same odd number of amplifiers, A first feedback path connects the output to the input of the first plurality of amplifiers to establish oscillations in the first plurality of amplifiers at a frequency dependent upon the delay time from the input to the output of the first plurality. A second feedback path connects the output to the input of the second plurality of amplifiers to establish oscillations in the second plurality of amplifiers at a frequency dependent upon the delay time from the input to the output of the second plurality.

Abstract: A phase-locked loop (PLL) has a phase detector coupled to an output of the PLL and to a reference signal and a low pass filter including a first and a second charge pump coupled to an output of the phase detector. A capacitor is coupled to an output of the first charge pump, a first bias circuit coupled to the capacitor, the first bias circuit having a differential output. A voltage controlled ring oscillator has a plurality of differential inventer stages, each having a first input coupled to a first output of the first bias circuit and a second input coupled to a second output of the first bias circuit. A second bias circuit is coupled between the capacitor and the first bias circuit, an output of the second bias circuit being coupled to an input of the first bias circuit and to an output of the second charge pump. The PLL circuit exhibits a stable damping factor with respect to frequency.

Abstract: An oscillator which is used for a portable telephone or the like, comprises a transistor fabricated by MOS process, and entails a low level of noise other than the desired oscillation frequency. The oscillator includes quartz oscillating element 1 and a first amplifier 3 connected between input terminal 4 and output terminal 2. The first amplifier 3 has a first P-type transistor 11 and a first N-type transistor 12 both fabricated by MOS process. A gate 23 of the first P-type transistor 11 spans between a P-type source diffused region 22 and a P-type drain diffused region 21. A gate of the first N-type transistor 12 spans between an N-type source diffused region 18 and an N-type drain diffused region 19. The span of the gate 20 of the first N-type transistor 12 is longer than that of the gate 23, and the field strength is low, thereby lowering the noise level other than the oscillation frequency.

Abstract: A phase-locked loop (PLL) circuit having a voltage-controlled oscillator (VCO) is automatically calibrated for VCO center frequency and VCO gain during power up or responsive to a calibration signal. The VCO has several input voltage versus output frequency operating curves. During a calibration phase, proper VCO center frequency is selected by selecting one of the operating curves. VCO gain is then determined using the selected VCO operating curve. If the value of VCO gain is not within predetermined limits, VCO gain is adjusted accordingly, and the process of selecting a VCO operating curve and determining VCO gain is repeated.

Abstract: An oscillator includes a first sawtooth waveform generator for generating a first sawtooth waveform having a selectively started ramp portion and a second sawtooth waveform generator for generating a second sawtooth waveform having a selectively started ramp portion. A controller is also included for alternatingly controlling the first and second sawtooth waveform generators so that a transition to the ramp portion of one sawtooth waveform is based upon determining the ramp portion of the other sawtooth waveform reaching a trip point. The controller also sets the trip point substantially independent of a supply voltage so that the oscillator has reduced sensitivity to supply voltage changes.

Abstract: This invention relates to an oscillator that includes first and second switching elements that each have a control terminal, and first and second conduction terminals. The control terminal of the second switching element is coupled to the first conduction terminal of the first switching element, and the control terminal of the first switching element is coupled to the first conduction terminal of the second switching element. The oscillator also may include first and second capacitive elements, first and second inductive elements, and a resistive element. The first capacitive element may be coupled between the control terminal of the first switching element and a first reference node, and the second capacitive element may be coupled between the control terminal of the second switching element and the first reference node.

Abstract: Differential voltage controlled oscillators are provided including a differential oscillator core, a first linear capacitor, a second linear capacitor, a first phase noise reduction device, and a second phase noise reduction device. The differential oscillator core has a first output that is capacitively coupled to a first differential input thereof by a first semiconductor junction having a first non-linear capacitance, and a second output that is capacitively coupled to a second differential input thereof by a second semiconductor junction having a second non-linear capacitance. The first linear capacitor is electrically cross-coupled from the first differential input to the second output, while the second linear capacitor electrically cross-coupled from the second differential input to the first output. The first phase noise reduction device has a first non-linear capacitance characteristic, and is electrically cross-coupled from the first differential input to the second output.

Abstract: All PMOS (p channel metal oxide semiconductor) fully differential voltage controlled oscillator (VCO). A fully differential implementation within the present invention provides for a very effective rejection of common mode noises. In addition, the PMOS implementation of the present invention allows for a substantial reduction in 1/f noise. The PMOS fully differential VCO may be employed within phase locked loops (PLLs) and other applications that require a very clean signal (with very low noise) and that must be operable at very high frequencies. The present invention enables a very compact design, thereby minimizing extraneous noise pickup. The device may be over-driven with a higher power supply than is commonly used in prior art VCOs; the over-driving provides for a higher transconductance gm from the PMOS device enabling higher gain. A center-tapped inductor is shunted to ground in a manner that does not reduce the inductor's quality factor Q.