Regulated Patents (Class 331/186)
  • Patent number: 9178563
    Abstract: The voltage regulator device has a wide band amplifier having an input reference voltage, Vref and an input feedback voltage, Vfbk. The device has a source follower coupled to the wide band amplifier, the source follower coupled to an output of the wide band amplifier. The device has a VDD source, a regulator output, and a current source coupled to the source follower and the VDD source. The device has a low frequency path comprising a first transistor. The first transistor has a first gate, a first source, and a first drain. The first source is coupled to the VDD source. The first gate is coupled to a slow node, and the first drain is coupled to the regulator output. The low frequency path comprises a RC network, which has a capacitor, a resistor, and the slow node configured between the resistor and the capacitor. The device has a high frequency path comprising a second transistor. The second transistor has a second gate, a second source, and a second drain. The second source is coupled to the VDD source.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: November 3, 2015
    Assignee: Inphi Corporation
    Inventors: Guojun Ren, Karthik S. Gopalakrishnan
  • Patent number: 9148154
    Abstract: A delay-lock loop includes two feedback loops for controlling delay elements in the delay-lock loop. The first feedback loop includes a feedback circuit for generating a feedback signal indicating a delay adjustment based on a phase difference between an input clock signal to the delay-locked loop and an output clock signal generated by the delay-locked loop. The second feedback loop includes a power regulator that generates a regulated signal by regulating a power supply using the feedback signal as a reference. The delay-lock loop further includes a variable delay circuit including a resistor-capacitor network. The variable delay circuit controls a capacitance in the resistor-capacitor network based on the feedback signal and controls a resistance of the resistor-capacitor network based on the regulated signal. In this way, variable delay circuit generates the output clock signal by delaying the input clock signal based on both the feedback signal and the regulated signal.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: September 29, 2015
    Assignee: MoSys, Inc.
    Inventors: Prashant Choudhary, Aldo Bottelli, Charles W Boecker
  • Patent number: 9099995
    Abstract: Oscillator circuits and methods are disclosed. In an embodiment, a circuit includes a voltage controlled oscillator (VCO) and a regulator coupled to a supply input of the VCO. The circuit also includes an oscillation dampening circuit coupled to an output of the regulator. A resistance or a capacitance of the oscillation dampening circuit is configured to vary based on current provided to the VCO.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 4, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Jeffrey Mark Hinrichs, Luis Chen
  • Patent number: 9065382
    Abstract: Disclosed are circuits and methods for increasing an output frequency of an inductance-capacitance (LC) oscillator. In some embodiments, the LC oscillator can be implemented as a voltage-controlled oscillator (VCO) having differential outputs. When the VCO is implemented on a die, wirebond connections from the outputs to a ground results in an effective inductance that impacts a maximum frequency associated with the VCO. An electrical connection such as a wirebond between the differential outputs yields a reduction in the effective inductance thereby increasing the maximum frequency. In some embodiments, the wirebond between the differential outputs can be configured so that its contribution to mutual inductance is reduced or substantially nil.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: June 23, 2015
    Assignee: Skyworks Solutions, Inc.
    Inventor: Georgi Milev Taskov
  • Patent number: 9000857
    Abstract: A circuit generates a compensation signal that can remove noise in a VCO introduced by a supply signal (i.e., supply-side noise). The circuit includes two transistors connected in series. A resistor is connected between the gate of the first transistor and the supply signal, and a capacitor is connected between the gate of the second transistor and the supply signal. The circuit is designed so that the transconductance of one transistor is greater than or equal to twice the transconductance of a second transistor. The compensation signal is supplied through a capacitor, which compensates for capacitors in a VCO, to an internal supply node of the VCO. At the internal supply node, the compensation signal removes (or greatly reduces) the noise introduced by the supply signal noise, resulting in a less-noisy output signal from the VCO.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: April 7, 2015
    Assignee: STMicroelectronics International N.V.
    Inventors: Abhirup Lahiri, Nitin Gupta
  • Patent number: 8994460
    Abstract: A method and a phase locked loop (PLL) circuit for implementing compact current mode logic inductor capacitor voltage controlled oscillator for high speed communications, and a design structure on which the subject circuit resides are provided. The PLL circuit includes a current mode logic (CML) inductor capacitor (LC) Voltage Controlled Oscillator (VCO). The PLL circuit includes a reference circuit generates a virtual ground node for biasing noise sensitive components, providing level shifted VCO increment and decrement tuning values from a phase detector coupled by a respective resistor to tune a varactor of the LC VCO, and providing a loop filter function. The virtual ground node tracks a logic power supply noise, incurring no jitter penalty, and eliminating the need for a separate power supply for the PLL circuit.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: March 31, 2015
    Assignee: International Business Machines Corporation
    Inventors: Grant P. Kesselring, James D. Strom, Kenneth A. Van Goor, Kennedy K. Cheruiyot
  • Patent number: 8988159
    Abstract: There is provided an oscillator capable of lowering the power supply voltage without degrading the phase noise, while employing the conventional circuit configuration. According to one aspect of the present invention, there is provided an oscillator comprising: an oscillation circuit; a bias generation circuit for generating a bias signal to drive the oscillation circuit; and a booster circuit for boosting a power supply voltage to generate a boosted voltage for driving the bias generation circuit. In addition, the oscillation circuit, the bias generation circuit, and the booster circuit are provided in a single IC chip, and the booster circuit may receive the power supply voltage VDD from the power supply arranged at the exterior of the IC chip.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: March 24, 2015
    Assignee: Asahi Kasei Microdevices Corporation
    Inventor: Haruhiko Maru
  • Patent number: 8981862
    Abstract: A voltage controlled oscillator (VCO) core for cancelling a supply noise is described. The VCO core includes an input node that receives the supply noise. The VCO core also includes a noise path coupled to the input node. The VCO core additionally includes a cancellation path coupled to the input node and the noise path. The cancellation path includes a programmable gain circuit coupled with a first terminal of a varactor. The supply noise passes through the programmable gain circuit to produce a cancellation noise.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: March 17, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Li Liu, Chiewcharn Narathong
  • Patent number: 8981856
    Abstract: An oscillator circuit includes an adjustable frequency oscillator configured to free-run at a first frequency below a desired second target frequency. This adjustable frequency oscillator is configured to modulate a frequency of its periodic output signal upwards from the first frequency to the second frequency in response to a feedback bias current. A divider is also provided, which is configured to convert the periodic output signal to a reduced-frequency control signal. This reduced-frequency control signal is provided to a frequency-to-current (F2C) converter, which is configured to drive the adjustable frequency oscillator with the feedback bias current (e.g., pull-down current) in response to the reduced-frequency control signal.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: March 17, 2015
    Assignee: Integrated Device Technology, Inc.
    Inventor: Trevor Newlin
  • Patent number: 8975976
    Abstract: A power management apparatus and method for maintaining a substantially constant duty cycle of a reference clock signal in a multi-power oscillator, includes a first output power transistor in electrical parallel with a series arrangement of a second output power transistor and a switch, and a crystal oscillator capacitively coupled to a common gate of the first and second output power transistors, wherein a level of the reference clock signal power output is a normal power level when the switch is open and the level of the reference clock signal power output is a higher power level when the switch is closed to operate the second output power transistor in parallel with the first output power transistor.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: March 10, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Jingyu Hu, Michael Naone Farias
  • Patent number: 8975977
    Abstract: LC tank and ring-based VCOs are disclosed that each include a differential pair of transistors for steering a tail current generated by a current source responsive to a bias voltage. A biasing circuit generates the bias voltage such that a transconductance for the transistors in the differential pairs is inversely proportional to a resistance.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: March 10, 2015
    Inventor: Mohammad Ardehali
  • Patent number: 8970314
    Abstract: With some embodiments, a VCO (voltage controlled oscillator) operates at an integer multiple (N) above a desired transmission frequency. In accordance with one embodiment, a chip is provided with a VCO to generate a signal and a frequency dividing circuit to provide a reduced frequency version of the signal to a transmit mixer. The transmit mixer is followed by a power amplifier that is on the same die as the VCO. The power amplifier is to generate an OFDM output transmission.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: March 3, 2015
    Assignee: Intel Corporation
    Inventors: Pankaj Goyal, Christopher Hull
  • Patent number: 8970311
    Abstract: In one embodiment, a voltage-controlled oscillator (VCO) is provided having an output signal having a frequency responsive to a tuning signal. The VCO includes: a plurality of inverters coupled to form a loop, each differential inverter having a differential pair of transistors configured to steer a tail current from a current source, the current source sourcing the tail current responsive to a bias voltage, each inverter stage including a plurality of switched-capacitor circuits configured to control a signal delay through the inverter stage response to the tuning signal so as to control the frequency of the output signal; and a bias circuit configured to generate the bias voltage responsive to a reference signal such that an amplitude of the output signal is substantially independent of the output signal frequency and depends upon the reference signal.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: March 3, 2015
    Inventor: Mohammad Ardehali
  • Patent number: 8957735
    Abstract: According to one embodiment, a phase locked loop (PLL) circuit includes an application unit, a correlator, an integrator and a power supply noise canceller. The application unit applies the test signal to a power supply voltage. The correlator extracts a frequency error signal as a monitor signal and calculates a correlation value for the test signal and the monitor signal to generate a correlation signal. The integrator integrates the correlation signal to generate an integral signal. The power supply noise canceller provides a cancellation gain corresponding to the integral signal to the power supply voltage to which the test signal is applied, to generate a control signal.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: February 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Akihide Sai
  • Patent number: 8922289
    Abstract: An oscillation circuit including a reference voltage generation circuit that adds a proportional-to-absolute-temperature (PTAT) output, which increases in proportion to an absolute temperature, to a complementary-to-absolute-temperature (CTAT) output, which decreases in proportion to an absolute temperature, to generate and output a reference voltage. The oscillation circuit generates an oscillation signal having a desired and fixed frequency.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: December 30, 2014
    Assignee: Spansion LLC
    Inventors: Kazuhiro Mitsuda, Kogi Okada, Suguru Tachibana
  • Patent number: 8922287
    Abstract: Systems and methods for amplitude loop control for oscillators. In some embodiments, an electronic circuit may include oscillator circuitry configured to produce a periodic signal, and control circuitry operably coupled to the oscillator circuitry, the control circuitry including switched capacitor circuitry configured to determine a difference between maximum and minimum peak voltage values of the periodic signal, the control circuit configured to control a voltage amplitude of the periodic signal based upon the difference. In other embodiments, a method may include receiving a clock signal from a clock generator, determining, using a switched capacitor circuit, a first peak voltage value of the clock signal, determining, using the switched capacitor circuit, a second peak voltage value of the clock signal, and controlling a bias current applied to the clock generator based upon a difference between the first and second peak voltage values.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: December 30, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Andre Luis Vilas Boas, Alfredo Olmos, Eduardo Ribeiro da Silva, Ricardo Maltione
  • Patent number: 8912853
    Abstract: A dynamic level shifter circuit and a ring oscillator implemented using the same are disclosed. A dynamic level shifter may include a pull-down circuit and a pull-up circuit. The pull-up circuit may include an extra transistor configured to reduce the current through that circuit when the pull-down circuit is activated. A ring oscillator may be implemented using instances of the dynamic level shifter along with instances of a static level shifter. The ring oscillator may also include a pulse generator configured to initiate oscillation. The ring oscillator implemented with dynamic level shifters may be used in conjunction with another ring oscillator implemented using only static level shifters to compare relative performance levels of the static and dynamic level shifters.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: December 16, 2014
    Assignee: Apple Inc.
    Inventors: James E. Burnette, Greg M. Hess, Shinye Shiu
  • Patent number: 8902011
    Abstract: A signal generating circuit for a real time clock device is disclosed, having an oscillating circuit, a voltage detecting circuit, and a control circuit. The oscillating circuit is used for generating oscillating signals. The voltage detecting circuit is used for detecting a voltage level coupled with the signal generating circuit. The control circuit is coupled with the oscillating circuit and the voltage detecting circuit. When the voltage level detected by the voltage detecting circuit locates in a predetermined range, the control circuit configures the oscillating circuit to generate the oscillating signals with a larger current at a first interval and to generate the oscillating signals with a smaller current at a second interval. The control circuit further generates a clock signal according to the oscillating signals at a third interval.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: December 2, 2014
    Assignee: Alchip Technologies, Ltd.
    Inventors: Wen-Hong Su, Zen-Chuan Lin
  • Patent number: 8896390
    Abstract: A circuit of inductance/capacitance (LC) voltage control oscillator (VCO) includes an LC VCO unit, a peak detector and a processing unit. The LC VCO unit receives a current control signal and outputs an oscillating voltage signal. The peak detector receives the oscillating voltage signal to obtain an averaged voltage value. The processing unit receives the averaged voltage value to accordingly output the current control signal and feedback to the LC VCO unit. The processing unit also detects whether or not the averaged voltage value has reached to a saturation state and a corresponding critical current. After the current control signal reaches to the critical current, the current control signal is set within a variance range near the critical current.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: November 25, 2014
    Assignee: Novatek Microelectronics Corp.
    Inventor: Chih-Hung Chen
  • Patent number: 8884711
    Abstract: A MEMS device and method for amplitude regulation of a MEMS device are disclosed. In a first aspect, the MEMS device comprises a MEMS resonator, a limiter coupled to the MEMS resonator, and a regulator coupled to the limiter. The MEMS device includes an amplitude control circuit coupled to the MEMS resonator. The amplitude control circuit controls a supply of the limiter via the regulator to regulate oscillation loop amplitude of the MEMS device. In a second aspect, the method includes coupling a regulator to the limiter, coupling an amplitude control circuit to the MEMS resonator, and controlling a supply of the limiter via the regulator to regulate oscillation loop amplitude of the MEMS device.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: November 11, 2014
    Assignee: InvenSense, Inc.
    Inventor: Vadim Tsinker
  • Patent number: 8884718
    Abstract: A substantially temperature-independent LC-based oscillator uses bias control techniques. Temperature independence may be achieved by controlling the harmonic frequency content of the output of the oscillator by controlling the amplitude. Amplitude control may be achieved by inserting a control mechanism in the feedback loop of the oscillator.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: November 11, 2014
    Assignee: Si-Ware Systems
    Inventors: Nabil M. Sinoussi, Mohamed M. Weheiba, Ahmed A. Helmy, Ahmed H. A. Razek, Ayman Ahmed
  • Patent number: 8878614
    Abstract: A PLL circuit includes an oscillator, a detection block, an integral path and a proportional path. The oscillator generates an oscillation signal. The detection block detects a phase difference between the oscillation signal and a reference signal and generates an integral signal that represents an integral value of the phase difference and a proportional signal that represents a current value of the phase difference. The integral path includes a regulator that receives the integral signal and supplies a regulated integral signal to the oscillator, and the regulator has a feedback loop including an error amplifier. The proportional path supplies the proportional signal, separately from the integral signal, to the oscillator. The oscillator generates the oscillation signal having an oscillation frequency controlled by both of the regulated integral signal and the proportional signal such that the phase of the oscillation signal is locked to the phase of the reference signal.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: November 4, 2014
    Assignee: MegaChips Corporation
    Inventors: Wenjing Yin, Anand Gopalan
  • Patent number: 8836444
    Abstract: An illustrative system includes an amplifier operably connected to a phase shifter. The amplifier is configured to amplify a voltage from an oscillator. The phase shifter is operably connected to a driving amplitude control, wherein the phase shifter is configured to phase shift the amplified voltage and is configured to set an amplitude of the phase shifted voltage. The oscillator is operably connected to the driving amplitude control. The phase shifted voltage drives the oscillator. The oscillator is at an internal resonance condition, based at least on the amplitude of the phase shifted voltage, that stabilizes frequency oscillations in the oscillator.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: September 16, 2014
    Assignee: Uchicago Argonne, LLC
    Inventors: Omar Daniel Lopez, Dario Antonio
  • Patent number: 8816786
    Abstract: A large gain is used to start up the oscillation of the crystal quickly. Once the oscillation starts, the amplitude is detected. A control circuit determines based on the measured amplitude to disable a low resistance path in the controlled switch array to reduce the applied gain below the power dissipation specification of the crystal. Another technique introduces a mixed-signal controlled power supply multi-path resistive array which tailors the maximum current to the crystal. A successive approximation register converts the amplitude into several partitions and enables/disables one of several power routing paths to the inverter of the oscillator. This allows a better match between the crystal selected by the customer and the on-chip drive circuitry to power up the oscillator without stressing the crystal. The “l/f” noise of the oscillator circuit is minimized by operating transistors in the triode region instead of the linear region.
    Type: Grant
    Filed: October 1, 2012
    Date of Patent: August 26, 2014
    Assignee: Tensorcom, Inc.
    Inventor: KhongMeng Tham
  • Patent number: 8810330
    Abstract: A DC power supply circuit comprises an output configured to provide a power supply signal to an RF element for generating an RF output signal. Furthermore, the DC power supply circuit comprises an input configured to receive the RF output signal. The DC power supply circuit is configured to generate the DC power supply signal based on the received RF output signal.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 19, 2014
    Assignee: Infineon Technologies AG
    Inventors: Saverio Trotta, Winfried Bakalski, Herbert Knapp
  • Publication number: 20140225504
    Abstract: A plasma processing apparatus includes a plasma generating device configured to generate a plasma within a processing vessel by using a high frequency wave generated by a microwave generator 41 including a magnetron 42 configured to generate the high frequency wave; detectors 54a and 54b configured to measure a power of a traveling wave that propagates to a load side and a power of a reflected wave reflected from the load side, respectively; and a voltage control circuit 53a configured to control a voltage supplied to the magnetron 42 by a power supply 43. Further, the voltage control circuit 53a includes a load control device configured to supply, to the magnetron 42, a voltage corresponding to a power calculated by adding a power calculated based on the power of the reflected wave measured by the detector 54b to the power of the traveling wave measured by the detector 54a.
    Type: Application
    Filed: February 11, 2014
    Publication date: August 14, 2014
    Applicant: Tokyo Electron Limited
    Inventors: Kazushi Kaneko, Naoki Matsumoto, Koji KOYAMA, Kazunori Funazaki, Hideo Kato, Kiyotaka Ishibashi
  • Patent number: 8803621
    Abstract: An oscillation circuit section is provided which can attain the reduction of a consumed power amount and the reduction of a manufacturing cost. In a semiconductor device, voltages are generated to drive the oscillation circuit section by using a plurality of MOS transistors which are connected in serial and each of which is in a diode connection. At this time, each voltage is generated based on a power supply voltage and a ratio of the threshold voltages of the plurality of MOS transistors. Therefore, it is possible to suppress the threshold voltage of each MOS transistor, to save an area of each MOS transistor, and to reduce the consumed power amount of the oscillation circuit section.
    Type: Grant
    Filed: September 15, 2012
    Date of Patent: August 12, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Sanae Suzuki
  • Patent number: 8766737
    Abstract: A constant voltage circuit which can realize a low consumption current, and a crystal oscillation circuit using the constant voltage circuit. The constant voltage circuit is provided with a temperature characteristic regulation element, in order to minimize a difference between a negative slope of a voltage response of a constant voltage to a temperature change and a negative slope of a voltage response of the smallest operation voltage that can oscillate in the crystal oscillation circuit to the temperature change, so that the consumption current of the crystal oscillation circuit is decreased. When the constant current generated by the constant voltage circuit is decreased, the consumption current of the constant voltage circuit is decreased, and the consumption current of the whole oscillation device is decreased.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: July 1, 2014
    Assignee: Seiko Instruments Inc.
    Inventors: Masaya Murata, Kotaro Watanabe, Makoto Mitani
  • Publication number: 20140176251
    Abstract: A technique for tracking changes in bias conditions of a microelectromechanical system (MEMS) device includes applying an electrode bias signal to an electrode of the MEMS device. The technique includes applying a mass bias signal to a mass of the MEMS device suspended from a substrate of the MEMS device. The technique includes generating the mass bias signal based on a target mass-to-electrode bias signal level and a signal level of the electrode bias signal.
    Type: Application
    Filed: December 20, 2012
    Publication date: June 26, 2014
    Applicant: Silicon Laboratories Inc.
    Inventors: Manu Seth, Aaron Caffee
  • Patent number: 8729974
    Abstract: A crystal oscillator circuit is configured to output an oscillation signal. A bias circuit responds to control signal to generate a bias current for application to the crystal oscillator circuit. A current generator generates a sense current from the control signal. The sense current is compared to a reference current by a comparator circuit. The comparator circuit generates a ready signal in response to the comparison. The ready signal is indicative of whether the oscillation signal output from the crystal oscillator circuit is ready for use by other circuitry. The reference current may be generated by a circuit which replicates the bias circuit.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: May 20, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giulio Zoppi, Raffaele Iardino
  • Patent number: 8710929
    Abstract: A system and method are provided for combined generation of I and Q signal references according to a periodic input signal and selective phase interpolation of an output signal with reference thereto. A ring oscillator portion generates an oscillator signal, and includes a plurality of delay stages interconnected in cascade to collectively execute an odd number of signal state inversions within a closed loop. The delay stages establish at respective nodes defined therebetween correspondingly delayed oscillator signal versions, successively shifted in phase by a predetermined phase difference. A signal injection portion selectively applies to at least one node of the ring oscillator portion a current bias according to the periodic input signal, and selectively adjusts each current bias in amplitude. The oscillator signal is thereby frequency locked to the periodic input signal, defining I/Q references with respect to the delayed oscillator signal version established at the current biased node.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: April 29, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventors: Eric Naviasky, Chris Moscone, Rajagopal Vijayaraghavan, Benjamin Louis Heilmann
  • Patent number: 8680933
    Abstract: A temperature-compensated oscillator includes a temperature sensor, a temperature compensation circuit, a voltage-controlled oscillation circuit adapted to output an oscillation signal on which temperature compensation is performed based on the temperature compensation voltage, an output circuit adapted to output an ON/OFF signal based on a relationship between variation of the detected-temperature voltage output by the temperature sensor and a reference voltage, a switch circuit adapted to supply the temperature compensation circuit with electrical power in response to the ON/OFF signal, and a sample-and-hold circuit adapted to be switched between a state of outputting the temperature compensation voltage to the voltage-controlled oscillation circuit while holding the temperature compensation voltage output by the temperature compensation circuit, and a state of outputting the temperature compensation voltage held to the voltage-controlled oscillation circuit while cutting the connection to the temperature c
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: March 25, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Katsuyoshi Terasawa
  • Publication number: 20140077892
    Abstract: A DC power supply circuit comprises an output configured to provide a power supply signal to an RF element for generating an RF output signal. Furthermore, the DC power supply circuit comprises an input configured to receive the RF output signal. The DC power supply circuit is configured to generate the DC power supply signal based on the received RF output signal.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Saverio Trotta, Winfried Bakalski, Herbert Knapp
  • Patent number: 8669825
    Abstract: A temperature-compensated oscillator includes a temperature compensation circuit adapted to output a temperature compensation voltage, a voltage-controlled oscillation circuit on which temperature compensation is performed based on the temperature compensation voltage, a switch circuit adapted to perform ON/OFF control on power supply to the temperature compensation circuit, and a sample-and-hold circuit adapted to perform switching control between an ON state of outputting the temperature compensation voltage to the voltage-controlled oscillation circuit while being connected to the temperature compensation circuit and holding the temperature compensation voltage output from the temperature compensation circuit when the power is supplied to the temperature compensation circuit, and an OFF state of outputting the temperature compensation voltage held to the voltage-controlled oscillation circuit while cutting connection to the temperature compensation circuit when the power supply to the temperature compensat
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: March 11, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Katsuyoshi Terasawa
  • Publication number: 20140062610
    Abstract: According to one embodiment, a switching unit switches between a first state in which the current source is connected to a first capacitance element and a ground electric potential is connected to a second capacitance element and a second state in which a current source is connected to the second capacitance element and the ground electric potential is connected to the first capacitance element. A comparison unit compares a voltage charged in the first capacitance element and a reference voltage with each other in the first state and compares a voltage charged in the second capacitance element and the reference voltage with each other in the second state. A generation unit generates a periodical pulse based on a comparison result acquired by the comparison unit. The switching unit alternately switches between the first state and the second state based on the comparison result acquired by the comparison unit.
    Type: Application
    Filed: March 13, 2013
    Publication date: March 6, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Rui ITO
  • Patent number: 8665029
    Abstract: A reference circuit for an oscillator module is provided. The reference circuit includes a reference voltage generation unit and a reference current generation unit. The reference voltage generation unit includes an electric element having a voltage proportional to absolute temperature (PTAT voltage) and provides a reference voltage based on the PTAT voltage. The reference current generation unit is coupled to the reference voltage generation unit and provides a reference current to the oscillator circuit to serve as an input current based on the PTAT voltage. The oscillator circuit generates a clock signal based on the reference voltage and the input current. The reference voltage and the input current are proportional to absolute temperature and have the same change trend relative to absolute temperature, such that the clock signal is a temperature insensitive signal. An oscillator module including an oscillator circuit and the foregoing reference circuit is also provided.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: March 4, 2014
    Assignee: Himax Technologies Limited
    Inventor: Wei-Kai Tseng
  • Patent number: 8643439
    Abstract: An oscillation circuit of a semiconductor apparatus includes a first level regulation unit configured to regulate an output voltage at an output node according to a difference between a reference voltage and the output voltage, and a second level regulation unit coupled between a power supply voltage terminal and a source voltage terminal.
    Type: Grant
    Filed: August 27, 2011
    Date of Patent: February 4, 2014
    Assignee: SK Hynix Inc.
    Inventor: Kwan Dong Kim
  • Patent number: 8604884
    Abstract: A ring oscillator that is more insensitive to power supply ripple utilizes an amplifier circuit having a first input coupled to a reference voltage. A current is generated that represents a control voltage supplied to the oscillator control circuit. That current is mirrored and supplied as a control current to the oscillator. An amplifier is used in a feedback loop to ensure that incremental variations in source to drain voltage of a first transistor of the current mirror is present in a second transistor of the current mirror to make the control current more immune to supply ripple.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: December 10, 2013
    Assignee: Silicon Laboratories Inc.
    Inventors: Abdulkerim L. Coban, Ravi Kummaraguntla
  • Patent number: 8593231
    Abstract: In accordance with some embodiments of the present disclosure, an oscillator may include a crystal resonator and a squaring circuit coupled to the crystal resonator and configured to convert a sinusoidal signal produced by the crystal resonator to a square-wave signal, the squaring circuit comprising a bias circuit configured to transmit a selected bias voltage for the squaring circuit, the selected bias voltage selected from a plurality of potential bias voltages. In accordance with this and other embodiments of the present disclosure, an oscillator may include a crystal resonator, an inverter coupled in parallel with the crystal resonator, and a programmable voltage regulator coupled to the inverter. The programmable voltage regulator may be configured to supply a first supply voltage to the inverter during a startup duration of the oscillator, and supply a second supply voltage to the inverter after the startup duration, wherein the second supply voltage is lesser than the first supply voltage.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: November 26, 2013
    Assignee: Intel IP Corporation
    Inventors: John Simmons, Kristopher Kaufman
  • Patent number: 8564377
    Abstract: A piezoresistive MEMS oscillator uses an output circuit to control the voltage across the resonator body. This results in a DC bias of the resonator. A current path is provided between the output of the output circuit and the resonator body, such that changes in current through or voltage across the resonator body, resulting from changes in resistance of the resonator body, are coupled to the output. This arrangement uses the bias current flowing through the resonator to derive the output. In this way, the same DC current is used to provide the required DC resonator bias and to drive the output circuit to its DC operating point.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: October 22, 2013
    Assignee: NXP B.V.
    Inventors: Petrus Antonius Thomas Marinus Vermeeren, Jozef Thomas Martinus van Beek
  • Patent number: 8552808
    Abstract: Embodiments of the present invention provide an oscillator having circuitry that measures the power dissipated in a resonator and circuitry that controls the power delivered to the resonator in response to the measured power. In some embodiments, the circuitry that measures the power dissipated in the resonator comprises circuitry that measures the voltage across the resonator, circuitry that measures the current through the resonator, and circuitry that calculates the power dissipated in the resonator based on the measured voltage and current.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: October 8, 2013
    Assignee: Tektronix, Inc.
    Inventors: Donald J. Delzer, Laszlo J. Dobos
  • Patent number: 8508307
    Abstract: An oscillation circuit including a reference voltage generation circuit that adds a proportional-to-absolute-temperature (PTAT) output, which increases in proportion to an absolute temperature, to a complementary-to-absolute-temperature (CTAT) output, which decreases in proportion to an absolute temperature, to generate and output a reference voltage. The oscillation circuit generates an oscillation signal having a desired and fixed frequency.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: August 13, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Kazuhiro Mitsuda, Koji Okada, Suguru Tachibana
  • Patent number: 8502611
    Abstract: A VCO circuit includes: a control portion to which a first voltage is inputted and from which a second voltage corresponding to the first voltage is outputted; a current source portion to which the second voltage is inputted and from which a current corresponding to the second voltage is outputted; and an oscillator circuit to which the current is inputted and from which a signal with a frequency in accordance with the current is outputted. The control portion includes an adjusting circuit which changes the second voltage in conjunction with fluctuation of a power supply voltage. Accordingly, fluctuation of the frequency Fo of an output signal of the VCO circuit can be suppressed even when the power supply voltage of the VCO circuit fluctuates.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takeshi Osada
  • Publication number: 20130059548
    Abstract: According to an embodiment, there is provided with an oscillator including: a clock circuit, a power supply current source and an oscillating circuit wherein the clock circuit generates a clock signal, the power supply current source generates a power supply current according to the clock signal, and the oscillating circuit generates an oscillation signal of a higher frequency than a frequency of the clock signal based on the power supply current and a received signal from an input terminal, the received signal having amplitude of a predetermined level or more.
    Type: Application
    Filed: June 18, 2012
    Publication date: March 7, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiyuki UMEDA, Shoji Otaka
  • Publication number: 20130027150
    Abstract: Various embodiments relate to a bias generator including: a bias generator circuit; a master startup circuit that applies current to a first node in the bias generator circuit; a second startup circuit that applies current to additional nodes in the bias generator circuit; and a power switch that receives a power from a power supply and that provides power to the bias generator circuit, the master startup circuit, and the second startup circuit.
    Type: Application
    Filed: July 27, 2011
    Publication date: January 31, 2013
    Applicant: NXP B.V.
    Inventors: Kevin Mahooti, Manket Gandhi
  • Patent number: 8362848
    Abstract: A supply-regulated VCO exhibits reduced or no supply sensitivity peaking. The VCO includes an oscillator whose supply current is regulated to control the oscillating frequency of the oscillator. A VCO input signal controls the supply current so that there is a relationship between the input signal and the oscillator output frequency. Power supply noise that might otherwise affect oscillator operation is shunted from a supply current input lead of the oscillator to ground by a bypass capacitor. In one example, an auxiliary circuit supplies an auxiliary supply current to the oscillator, thereby reducing the amount of supply current a supply regulation control loop circuit must supply. In another example, a supply regulation control loop circuit supplies a control current to a main oscillator, but the bypass capacitor is not coupled to this oscillator but rather is coupled to a slave oscillator that is injection locked to the main oscillator.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: January 29, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Ashwin Raghunathan, Marzio Pedrali-Noy, Sameer Wadhwa
  • Patent number: 8362844
    Abstract: A delay circuit includes a delay unit having a first and a second power supply terminals, a pair of differential signal input terminals and a pair of differential signal output terminals. The signals entered to the pair of differential signal input terminals are delayed and output at the pair of differential signal output terminals. The delay circuit also includes a current controller that exercises control to cause a current of a current source, controlled by a current control terminal, to flow through the first and second power supply terminals of the delay unit. The delay circuit also includes a voltage controller that exercises control to provide for a constant potential difference between the first and the second power supply terminals (FIG. 1).
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: January 29, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Fumio Nakano
  • Patent number: 8324977
    Abstract: The invention relates to an oscillator circuit comprising: a VCO core having an output terminal for providing an oscillatory output signal thereat and having a supply terminal for receiving a supply voltage from a voltage supply, a subsequent circuit coupled to the VCO core's output terminal and having a supply terminal for receiving a supply voltage from the voltage supply. According to the invention, a decoupling member is arranged between the VCO core's supply terminal and the subsequent circuit's supply terminal for preventing high-frequency signals generated by the subsequent circuit at its supply terminal from entering the VCO core. The decoupling member may comprise a transmission line the length of which is one quarter wavelength associated with a second-harmonic oscillation.
    Type: Grant
    Filed: May 13, 2008
    Date of Patent: December 4, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hao Li, Saverio Trotta
  • Patent number: 8319564
    Abstract: Integrated circuits with phase-locked loops are provided. Phase-locked loops may include an oscillator, a phase-frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a programmable divider. The voltage-controlled oscillator may include multiple inductors, an oscillator circuit, and a buffer circuit. A selected one of the multiple inductors may be actively connected to the oscillator circuit. The voltage-controlled oscillators may have multiple oscillator circuits. Each oscillator circuit may be connected to a respective inductor, may include a varactor, and may be powered by a respective voltage regulator. Each oscillator circuit may be coupled to a respective input transistor pair in the buffer circuit through associated coupling capacitors. A selected one of the oscillator circuits may be turned on during normal operation by supplying a high voltage to the selected one of the oscillator circuit and by supply a ground voltage to the remaining oscillator circuits.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: November 27, 2012
    Assignee: Altera Corporation
    Inventors: Weiqi Ding, Sergey Shumarayev, Wilson Wong, Ali Atesoglu, Sharat Babu Ippili
  • Patent number: 8319568
    Abstract: A method for compensating an oscillation frequency, a device, and a phase locked loop (PLL) is applied in the LC oscillating loop, including: sending voltage control signals to one end of a variable capacitor of an LC oscillating loop to generate oscillating signals in the LC oscillating loop through the voltage control signals; obtaining variable bias voltage that reflects changes of external parameters; and sending the variable bias voltage to the other end of the variable capacitor to compensate changes to the oscillation frequency of oscillation signals generated in the LC oscillating loop. This disclosure compensates the changes to the oscillation frequency of the circuit that contains the LC oscillating loop and improves the stability of the circuit oscillation frequency by sending bias voltage to one end of the variable capacitor of the LC oscillating loop.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: November 27, 2012
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Hongquan Sun