Abstract: A divider control circuit outputs a divider control signal that is meant to increase the division ratio from a first division ratio through a second division ratio greater than the first division ratio to a third division ratio greater than the second division ratio and then return the division ratio through a fourth division ratio smaller than the third division ratio to a fifth division ratio smaller than the fourth division ratio and greater than the first division ratio. Moreover, control is exerted so that the absolute value of the time rate of change of the division ratio in the increase from the second division ratio to the third division ratio is smaller than the absolute value of the time rate of change of the division ratio in the increase from the first division ratio to the second division ratio.

Abstract: An ultrasonic cutter detection method and device, the method comprises the following steps: preliminary detection: frequency amplitude detection and fall-of-potential detection, if the ultrasonic cutter fails the above two detection solutions in the preliminary detection, repeating the two detections; if the ultrasonic cutter still fails the above two detection solutions, the ultrasonic cutter is judged to be unqualified; and reinspection: free modal detection and pressure modal detection. Using differences of the ultrasonic cutters surface in micro-crack directions that result in different degrees of sensitivity of crack to different ultrasonic vibration modes, combined with the fall-of-potential method and frequency amplitude detection method, a detection rate and a detection velocity of an unqualified ultrasonic cutter can be improved.

Abstract: A multibeam-inductive-output-tube amplifier comprises an output cavity and a plurality of electron guns each intended to emit an electron beam through the output cavity, each electron gun comprising a cathode intended to emit the electron beam and a gate allowing the density of the electron beam to be modulated. The amplifier comprises, associated with each gun, a DC voltage supply, each of the supplies connected to the gate of the corresponding electron gun so as to bias the gate. The voltage of at least one of the supplies is adjustable so as to balance the density of the various electron beams.

Abstract: A method of initiating a fluid density measurement includes generating a prime resonance of a test fixture by a startup circuit. The method of initiating a fluid density measurement includes closing a feedback loop in response to generating the prime resonance. The method of initiating a fluid density measurement includes maintaining the prime resonance by closing the feedback loop.

Abstract: Provided is a data transmission system, including: a transmitting device configured to transmit a data signal; a receiving device configured to receive the transmitted data signal; and a transmission path for transmitting the data signal, the receiving device including: a detection unit configured to detect a timing at which a polarity of the received data signal is inverted; a plurality of resistors to be selectively connected to a terminal side of the transmission path; and a switching unit configured to switch the plurality of resistors based on the detected timing, the switching unit being configured to select a resistor having a higher resistance value than a characteristic impedance of the transmission path, during a first period, which is a predetermined period from a time point at which the polarity is inverted, and to select, after the first period, a resistor having the same resistance value as the characteristic impedance.

Abstract: A circuit may include a digitally-controlled oscillator including a coarse frequency-tuning array with a multiple selectable coarse frequency-tuning segments. Each of the coarse frequency-tuning segments may have a coarse segment frequency step size. The digitally-controlled oscillator may also include a fine frequency-tuning array with multiple selectable fine frequency-tuning segments. The fine frequency-tuning array may have a fine array frequency step size that is at least twice the coarse segment frequency step size. The digitally-controlled oscillator may be configured to generate an output signal with a frequency based on the coarse frequency-tuning array and the fine frequency-tuning array.

Abstract: The present invention relates to a radar level gauge system comprising a signal propagation device; a microwave signal source; a microwave signal source controller; a mixer configured to combine a transmit signal from the microwave signal source and a reflection signal from the surface to form an intermediate frequency signal; and processing circuitry coupled to the mixer and configured to determine the filling level based on the intermediate frequency signal. The microwave signal source is configured to exhibit a phase noise greater than or equal to ?70 dBc/Hz @ 100 kHz offset from a carrier frequency for the transmit signal.

Abstract: A system for sensing human activity by monitoring impedance includes a signal generator for generating an alternating current (AC) signal, the AC signal applied to an object, a reactance altering element coupled to the AC signal, an envelope generator for converting a returned AC signal to a time-varying direct current (DC) signal, and an analog-to-digital converter for determining a defined impedance parameter of the time-varying DC signal, where the defined impedance parameter defines an electromagnetic resonant attribute of the object.

Abstract: A method for increasing the accuracy of a time-domain apparatus comprising the following steps: initiating a periodic oscillation with the time-domain apparatus; measuring time intervals between trigger events during each oscillation, wherein the trigger events correspond to the oscillation passing known values; detecting a perturbation to the oscillation by monitoring changes in the time intervals between trigger events; and adjusting a parameter of the oscillation based on the perturbation such that measurement error is reduced.

Abstract: In an embodiment of the invention, a frequency divider in a phase-locked loop (PLL) circuit is provided power from the power supply that provides power to a transmission circuit. The PLL is configured to receive a first direct current (DC) reference voltage, a second DC voltage and a reference clock signal. The PLL is configured to generate a transmission clock signal. A transmission circuit is configured to receive the transmission clock signal, the second DC voltage and a data bus where the data bus includes a plurality of data bits in parallel. The transmission circuit transmits data serially.

Abstract: With an oscillator circuit with a frequency sweep function, a first counter counts a reference clock for a number of counts that corresponds to a digital first setting signal, and generates a first count completion signal which is asserted on completion of the count. A D/A converter converts a digital second setting signal into an analog control voltage. A VCO oscillates with a frequency according to the control voltage. When the first count completion signal is asserted, the VCO is reset. An output combining unit receives the output signal of the VCO, generates the output signal of the oscillator circuit, and generates the first setting signal and the second setting signal.

Abstract: A wireless receiver realizes multi-band and multi-mode operations while reducing power consumption of a local oscillator. The receiver includes the local oscillator for discontinuously changing a band of a local oscillation signal corresponding to a frequency band of an RF signal to be received and outputting the local oscillation signal, a frequency converter for converting the RF signal into an IF signal by using the local oscillation signal, and a demodulator for demodulating the IF signal. The local oscillator detects a frequency variation range of the local oscillation signal, obtains a frequency equivalent to an integral multiple of a symbol rate from the frequency variation range, and outputs the local oscillation signal having a local oscillatory frequency, causing a center frequency of a channel to be received, which channel is included in the intermediate frequency signal, to be equivalent to the integral multiple of the symbol rate.

Abstract: An integrated ramp, sweep fractional frequency synthesizer system on an integrated circuit chip includes an integrated circuit chip having a fractional frequency synthesizer with a fractional divider responsive to a VCO and a ?? modulator for modifying the divisor of the fractional divider; and a ramp generator on the same integrated circuit chip; the ramp generator being responsive to a trigger signal to generate a ramp for sweeping the frequency of said fractional frequency synthesizer.

Abstract: An oscillator device includes an oscillation system having an oscillator and an elastic supporting member, a detecting member for detecting oscillation amplitude of the oscillator, a driving member for driving the oscillator, and a control unit for generating a driving signal for driving the oscillator and for supplying the driving signal to the driving member, wherein the control unit reciprocally sweeps a driving frequency of the driving signal so that a resonance frequency of the oscillation system is included within a frequency range swept, wherein the control unit determines a resonance frequency based on at least two frequencies with which an oscillation amplitude value obtainable by the reciprocal sweeping reaches a maximum, and wherein the control unit generates the driving signal based on the determined resonance frequency.

Abstract: A collector sweeping method for controlling an electron beam in a beam collector, in particular of a magnetic gyrotron device, comprises the steps of subjecting the electron beam to a transversal sweeping field having a field component perpendicular to a longitudinal direction (z) of the beam collector and providing a tilted, rotating intersection area of the electron beam in the beam collector, and varying at least one of a longitudinal position and a tilting angle of the intersection area by a modulation of the transversal sweeping field. Furthermore, a collector sweeping apparatus and a microwave generator are described.

Abstract: Disclosed is a system and method for providing an oscillating signal of relatively precise frequency without using a signal provided by a crystal as a reference. Disclosed is a feedback oscillator circuit configured to output an oscillating signal having a frequency defined by a reference signal. The oscillating signal can be sent to one or more circuits including at least one frequency sensitive element. The frequency sensitive element produces an output signal which depends on the frequency of the oscillating signal. A controller controls the reference signal in order to cause an attribute of the output signal to have a value within a desired range.

Abstract: A fractional-N divider receives an input signal and supplies a divided signal divided in accordance with an integer divide control signal determined from a divide ratio. A phase interpolator is coupled to the fractional-N divider to adjust a phase of the divided signal according to a fractional portion of the divide ratio. The apparatus, responsive to a request for a frequency adjustment of the generated signal in a programmable number of steps, is configured to adjust the frequency of the generated signal from a beginning frequency to an ending frequency in the programmable number of steps by adjusting the supplied divide ratio at each step.

Abstract: An actuator driving apparatus comprises the following. A start signal generator generates a start signal having a frequency substantially equal to the resonance frequency of the movable portion of an actuator. A rock detector detects rock of the movable portion. A drive timing signal generator generates a drive timing signal based on the output of the rock detector. A switch is connected to the start signal generator and drive timing signal generator for selectively transmitting their outputs to a section arranged in a subsequent stage. A drive signal generator generates a drive signal based on the output of the switch, and supplies it to the actuator. A superposition preventing section prevents a frequency component of a frequency substantially equal to the resonance frequency from being superposed upon the output of the rock detector. The apparatus performs driving according to the rocking state of the movable portion, by switching the switch.

Abstract: An integrated ramp, sweep fractional frequency synthesizer system on an integrated circuit chip includes an integrated circuit chip having a fractional frequency synthesizer with a fractional divider responsive to a VCO and a ?? modulator for modifying the divisor of the fractional divider; and a ramp generator on the same integrated circuit chip; the ramp generator being responsive to a trigger signal to generate a ramp for sweeping the frequency of said fractional frequency synthesizer.

Abstract: A frequency synthesizer applied to a frequency hopping system includes a voltage controlled oscillator (VCO), a phase lock loop (PLL) system, a second frequency divider, a first SSB mixer, a second SSB mixer, and a multiplexer. The VCO generates an oscillating frequency. The PLL system includes a first frequency divider and divides the oscillating frequency by 10 to generate a first dividing signal. The second frequency divider divides the oscillating frequency by 2 to generate a second dividing signal and further divides the second dividing signal by 2 to generate a third dividing signal. The first SSB mixer mixes frequencies of the second and third dividing signals to generate a first mixing signal. The second SSB mixer mixes frequencies of the first mixing signal and the first dividing signal to generate a second mixing signal. The Multiplexer determines to output the first mixing signal or the second mixing signal.

Abstract: An oscillator device includes an oscillation system having an oscillator and an elastic supporting member, a detecting member for detecting oscillation amplitude of the oscillator, a driving member for driving the oscillator, and a control unit for generating a driving signal for driving the oscillator and for supplying the driving signal to the driving member, wherein the control unit reciprocally sweeps a driving frequency of the driving signal so that a resonance frequency of the oscillation system is included within a frequency range swept, wherein the control unit determines a resonance frequency based on at least two frequencies with which an oscillation amplitude value obtainable by the reciprocal sweeping reaches a maximum, and wherein the control unit generates the driving signal based on the determined resonance frequency.

Abstract: A synthetic test system for swept-frequency measurements that has a clock synchronization device to enable test boxes and devices that form the synthetic test system to have a common sense of time when conducting swept-frequency tests.

Abstract: In a method and a circuit arrangement for operating an ultrasound oscillation system, wherein an excitation voltage is applied to an ultrasound oscillation system comprising an ultrasound oscillator and components for forming an oscillation circuit for generating an excitation current and wherein the frequency of the excitation voltage is adjustable for operating the ultrasound oscillation system at a predetermined operating point, upon switching on the ultrasound oscillation system, the frequency, beginning with a startup frequency, is changed until the operating point is reached, and, upon switching off the ultrasound oscillation system, the frequency of the excitation circuit is recorded in a storage device and the recorded value is used for determining the startup frequency when the ultrasound oscillation system is again switched on.

Abstract: Ultrasound medical devices, systems and methods are described. According to an example method, an absolute value of a first input to a voltage controlled oscillator (VCO) is determined. The VCO is in electrical communication with an acoustic assembly of an ultrasound medical device. If the absolute value of the first input to the VCO is in a first range, a second input to the VCO is maintained. If the absolute value of the first input to the VCO is in a second range, the second input to the VCO is adjusted by a first voltage. If the absolute value of the first input to the VCO is in a third range, the second input to the VCO is adjusted by a second voltage.

Abstract: In an ultrasonic operation apparatus according to the present invention, in order to detect the initial resonance frequency (Fro) promptly once a foot switch is pressed, under the control of a sweeping speed control circuit, the D/A converter D/A converts 8-bits of signals (phase difference amount signal ??) representing the amount of the phase difference detected by the phase comparator, and the output of the D/A converter is output to a VCO so as to become a clock for a sweep circuit. When a phase difference amount between ?i and ?v is large and a drive frequency setting signal (Es) is far from Fro, the sweeping speed for Fro detection is increased. When a phase difference amount between ?i and ?v is small and Ps is close to Fro, the sweeping speed for Fro detection is decreased.

Abstract: There is provided a flexible transmission device capable of automatically setting an optimal point for a signal decision making with high accuracy, so that highly reliable high-quality signal regeneration control is achieved. A clock timing extraction circuit dynamically sets a frequency-dividing ratio based on the transmission rate of an input signal to perform a phase synchronization control so that there is a fixed phase difference between the input signal and an oscillation output, whereby clock timing based on the transmission rate can be extracted. A regeneration control circuit sequentially sweeps a voltage threshold level and the phase of the extracted cock with respect to the input signal and determines whether the levels of adjacent monitor points match, whereby a decision point within the valid zone of the eye pattern can be automatically measured and used as the optimal point for regeneration control.

Abstract: A single chip digital frequency synthesiser (1) for synthesising a frequency swept synthesised output signal of a selectable frequency sweep comprises a direct digital synthesiser (5) which produces the frequency swept synthesised output signal on an output terminal (7) in response to values of a frequency control digital word applied to a frequency control input (8) thereof by an on-chip data processing circuit (25). An on-chip programmable data storing circuit (12) is programmable to store data indicative of a selected mode in which the digital frequency synthesiser (1) is to operate, and to store data indicative of selectable frequency and the time domains of the frequency swept synthesised output signal to be produced.

Abstract: A receiver circuit includes an oscillator circuit configured to generate a calibration tone and a phase locked loop (PLL) reference signal. An output frequency of the VCO may be divided by respective amounts to derive a desired calibration tone frequency and a desired PLL reference signal frequency. In addition to the oscillator circuit, the receiver circuit may further include a phase locked circuit configured to generate a PLL output signal that is phase locked in relation to the PLL reference signal. During a calibration mode, a quadrature generator may be used to generate quadrature mixer local oscillator signals dependent upon the PLL output signal, and an in-phase/quadrature mixer may be used to mix the calibration tone with the quadrature mixer LO signals.

Abstract: An oscillator and a radar apparatus that includes a resonator electro-magnetically connected to a micro strip line and a rotor connected to the resonator by capacitance. The bottom surface of the rotor has a changing height in the circumferential direction of the rotor. As the rotor is rotated, an actual oscillation frequency is recognized from the rotating angle of the rotor when an output of a detector has a peak. A modulation voltage supplied to a VCO is corrected in accordance with the result.

Abstract: A high frequency sweep generator uses a DDS-PLL method for frequency sweep over wide frequency spans. A digital sweep generator produces a linear ramp signal using DDS techniques that is applied to a coarse tuning port of a high frequency tunable oscillator, such as a YIG tunable oscillator (YTO). A PLL has as inputs an accurate linear swept frequency sinusoid from a DDS and a linear swept frequency output signal from the YTO to produce an error correction signal that is applied to a fine tuning port of the high frequency tunable oscillator. The error correction signal compensates for any non-linearities introduced into the linear swept frequency output signal by the high frequency tunable oscillator.

Abstract: A transmitter for a wireless handset having a modified translation loop architecture. The transmitter includes a VCO that generates a modulated transmit signal having a frequency fTx, and a modulated signal source that generates a modulated LO signal with a frequency fLO. A mixer mixes the transmit signal with the LO signal to produce an IF signal having a frequency fIF. A first divider divides the LO signal frequency fLO by an integer M to generate a first comparison signal having a frequency fCF. A second divider divides the IF signal frequency fIF, after it is multiplied by an integer K, by an integer N to generate a second comparison signal having a frequency fCF. The transmit and LO signal frequencies have the relationship f Tx = f LO ? KM ± N M . A phase detector coupled to the first and second comparison signals compares the phases of the signals and outputs a control voltage to the VCO proportional to any phase differences between the signals.

Abstract: The present invention relates to an arrangement for phase locking of a Voltage Controlled Oscillator (VCO) to a selected frequency harmonic among a number of predetermined or available frequencies (harmonics), comprising a reference generator for generating a reference frequency, a phase lock loop (1; 101; 10; 4, 5, 6, 9) for producing an output signal in response to the input reference frequency, said phase lock loop comprising (enclosing) a phase defector (1), a loop filter (10), said VCO (5), adding means (4) and a power splitter (6). The arrangement also includes a sweep generator (9). It further comprises or is associated with storing means 82) for scoring information about, for each selectable or available frequency harmonic, a first (coarse) control voltage providing a VCO frequency output which is lower/higher than, and differs from the selected frequency (harmonic) by a given value (?f1).

Abstract: An analysis operation section uses a digital signal converted by an A/D converter, and performs frequency analysis for a modulation signal and modulation analysis for the modulation signal selected by a signal selection circuit in order to modulate/analyze a digital signal level of the modulation signal as an analysis object outputted from a level converter. A controller instructs the analysis operation section to execute an analysis instruction inputted via an operation input section, sends a selection instruction to the signal selection circuit in accordance with a modulation type of the inputted modulation signal, and sets a bandwidth of an RBW filter in accordance with the modulation type when the modulation signal having a band limited by the RBW filter is selected as the modulation signal inputted to the A/D converter, and the modulation analysis instruction is inputted.

Abstract: A transmitter for a wireless handset having a modified translation loop architecture. The transmitter includes a VCO that generates a modulated transmit signal having a frequency fTx, and a modulated signal source that generates a modulated LO signal with a frequency fLO. A mixer mixes the transmit signal with the LO signal to produce an IF signal having a frequency fIF. A first divider divides the LO signal frequency fLO by an integer M to generate a first comparison signal having a frequency fCF. A second divider divides the IF signal frequency fIF, after it is multiplied by an integer K, by an integer N to generate a second comparison signal having a frequency fCF.

Abstract: A sweep controller supplies a current to a YTO(YIG-Yttrium-Iron-Garnet Tuned Oscillator) from a current drive circuit in such a manner that frequencies corresponding to a first range in an oscillation frequency of the YTO designated as a desired frequency range for analysis with one sweep, and a second range designated as a frequency range higher than the first range for the analysis with the next one sweep are oscillated by the YTO. Moreover, the sweep controller outputs an instruction for increasing the current flowing through the YTO from the current drive circuit over a part of a period between an end of the first range and a start of the second range in order to shorten the period between the end of the first range and the start of the second range when it is detected that a difference between an end frequency of the first range and a start frequency of the second range is larger than a predetermined frequency difference.

Abstract: A system and method have been provided for a phase-locked loop (PLL) circuit to use a selectable VCO frequency range during the acquisition of a signal, with a larger VCO frequency sweep window once the signal is being tracked. The circuit uses a frequency detector during acquisition, and the VCO is limited to operation is a plurality of discrete frequency bands. Each frequency band is sequentially searched using the low VCO gain. Upon acquisition, the frequency band is locked in, a phase detector is utilized, and the VCO sweep window is increased for tracking purposes.

Abstract: An input clock signal is transformed into a complex analytic signal zc(t) by an analytic signal transforming means 13 and an instantaneous phase of its real part xc(t) is estimated using the analytic signal zc(t). A linear phase is removed from the instantaneous phase to obtain a phase noise waveform &Dgr;&phgr;(t). A peak value &Dgr;&phgr;max of absolute values of the &Dgr;&phgr;(t) is obtained, and 4&Dgr;&phgr;max is defined as the worst value of period jitter of the input signal. The &Dgr;&phgr;(t) is sampled at a timing close to a zero-crossing point of the xc(t) to extract the sample value. A differential between adjacent samples is obtained in the sequential order to calculate a root-mean-square value of the differentials (period jitters). An exp(−(2&Dgr;&phgr;max)2/(2&sgr;j2)) is calculated from the mean-square value &sgr;j and 2&Dgr;&phgr;max, and the calculated value is defined as a probability that a period jitter exceeds 2&Dgr;&phgr;max.

Abstract: Voltage controlled oscillator circuits are provided including a voltage controlled oscillator (VCO) having an input and an output responsive to the input. A tuning circuit coupled to the VCO sets a relationship between the input and the output of the VCO. An aided acquisition circuit is coupled to the input of the VCO. A control circuit selects a state of the tuning circuit to set the relationship between the input and the output of the VCO. The control circuit also controls operation of the aided acquisition circuit responsive to changes in the state of the tuning circuit. Methods for operating voltage controlled oscillator circuits are also provided. In addition, phase lock loop circuits and mobile terminals including the voltage controlled oscillator circuits are provided.

Abstract: The present invention provides a synthesizer having an efficient lock detect signal generator, an extended range VCO that can operate within any one of a plurality of adjacent characteristic curves defined by a plurality of adjacent regions, and a divide circuit implemented using only a single counter along with a decoder. This allows for a method of operating the synthesizer, methods of establishing or reestablishing a lock condition using the extended range VCO, and a method of designing a plurality of divide circuits which each use the same single counter and each use a different decoder.

Abstract: In one embodiment, a high-resolution measurement apparatus and method determine the position and motion of an object such as a human hand relative to a sensor array. Capacitance transferred to the array by the object within a sensor field produces minute phase changes in a fixed-frequency reference signal applied to the several elements of the array. The phase changes are measured by first heterodyning the phase-shifted reference signal with a second reference signal to obtain a low frequency intermediate signal, and then employing a phaselocked loop to multiply the phase information in the intermediate signal by orders of magnitude, thereby permitting the use of conventional methods to measure the resulting greatly magnified phase changes. Other embodiments provide direct digital measurement of unknown electrical properties, such as capacitance, inductance, and resistance.

Abstract: A multi-channel system is provided for both wide-band and narrow band low frequency transmission/reception of digital telemetry. The multi-channel system uses coherent detection having a high selectivity, and a quadrature detector having a high sensitivity. A filter is provided to average out noise. The multi-channel system oscillator is software controlled for scanning/multiplexing. The multi-channel system is used for data transmission over inductive, infrared, sonic and cable links.

Abstract: An inexpensive numerically-controlled fast frequency-hopping microwave synthesizer. A voltage-controlled oscillator (VCO) output phase remains locked to an internal direct digital synthesizer (DDS) reference signal over the entire output frequency band, which is an order of magnitude larger than the internal sampling clock frequency. A “Nyquist-boundary hopping” scheme compares signals from an alias band of the DDS with signals from an alias band of the sampled VCO output to derive an output phase error signal, which is forced to zero in a manner that locks the VCO output phase to the DDS output phase over a frequency hop-distance greater than the DDS bandwidth. Accordingly, in a single second, the synthesizer can hop phase-continuously in a single clock cycle to each of hundreds of thousands of different microwave output frequencies with relatively low clock rates (up to 100 MHz) commensurate with silicon application-specific integrated circuits (ASICs).

Abstract: In a method for seeking and setting a resonant frequency for a load impedance and a tuner for carrying out the method, a first frequency sweep is performed over a predetermined frequency interval in order to identify the resonant frequency within the predetermined frequency interval. To maintain the correct resonant frequency, regardless of signal drift and other interference, repeated sweeps are automatically performed within the predetermined frequency interval to identify the resonant frequency repeatedly. Alternating semi-sweeps can be performed to reduce the sweep duration.

Abstract: Improved phase synchronization circuits shorten the length of the synchronization pull-in time. The phase synchronization circuit according to the first invention changes the free-running frequency of the voltage control oscillation means starting from one limit frequency of the sweep range when detecting a state of non-synchronization and performing a synchronization pull-in operation. The phase synchronization circuit according to the second invention changes the free-running frequency of the voltage control oscillation means starting to one limit frequency of the sweep range faster than a prescribed speed and then changes the free-running frequency of the voltage control oscillation means to the other limit frequency of the sweep range at the prescribed speed when detecting a state of non-synchronization and performing a synchronization pull-in operation.

Abstract: A method and device for frequency synthesizing, in which the digital frequency synthesizer includes a clock pair having two similar ring-oscillators to separately generate a search frequency and an output frequency, a frequency tracking unit, and a clock controlling unit. The frequency-search method includes two stages: one stage is the coarse search stage based on the "Prune-and-Search", and other stage is the fine search stage based on the "fixed-step" algorithm. In order to determine which search scheme is used to search the target frequency and to determine the lock status, two cost functions for search and lock-in are derived. These two cost functions define the search threshold and the lock threshold, and these thresholds define the cost window and the lock window. If the frequency error is higher than both the search and lock thresholds, a coarse search is activated to estimate the correct frequency.

Abstract: The present invention relates to methods and devices for such control and supervision of an oscillator signal from a controllable oscillator that is done mainly to control the frequency variation of the oscillator signal. According to the invention, the controllable oscillator is controlled by a controlling voltage, which in turn is modified by a correction signal, generated in a control loop. A time discrete representation of a secondary phase is generated in the control loop, the secondary phase corresponding to a frequency being the difference between the frequency of the oscillator signal and a constant frequency. A time discrete approximation signal is generated in dependence of the time discrete representation of the secondary phase. A time discrete error signal is generated in dependence of the time discrete approximation signal, the time discrete error signal indicating the difference between the actual frequency slope of the oscillator signal and a desired frequency slope.

Abstract: An AFC circuit for a frequency scanning FSK receiver is so constructed that through put of data which can be transmitted is improved by shortening a header of a packet signal owing to the fact that frequency errors remaining when an object signal is caught by the frequency scanning and the frequency scanning is stopped are eliminated in a short period of time.In the frequency scanning FSK receiver having an AFC function, the scanning is stopped, when either one of upper and lower side band waves of a bit synchronizing signal of a desired signal is caught by the frequency scanning by means of a VCO, to which a scanning voltage from a scanning signal generator is applied. An operating circuit calculates a set voltage applied to the VCO at the AFC convergence to form it on the basis of a control voltage (scanning voltage) applied to the VCO at that time and a control sensitivity thereof as well as a detection voltage and a detection sensitivity of a frequency error detector at that time.

Abstract: A stabilised voltage controlled oscillator circuit comprises a closed loop circuit containing a voltage controlled oscillator (34), a local oscillator (40) and a harmonic mixer (38) that mixes a stabilised local oscillator (LO) frequency signal and a radio frequency (RF) signal from the voltage controlled oscillator (34) to obtain an intermediate frequency (IF) signal. An IF amplifier (42) is connected to a linear frequency discriminator (44) that provides an output signal to a summing amplifier (46), which is connected to the voltage controlled oscillator (34). The closed loop circuit uses the linear frequency discriminator (44) to provide a feedback signal that stabilises the voltage controlled oscillator (34).

Abstract: A system and method for generating a linear frequency sweep while also improving the phase noise characteristics of a microwave or millimeter wave signal source. The invention uses two phase lock loops. The first phase lock loop uses a linear frequency source to linearize a relatively low frequency VCO (typically around 100 MHz). The first phase lock loop has a bandwidth that is only wide enough to pass the radar modulation waveform with minimal distortion. The first phase lock loop includes a phase detector, narrow band loop filter, low noise HF VCO and a divide by M counter. The second phase lock loop is used to lock a millimeter wave VCO to the lower frequency of the low frequency VCO in the first loop. The low phase noise characteristics of this low frequency VCO are effectively impressed upon a microwave or millimeter wave, low noise high frequency VCO.

Abstract: A system for compensating for reference frequency drift in a communications system. The inventive system includes a frequency source for providing a reference frequency. An error determination circuit determines if the reference frequency is within a predetermined range of a desired reference frequency and provides an error signal in response thereto. A frequency correction circuit steps the reference frequency up and/or down by a predetermined amount in response to the error signal until the reference frequency is within the predetermined range of the desired reference frequency. In a specific embodiment, the predetermined amount is twice the short-term capture range of the reference frequency which corresponds to approximately four parts per million. The predetermined range is the short-term capture range or two parts per million. The predetermined range is dependent upon the reference frequency band in which the receiver can successfully receive and decode the receive signal.