Cascade Or Tandem Connected Patents (Class 331/50)
  • Patent number: 9000833
    Abstract: A method for compensating for strain on a MEMS device includes generating a signal indicative of a strain on the MEMS device in a first mode of operating a system including the MEMS device. The method includes compensating for the strain in a second mode of operating the system based on the signal. Generating the signal may include comparing an indicator of a resonant frequency of the MEMS device to a predetermined resonant frequency of the MEMS device. Generating the signal may include comparing a first output of a strain-sensitive device to a second output of a strain-insensitive device and generating an indicator thereof. Generating the signal may include sensing a first capacitive transduction of strain-sensitive electrodes of the MEMS device in the first mode and generating the signal based thereon. The strain-sensitive electrodes of the MEMS device may be disabled in the second mode.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: April 7, 2015
    Assignee: Silicon Laboratories Inc.
    Inventors: Aaron Caffee, Emmanuel P. Quevy
  • Patent number: 8994461
    Abstract: A cascaded oscillator array includes a first oscillator array and a second oscillator array. The first oscillator array includes at least three oscillator elements coupled unidirectionally in a first ring such that the first oscillator array outputs a first oscillating signal. Each of the at least three oscillator elements is coupled to receive a signal from a sensing element. The second oscillator array includes at least three oscillator elements coupled unidirectionally in a second ring such that the second oscillator array outputs a second oscillating signal. A first number of the at least three oscillator elements of the first oscillator array is the same as a second number of the at least three oscillator elements of the second oscillator. Each oscillator element of the at least three oscillator elements of the second oscillator array is coupled to receive an output signal from a single oscillator element of the at least three oscillator elements of the first oscillator.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: March 31, 2015
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Visarath In, Patrick Longhini, Yong (Andy) Kho, Antonio Palacios
  • Patent number: 8975973
    Abstract: A voltage controlled oscillation circuit oscillates at an oscillation frequency corresponding to a control voltage. Injection locked oscillation circuits oscillate at an oscillation frequency corresponding to an output signal from the voltage controlled oscillation circuit. A mixer circuit performs a frequency conversion based on output signals from the injection locked oscillation circuits. A synchronization determiner determines the synchronous status between the injection locked oscillation circuits in accordance with an output signal from the mixer circuit. The injection locked oscillation circuits synchronize with each other at a frequency that is an integral multiple of the oscillation frequency of the voltage controlled oscillation circuit.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: March 10, 2015
    Assignee: Panasonic Corporation
    Inventor: Junji Sato
  • Patent number: 8952760
    Abstract: A gated voltage-controlled oscillator receives a gating signal and outputs an oscillating signal having a frequency corresponding to the gating signal. The gated voltage-controlled oscillator includes a delay unit, having a first terminal and a second terminal, and a multiplexer, having a first input terminal, a second input terminal, a select terminal and an output terminal. The first input terminal and the select terminal are coupled to the gating signal. The second input terminal is coupled to the first terminal of the delay unit. The output terminal outputs the oscillating signal and is coupled to the second terminal of the delay unit. The delay unit delays the oscillating signal and outputs the delayed oscillating signal into the second input terminal. The multiplexer outputs a signal of the first input terminal or the second input terminal according to the gating signal.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: February 10, 2015
    Assignees: Global Unichip Corp., Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Shing Yu, Chia-Hsiang Chang, Ting-Hao Wang
  • Patent number: 8797105
    Abstract: The present disclosure provides a tunable signal source having a plurality of oscillator cores having a coupling input, a coupling output, and a power output that is common to each of the plurality of oscillator cores. Also included is a plurality of tunable phase shifters wherein corresponding ones of the plurality of tunable phase shifters are communicatively coupled between the coupling input and the coupling output of corresponding ones of the plurality of oscillator cores, thereby forming a loop of alternating ones of the plurality of oscillator cores and alternating ones of the plurality of tunable phase shifters.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: August 5, 2014
    Assignee: Cornell University
    Inventors: Ehsan Afshari, Yahya M. Tousi
  • Patent number: 8797108
    Abstract: A voltage control oscillator includes: first and second field effect transistors, a drain of one of which is connected to a gate of the other and a drain of the other of which is connected to a gate of the one; third and fourth field effect transistors, a drain of one of which is connected to a gate of the other and a drain of the other of which is connected to a gate of the one; a first inductor connected between the drain of the first field effect transistor and the drain of the second field effect transistor; a second inductor connected between the drain of the third field effect transistor and the drain of the fourth field effect transistor; a third inductor magnetically coupled to the first inductor; a fourth inductor magnetically coupled to the second inductor; a first capacitor; and a second capacitor.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: August 5, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Hirashiki, Shinichiro Ishizuka, Nobuyuki Itoh
  • Patent number: 8773182
    Abstract: A stochastic beating time-to-digital converter (TDC) can include triggered ring oscillator (TRO) and a stochastic TDC (sTDC). The TRO, when triggered by a reference signal edge, can generate a periodic TRO signal with a TRO period that is a selected ratio of a voltage-controlled oscillator (VCO) period. The TRO period can be greater than or less than the VCO period by the specified ratio. The sTDC with an event triggered memory can include an sTDC component with a plurality of groups of latches. Each group of latches can be configured to sample and store a VCO state at an edge of a TRO signal. The sTDC component can trigger a capture of a select number of VCO states of the group of latches when one latch in the group of latches transitions to a different digital state referred to as a transition edge.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: July 8, 2014
    Assignee: Intel Corporation
    Inventors: Ofir Degani, Ashoke Ravi, Hasnain Lakdawala, Rotem Banin
  • Patent number: 8659472
    Abstract: An apparatus includes a stable local oscillator, which includes a first control loop. The first control loop includes a first voltage-controlled oscillator configured to generate a first output signal and a first phase-locked loop. The apparatus also includes a frequency up-converter configured to increase a frequency of the first output signal. The apparatus further includes a second control loop configured to receive the up-converted first output signal. The second control loop includes a second voltage-controlled oscillator configured to generate a second output signal and a second phase-locked loop. The second control loop may further include a mixer having a first input coupled to the frequency up-converter, a second input coupled to the second voltage-controlled oscillator, and an output coupled to the second phase-locked loop. A reference frequency source may be configured to generate a signal identifying a reference frequency and to provide that signal to the phase-locked loops.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: February 25, 2014
    Assignee: Enraf B.V.
    Inventors: Bin Sai, Ronald C. Sehrier
  • Publication number: 20140043105
    Abstract: Methods and apparatuses featuring a multiplying injection-locked oscillator are described. Some embodiments include a pulse-generator-and-injector and one or more injection-locked oscillators. The outputs of the pulse-generator-and-injector can be injected into corresponding injection points of an injection-locked oscillator. In embodiments that include multiple injection-locked oscillators, the outputs of each injection-locked oscillator can be injected into the corresponding injection points of the next injection-locked oscillator. Some embodiments reduce deterministic jitter by dynamically modifying the loop length of an injection-locked oscillator, and/or by using a duty cycle corrector, and/or by multiplexing/blending the outputs from multiple delay elements of an injection-locked oscillator.
    Type: Application
    Filed: April 18, 2012
    Publication date: February 13, 2014
    Applicant: Rambus Inc.
    Inventors: Jared L. Zerbe, Barry W. Daly, Dustin T. Dunwell, Anthony C. Carusone, John C. Eble, III
  • Patent number: 8638175
    Abstract: A circuit including a first oscillator configured to oscillate at a first frequency; a second oscillator configured to oscillate at a second frequency, the second frequency being different from and one of a harmonic or sub-harmonic of the first frequency; and a coupling between the first oscillator and the second oscillator configured to injection lock at least one of the first oscillator and second oscillator to the other of the first oscillator and second oscillator.
    Type: Grant
    Filed: July 6, 2011
    Date of Patent: January 28, 2014
    Assignee: STMicroelectronics International N.V.
    Inventor: Prashant Dubey
  • Patent number: 8618887
    Abstract: A spread spectrum oscillator includes a high frequency oscillator circuit configured to oscillate at a first frequency, and a low frequency oscillator circuit configured to oscillate at a second frequency and resistively coupled to a current summing node of the high frequency oscillator circuit. The first frequency is higher than the second frequency.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: December 31, 2013
    Assignee: Hamilton Sundstrand Corporation
    Inventor: John A. Dickey
  • Patent number: 8615202
    Abstract: A frequency synthesizer includes: a first oscillator (1) controlled by a first control device, the first oscillator having a high quality factor that is greater than 300 and produces a first clock signal (2) RF having a fixed frequency, the first control device (30) controlling the frequency of the first controlled oscillator (1) on the basis of a first reference frequency; a second oscillator (3) controlled by a second control device and producing a second clock signal (4); the second control device (31) controlling the frequency of the second controlled oscillator (3) on the basis of a second reference frequency; and an integer frequency divider (5) dividing the frequency of the second clock signal (4) by a variable integer factor N1 and producing a third clock signal (6), the frequency of which is continuously variable by modifying the factor N1 and the control of the second oscillator.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: December 24, 2013
    Assignee: CSEM Centre Suisse d'Electronique et de Microtechnique SA—Recherche et Development
    Inventor: David Ruffieux
  • Patent number: 8598956
    Abstract: A device is provided having a local oscillator (LO) configured to generate a first signal comprising at least one of timing information, frequency information, phase information and combinations thereof. The device also has a LO error corrector comprising an input, the input configured to receive a second signal comprising at least one of timing information, frequency information, phase information and combinations thereof. The second signal is used for disciplining the LO. The LO error corrector is capable of disciplining the LO using a source that is less accurate than a preferred second signal, if the preferred second signal is unavailable to discipline the LO.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: December 3, 2013
    Assignee: Apple Inc.
    Inventor: Russell Smiley
  • Patent number: 8570108
    Abstract: An injection-locked oscillator circuit includes a master oscillator, a slave oscillator, and an injection lock control circuit. The slave oscillator is decoupled from the master oscillator (for example, due to an unlock condition). When the slave is free running, its oscillating frequency is adjusted (for example, as a function of a supply voltage). After an amount of time, the slave is to be relocked to the master (for example, due the unlock condition no longer being present). The slave oscillating frequency is made to be slightly lower than the master oscillating frequency. The slave is then only recoupled to the master upon detection of an opposite-phase condition between the master oscillator output signal and the slave oscillator output signal. By only recoupling the slave to the master during opposite-phase conditions, frequency overshoots in the slave oscillating frequency are avoided that may otherwise occur were the recoupling done during in-phase conditions.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: October 29, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Ashwin Ragunathan, Marzio Pedrali-Noy, Sameer Wadhwa
  • Patent number: 8564375
    Abstract: In one general aspect, an apparatus can include a reference oscillator counter circuit configured to produce a reference oscillator count value based on a reference oscillator signal, and a target oscillator counter circuit configured to produce a target oscillator count value based on a target oscillator signal where the target oscillator signal has a frequency targeted for calibration against a frequency of the reference oscillator signal. The apparatus can include a difference circuit configured to calculate a difference between the reference oscillator counter value and the target oscillator counter value, and a summation circuit configured to define a trim code based on only a portion of bit values from the difference.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: October 22, 2013
    Assignee: Fairchild Semiconductor Corporation
    Inventors: John R. Turner, Tyler Daigle
  • Patent number: 8558625
    Abstract: A technique for enhancing the frequency tuning range for monolithic RF source generation using fully-integrated coupled Voltage-Controlled-Oscillator (VCO) arrays that contain an odd number of VCOs. Fully-monolithic SiGe VCO arrays using on-chip inductor and varactor with on-chip bias current sources have been carefully designed and simulated in IBM 7HP 0.18 ?m BiCMOS technology and taped out for fabrication. The SPICE simulated frequency and phase tuning of the 1-D VCO×5 array is dependent on the edge VCOs termination impedance, the tuning voltages, and the VCO coupling strength. The simulated data suggests that the enhanced tuning range and beam steering can be accomplished using coupled-VCO arrays without needing complex and bulky phase shifters. This design technique imposes no apparent phase noise penalty but can provide simulated RF frequency tuning range of ˜40% and also ˜+/?25° beam steering for active antennas applications.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: October 15, 2013
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Yu-Chun Donald Lie, Brian Meadows, Joseph Neff, John Cothern, Jerry Lopez
  • Patent number: 8547178
    Abstract: A ring oscillator is disclosed. The ring oscillator includes a first tri-path inverter, a second tri-path inverter and a third tri-path inverter. The second tri-path inverter is connected to the first tri-path inverter. The third tri-path inverter is connected to the first and second tri-path inverters to provide feedback for oscillations.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: October 1, 2013
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Neil E. Wood, Patrick Fleming, Andrew T. Kelly, Bin Li, Daniel M. Pirkl
  • Patent number: 8456246
    Abstract: A quadrature VCO includes a first oscillator unit and a second oscillator unit. Each of the first and second oscillator unit is composed of a DC bias source, a complementary cross-coupled pair, an LC resonator unit, a frequency-doubling sub-harmonic coupler unit, and a ground terminal. When the LC resonator units of the first and second oscillator units are operated, four signals of different phases can be outputted via the output terminals. In this way, the output phase difference of the two oscillator units can keep 180 degrees and allow the two oscillator units to mutually inject signals to generate quadrature output signals.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: June 4, 2013
    Assignee: National Chung Cheng University
    Inventors: Shuenn-Yuh Lee, Liang-Hung Wang, Yu-Heng Lin
  • Publication number: 20130082786
    Abstract: A spread spectrum oscillator includes a high frequency oscillator circuit configured to oscillate at a first frequency, and a low frequency oscillator circuit configured to oscillate at a second frequency and resistively coupled to a current summing node of the high frequency oscillator circuit. The first frequency is higher than the second frequency.
    Type: Application
    Filed: September 29, 2011
    Publication date: April 4, 2013
    Applicant: HAMILTON SUNDSTRAND CORPORATION
    Inventor: John A. Dickey
  • Patent number: 8362848
    Abstract: A supply-regulated VCO exhibits reduced or no supply sensitivity peaking. The VCO includes an oscillator whose supply current is regulated to control the oscillating frequency of the oscillator. A VCO input signal controls the supply current so that there is a relationship between the input signal and the oscillator output frequency. Power supply noise that might otherwise affect oscillator operation is shunted from a supply current input lead of the oscillator to ground by a bypass capacitor. In one example, an auxiliary circuit supplies an auxiliary supply current to the oscillator, thereby reducing the amount of supply current a supply regulation control loop circuit must supply. In another example, a supply regulation control loop circuit supplies a control current to a main oscillator, but the bypass capacitor is not coupled to this oscillator but rather is coupled to a slave oscillator that is injection locked to the main oscillator.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: January 29, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Ashwin Raghunathan, Marzio Pedrali-Noy, Sameer Wadhwa
  • Patent number: 8344811
    Abstract: In a dual-hand capable voltage-controlled oscillator (VCO) device at least two voltage-controlled oscillator units (VCO1, VCO2) are coupled via a reactive component (A) and each said at least one voltage-controlled oscillator unit (VCO1, VCO2) further being connected to at least a respective external switching device (B1, B2) adapted to control an operating frequency of the (VCO) device.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: January 1, 2013
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventor: Mingquan Bao
  • Patent number: 8339208
    Abstract: A tunable multiphase ring oscillator includes a plurality of stages connected in series in a ring structure, where each stage generating a stage output from a stage input. Each stage of the tunable multiphase ring oscillator includes a plurality of trans-conductance cells, each generating an output from at least one portion of the stage input. Each stage further includes at least one phase shifting module for imparting at least one phase shift to the at least one portion of the stage input, an oscillator unit for generating the stage output from a combination of the plurality of outputs, and means for varying at least one of the plurality outputs so as to adjust a phase of the stage output.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: December 25, 2012
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Howard Cam Luong, Sujiang Rong
  • Publication number: 20120286882
    Abstract: Electronic circuitry comprising operational circuits of active switching type requiring timing signals, and conductive means for distributing said timing signals to the operational circuits, wherein the timing signal distribution means includes a signal path that has different phases of a drive signal are supplied via active means at different positions about the signal path where that path exhibits endless electro-magnetic continuity without signal phase inversion or has interconnections with another signal path having different substantially unidirectional signal flow where there is no endless electromagnetic continuity between those signal paths and generally has non-linear associated circuit means where the signal path is of a transmission line nature.
    Type: Application
    Filed: February 10, 2012
    Publication date: November 15, 2012
    Applicant: MULTIGIG, INC.
    Inventor: John Wood
  • Patent number: 8258879
    Abstract: A quadrature oscillator includes a first oscillator having a first second-order harmonic node, a second oscillator having a second second-order harmonic node, and at least one capacitor coupling the first second-order harmonic node and the second second-order harmonic node. The first oscillator is configured to supply an in-phase signal and the second oscillator is configured to supply a quadrature signal.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: September 4, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Ta Lu, Ho-Hsiang Chen, Chewn-Pu Jou, Fu-Lung Hsueh
  • Patent number: 8258881
    Abstract: A radio circuit may be driven by a high frequency oscillator such as a crystal oscillator that may have sleep and wake time intervals. The sleep time interval length may be adjusted. A low frequency oscillator or low power oscillator (LPO) that may experience frequency drift may regulate the sleep and/or wake time intervals. The frequency drift may be detected based on two or more LPO calibrations and/or one or more clock adjustments. The LPO frequency drift may be detected based on an LPO frequency sampled after a first LPO calibration and a corresponding LPO clock adjustment, a second LPO frequency sampled after a second LPO calibration and a time interval between the two frequency samples. The LPO may be calibrated based on the HFCXO output. Sleep time intervals may be adjusted by adding and/or subtracting a time interval to an expected time to wake the radio circuit.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: September 4, 2012
    Assignee: Broadcom Corporation
    Inventor: John Walley
  • Patent number: 8212622
    Abstract: An oscillation circuit includes: n ring oscillators each formed from m delay elements connected annularly, m being an integer equal to or greater than 2, n being an integer equal to or greater than 2; and a phase coupled ring.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: July 3, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuya Fujiwara, Shingo Harada
  • Patent number: 8174325
    Abstract: The present invention provides an array of tunable, injection-locking oscillators which are scalable to higher frequencies and measure the entire relevant frequency space simultaneously. The scalable, highly-parallelized, adaptive receiver architecture uses arrays of tunable, injection-locking nonlinear oscillator rings for broad spectrum RF analysis. Three separate and different microelectronic circuit configurations, each having a different type of readout, are described. The embodiments are designed to be incorporated as a subsystem in any type of powered system in which a fast image of the broader spectrum is valuable, when no information about the location of signals in the frequency space is predictable or forthcoming.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: May 8, 2012
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Daniel Leung, Joseph Neff, Norman Liu, Visarath In
  • Patent number: 8121223
    Abstract: A system and technique for providing to flexible, programmable frequency estimators and spectrum analyzers that can operate over extremely large bandwidths and yet provide high spectral resolution are described. The acquisition time and hardware complexity of one technique scale as O(N), where N denotes the number of frequency bins acquired. Embodiments are disclosed in which architectures are implemented using exponentially-tapered transmission lines and filter cascades.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: February 21, 2012
    Assignee: Massachusetts Institute of Technology
    Inventors: Soumyajit Mandal, Serhii M. Zhak, Rahul Sarpeshkar
  • Patent number: 8081037
    Abstract: An apparatus including a ring oscillator and related methods are disclosed. The ring oscillator includes at least two ring loops. A first ring loop includes a plurality of series coupled delay cells. At least one additional ring loop includes a plurality of series coupled delay cells. The at least one additional ring loop is coupled to the first ring loop by one or more common delay cells shared between the first ring loop and the at least one additional ring loops.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: December 20, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: Jonghae Kim, Lew G. Chua-Eoan, Matthew Nowak
  • Patent number: 8014466
    Abstract: There is provided a wide-band direct conversion transmitting apparatus including: a local oscillation unit generating first, second, and third oscillation signal pairs each including a pair of signals having a phase difference of 90°; an image rejection mixer unit mixing baseband transmission signals including an I signal and a Q signal having a phase difference of 90° with the first oscillation signal pair; a harmonic rejection mixer unit mixing each of the first, second, and third oscillation signal pairs with the baseband transmission signals; and an output signal selecting unit selecting output signals from the image rejection mixer unit or from the harmonic rejection mixer unit.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: September 6, 2011
    Assignee: Samsung Electro-Mechanics, Ltd.
    Inventors: Jun Ki Min, Jong Sik Kim, Hyun Chol Shin, Jeong Suk Lee
  • Publication number: 20110193659
    Abstract: An apparatus comprises a structure, an array of oscillator units, a plurality of waveguides in the structure, and a synchronizing cavity located within the structure. The array of oscillator units has a plurality of rows and a plurality of columns associated with the structure. Oscillator units in a row within the array of oscillator units are directly coupled to each other. The plurality of waveguides is configured to couple the array of oscillator units to the synchronizing cavity. The synchronizing cavity is configured to cause the array of oscillator units to operate at substantially a common frequency.
    Type: Application
    Filed: February 5, 2010
    Publication date: August 11, 2011
    Applicant: The Boeing Company
    Inventors: Jonathan James Lynch, Perry A. MacDonald
  • Patent number: 7902931
    Abstract: A device includes a plurality of channel-capture circuits. Each circuit may include an array of N non-linear oscillators, wherein N?3, circularly connected to each other in series such that unidirectional signal flow occurs between the oscillators. Each circuit may be configured to capture a respective channel signal from a wideband signal containing a plurality of channel signals and convert its captured channel signal to a lower frequency. Each oscillator may include an oscillator input configured to receive an output signal from another oscillator, an oscillator output configured to provide an output for an input of another oscillator, a frequency capture input configured to receive at least a portion of the wideband signal, at least two amplifiers, and a control capacitor coupled to the output of the amplifiers. An analog-to-digital converter may be coupled to the output of each channel-capture circuit.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: March 8, 2011
    Assignee: The United States of America as represened by the Secretary of the Navy
    Inventors: Visarath In, Patrick Longhini, Yong (Andy) An Kho, Joseph D. Neff, Adi R. Bulsara, Frank E. Gordon, Norman Liu, Suketu Naik
  • Patent number: 7902930
    Abstract: Provided is a colpitts quadrature voltage controlled oscillator capable of obtaining quadrature orthogonal signals using a quadrature combination between a base and a collector of each transistor, without using an additional circuit such as a coupled transistor, a coupled transformer, a multiphase RC filter, etc. Accordingly, since nonlinearity, increased phase noise, a decrease in the Q-factor of an LC resonator, and increased power consumption can be avoided, a colpitts quadrature voltage controlled oscillator that has low phase noise, low electric power consumption, and a compact size can be implemented.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: March 8, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ja Yol Lee, Sang Heung Lee, Hyun Kyu Yu
  • Publication number: 20100277247
    Abstract: An oscillation circuit includes: a first oscillation circuit and a second oscillation circuit, wherein the first oscillation circuit includes a first input side electrode electrically connected to a first oscillator and a first output side electrode electrically connected to the first oscillator, and the second oscillation circuit includes a second input side electrode electrically connected to a second oscillator and a second output side electrode electrically connected to the second oscillator, wherein the distance between the first output side electrode and the second input side electrode is greater than the distance between the first input side electrode and the first output side electrode.
    Type: Application
    Filed: April 28, 2010
    Publication date: November 4, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Takayuki KONDO
  • Publication number: 20100156543
    Abstract: An oscillator having a plurality of operatively coupled ring oscillators arranged in hyper-matrix architecture. The operatively coupled ring oscillators are either identical or non-identical and are coupled through a common inverter or tail current transistors.
    Type: Application
    Filed: December 22, 2009
    Publication date: June 24, 2010
    Applicant: STMicroelectronics Pvt. Ltd.
    Inventor: Prashant Dubey
  • Patent number: 7741921
    Abstract: A Trigger-Mode Distributed Wave Oscillator that provides accurate multiple phases of an oscillation and a method of use of the same. An auxiliary oscillator triggers an oscillation on independent conductor loops or rings forming a differential transmission medium for the oscillation wave. Once the oscillation wave is triggered, the auxiliary oscillator can be powered down to turn it off, and the wave can sustain itself indefinitely through active amplifying devices which can compensate for losses in the conductors.
    Type: Grant
    Filed: May 5, 2008
    Date of Patent: June 22, 2010
    Assignee: Waveworks, Inc.
    Inventor: Damir Ismailov
  • Publication number: 20100109810
    Abstract: A resonator and a filter that can be miniaturized and highly integrated are provided. In the invention, a resonator wherein parts of resonators, support sections, and joint sections are mutually shared is formed. The mutual configuration is selectively switched as required and a large number of frequencies can be selected in the same filter unit. The resonators, the support sections, and the joint sections different in size and shape are used in combination, whereby a filter unit having a large number of selective frequencies is provided.
    Type: Application
    Filed: September 19, 2006
    Publication date: May 6, 2010
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Akinori Hashimura
  • Patent number: 7675371
    Abstract: Electronic circuitry comprising operational circuits of active switching type requiring timing signals, and conductive means for distributing said timing signals to the operational circuits, wherein the timing signal distribution means includes a signal path that has different phases of a drive signal are supplied via active means at different positions about the signal path where that path exhibits endless electro-magnetic continuity without signal phase inversion or has interconnections with another signal path having different substantially unidirectional signal flow where there is no endless electromagnetic continuity between those signal paths and generally has non-linear associated circuit means where the signal path is of a transmission line nature.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: March 9, 2010
    Assignee: Multigig Inc.
    Inventor: John Wood
  • Patent number: 7653356
    Abstract: A wireless communication device is disclosed wherein isolation buffers couple to respective active circuits or stages of the device to convey test information regarding such active circuits to a test data line from which status information may be collected. The communication device operates in two modes, namely a normal operational mode wherein the isolation buffers effectively short spurious emissions from the active circuits to a ground, and a test mode wherein the isolation buffers may convey test information from a selected active circuit to the test data line. The isolation buffers prevent spurious emissions from escaping the active circuits to which they are coupled and prevent spurious emissions from traveling from active circuit to active circuit over the test data line throughout the wireless device.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: January 26, 2010
    Assignee: Silicon Laboratories Inc.
    Inventors: Donald A. Kerth, James Maligeorgos, Xiaochuan Guo, Augusto Manuel Marques
  • Publication number: 20090237168
    Abstract: A voltage controlled oscillator comprises first and second voltage controlled oscillator cones (4, 6) for generating I and Q quadrature components respectively. Each of the voltage controlled oscillator cores comprises an inductor (41, 61). A connecting member (70) is electrically coupled to each of said inductors, thereby forcing the same common mode level in the I and Q core of the VCO. The invention has the advantage of providing a simple method of ensuring that the same common mode level is used in the I and Q cores of a cross-coupled VCO, and is particularly advantageous at high operating frequencies. The invention also has the advantage of overcoming potential start up issues, and reduces the sensitivity to device mismatch effects which become more apparent when designing in small geometry processes such as 130 nm CMOS, as the smaller device sizes can often result in greater mismatches.
    Type: Application
    Filed: September 10, 2007
    Publication date: September 24, 2009
    Inventor: David Wilson
  • Patent number: 7519140
    Abstract: An automatic frequency correction phase-locked loop (PLL) circuit includes an analog control circuit and a digital control circuit. The digital control circuit includes a High-side comparator and a Low-side comparator which receive an analog control voltage, a state monitor circuit, and a counter and decoder circuit. At least one of the High-side comparator and the Low-side comparator includes a threshold switching circuit which selectively provides a first threshold voltage and a second threshold voltage, the first and second threshold voltages having different magnitudes. When the analog control voltage remains stable between the High-side threshold voltage and the Low-side threshold voltage and the threshold switching circuit is providing the first threshold voltage, the state monitor circuit switches the threshold switching circuit from the first threshold voltage to the second threshold voltage, thereby expanding the interval between the High-side threshold voltage and the Low-side threshold voltage.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: April 14, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tsutomu Yoshimura
  • Patent number: 7495516
    Abstract: A hybrid numeric-analog clock synchronizer, for establishing a clock or carrier locked to a timing reference. The clock may include a framing component. The reference may have a low update rate. The synchronizer achieves high jitter rejection, low phase noise and wide frequency range. It can be integrated on chip. It may comprise a numeric time-locked loop (TLL) with an analog phase-locked loop (PLL). Moreover a high-performance number-controlled oscillator (NCO), for creating an event clock from a master clock according to a period control signal. It processes edge times rather than period values, allowing direct control of the spectrum and peak amplitude of the justification jitter. Moreover a combined clock-and-frame asynchrony detector, for measuring the phase or time offset between composite signals. It responds e.g. to event clocks and frame syncs, enabling frame locking with loop bandwidths greater than the frame rate.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: February 24, 2009
    Inventor: Christopher Julian Travis
  • Patent number: 7427901
    Abstract: Signals outputted from oscillators (1-1, 1-2, . . . 1-n) are in phase with signals as reflected by band elimination filters (3-1, 3-2, . . . 3-n) at elimination frequencies of the band elimination filters (3-1, 3-2, . . . 3-n), while they are in opposite phase with signals leaked from the corresponding band elimination filters (3-1, 3-2, . . . 3-n). In this way, a stable oscillation can be performed with the oscillation frequencies of the oscillators (1-1, 1-2, . . . 1-n) balanced as optimum frequencies between the natural frequencies of the oscillators (1-1, 1-2 , . . . 1-n) and the elimination frequencies of the band elimination filters (3-1, 3-2, . . . 3-n), while the oscillators (1-1, 1-2, . . . 1-n) can be synchronized with the elimination frequencies being used as reference frequencies.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: September 23, 2008
    Assignee: Kyoto University
    Inventors: Hiroshi Matsumoto, Naoki Shinohara
  • Patent number: 7323945
    Abstract: A fully integrated, programmable mixed-signal radio transceiver comprising a radio frequency integrated circuit (RFIC) which is frequency and protocol agnostic with digital inputs and outputs, the radio transceiver being programmable and configurable for multiple radio frequency bands and standards and being capable of connecting to many networks and service providers. The RFIC includes a tunable resonant circuit that includes a transmission line having an inductance, a plurality of switchable capacitors configured to be switched into and out of the tunable resonant circuit in response to a first control signal, and at least one variable capacitor that can be varied in response to a second control signal, wherein a center resonant frequency of the resonant circuit is electronically tunable responsive to the first and second control signals that control a first capacitance value of the plurality of switchable capacitors and a second capacitance value of the at least one variable capacitor.
    Type: Grant
    Filed: February 10, 2005
    Date of Patent: January 29, 2008
    Assignee: BitWave Semiconductor, Inc.
    Inventors: Russell J. Cyr, Geoffrey C. Dawe
  • Patent number: 7161437
    Abstract: A ring oscillator of an even number of stages of inverting/summing amplifiers that adds, to an input of each of the amplifiers, a signal from one such of the amplifiers as to be distant by an even number of stages therefrom, to realize a desired oscillation operation, thereby directly generating signals having phases shifted by 90 degrees from each other. Further, the signals in the ring oscillator are complementary to each other, so that by arranging these signals close to each other in a wiring, it is possible to realize low sensitivity to a mixed external signal.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: January 9, 2007
    Assignee: Nagoya Industrial Science Research Institute
    Inventor: Akihiko Yoneya
  • Patent number: 7079611
    Abstract: A system and method for accurately detecting an asynchronous frequency within a synchronous digital system. The improved system and method preconditions the asynchronous frequency so that it does not introduce additional phase noise at low frequencies within a digital PLL. The system comprises a digitally controlled oscillator, having a preconditioner and a digital phase locked loop. The preconditioner receives an input clock signal and outputs a modified clock signal that is synchronized to a master clock signal. The digital phase locked loop receives the modified clock signal output from the preconditioner and outputs an output clock signal that is a version of the input clock signal synchronized to the master clock signal. The preconditioner preferably has a higher bandwidth than the digital PLL, and the preconditioner operates to noise shape phase noise of the synchronization to higher frequencies. The digital phase locked loop may then operate to remove the phase noise at the higher frequencies.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: July 18, 2006
    Assignee: National Instruments Corporation
    Inventor: Niels Knudsen
  • Patent number: 7026880
    Abstract: A quadrature VCO includes two cross-coupled differential pairs, two parallel LC tank circuits, two LO units and a plurality of source followers, supplying by a tail current source and a tail capacitor. The LC tank circuit constitutes of symmetrical spiral inductors and differential varactors, which constitutes of common anode diodes. The quadrature VCO circuitry is implemented on a chip with 2.4 GHz operating frequency. The quadrature VCO generates quadrature LO signals with high phase accuracy and good gain match under low power, good phase noise and small chip area, thus it can be applied to a variety of integrated transceivers.
    Type: Grant
    Filed: May 13, 2004
    Date of Patent: April 11, 2006
    Assignee: Winbond Electronics Corp.
    Inventors: Bingxue Shi, Baoyong Chi
  • Patent number: 6995620
    Abstract: An oscillator having multi-phase complementary outputs comprises a first plurality of single ended amplifiers connected in series to form an input and an output and a second plurality of single ended amplifiers connected in series to form an input and an output. The first and second plurality have the same odd number of amplifiers, A first feedback path connects the output to the input of the first plurality of amplifiers to establish oscillations in the first plurality of amplifiers at a frequency dependent upon the delay time from the input to the output of the first plurality. A second feedback path connects the output to the input of the second plurality of amplifiers to establish oscillations in the second plurality of amplifiers at a frequency dependent upon the delay time from the input to the output of the second plurality.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: February 7, 2006
    Assignee: Broadcom Corporation
    Inventor: Morteza Cyrus Afghahi
  • Patent number: 6960963
    Abstract: A cascaded voltage controlled oscillator is described that includes a first oscillator stage having a first oscillator stage first input, a first oscillator stage second input and a first oscillator stage output. A second oscillator stage includes a second oscillator stage input and a second oscillator stage output wherein the first oscillator stage output is input to the second oscillator stage input and wherein the second oscillator stage output is fed back to the first oscillator stage second input. A third oscillator stage includes a third oscillator stage input and a third oscillator stage output wherein the second oscillator stage output is fed to the third oscillator stage input.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: November 1, 2005
    Assignee: BerKana Wireless, Inc.
    Inventor: Beomsup Kim
  • Patent number: RE38862
    Abstract: An oscillator includes four identical cells each producing a phase shift of 90 degrees. The output signal from one cell is applied to the input of the next cell, and with the cells looping back to themselves. Each cell includes a current amplifier and a parallel inductance-capacitance resonant circuit configured such that the output current from one cell is a fraction of the capacitive current of the parallel resonant circuit. This causes the 90° phase shift between the input and output currents of each cell.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: November 1, 2005
    Assignee: STMicroelectronics S.A.
    Inventor: Frédéric Lemaire