Abstract: A digital oscillator generates a basic pulse having a period which is a predetermined large number of times of a clock pulse period. During the basic pulse period are allotted a predetermined small number of time slots defining submultiple frequency channels. There is provided a shift register having the channel number of stages, each stage being assigned to each channel. The contents of the respective stages are changed at respectively different periods which are multiples of the basic pulse period. The contents are taken out timewise-serially, one at a time, stage by stage, and superimposed on the basic pulse to constitute a time-division-multiplexed wave data signal. The delivered signal is demultiplexed to form individual waves having respectively different frequencies which are submultiple-related to the frequency of the basic pulse. This generator is very suitable for electronic musical instruments, as a single line transmits plural wave data.

Abstract: A digital oscillator generates a basic pulse having a period which is a predetermined large number of times of a clock pulse period. During the basic pulse period are allotted a predetermined small number of time slots defining submultiple frequency channels. There is provided a shift register having the channel number of stages, each stage being assigned to each channel. The contents of the respective stages are changed at respectively different periods which are multiples of the basic pulse period. The contents are taken out timewise-serially, one at a time, stage by stage, and superimposed on the basic pulse to constitute a time-division-multiplexed wave data signal. The delivered signal is demultiplexed to form individual waves having respectively different frequencies which are submultiple-related to the frequency of the basic pulse. This generator is very suitable for electronic musical instruments, as a single line transmits plural wave data.

Abstract: A digitally controlled oscillator is provided with a memory, storing the half periods T.sub.i (i=1, 2, ..., n) of corresponding frequencies f.sub.i =1/(2T.sub.i) to be generated, and with a digital feedback circuit, in which circuit the half periods taken from memory are decreased by a fixed time value .tau. on a time sharing basis, and in which circuit, as soon as the residual values .DELTA..sub.i,1 =T.sub.i -k.sub.i,1 .tau.<.tau. are obtained, these residual values are increased by the corresponding half periods T.sub.i also on a time sharing basis, and each value so increased is repeatedly decreased by the fixed time .tau.. On repeating this process j times, the residual values can be expressed by: .DELTA..sub.i,j =T.sub.i +.DELTA..sub.i,j-1 -k.sub.i,j .tau., where each k.sub.i,j is so large that 0.ltoreq..DELTA..sub.i,j <.tau.. The digital feedback circuit is connected to n residual value counters, which are each supplied with a series of residual values .DELTA..sub.

Abstract: A tone sender system for producing analog tone pairs for transmission of the digits comprising a telephone number. Dual codes, multi-frequency and touch calling multi-frequency, are produced to generate simulated test call originations. This tone sender system provides in a single source the capability to generate telephone call originations requiring either multi-frequency (MF) or touch calling multi-frequency (TCMF) tone pairs for the digit transmission. The tone code to be utilized is selectable.

Abstract: A clock pulse generating apparatus comprises a pulse generator for generating a pulse signal of a predetermined cycle, a frequency divider including a plurality of frequency division stages for frequency dividing an output pulse from the pulse generator, a circuit for subtracting at a predetermined ratio the number of clock pulses passing through a given frequency division stage in the frequency divider, a pulse control circuit including an external operation terminal for variably adding the number of pulses passing through another frequency division stage in the frequency divider, and a timing setting circuit for imparting a pulse subtracting timing and pulse adding timing to the pulse subtracting circuit and pulse control circuit, respectively.

Abstract: A programmable CMOS integrated circuit counter which compensates for fast or slow quartz crystal oscillators, particularly suited for watches. The circuit includes fuses which are programmed for a particular crystal; the programming is a function of the frequency deviation of the crystal oscillator from the standard frequency for that crystal oscillator. In the described watch circuit which employs a nominal 32,768hz crystal, compensation within .+-. 1ppm is obtained.

Abstract: A baud or repetition rate generator for providing required clock rates from a oscillator utilizing a commonly available crystal by counting to an integer, N, a number of times, m, and then counting to N+1 the remaining number of times, n, within a cycle having (m+n) parts, and providing an output pulse after each count of N and N+1.

Abstract: A high frequency variable oscillator has its frequency grossly set by a bandswitch and an uncalibrated coarse tuning control and finely tuned by an uncalibrated incremental control. The oscillator includes a broad band buffer circuit and a push-pull output circuit to provide an amplified isolated output having attenuated even harmonics. The oscillator includes a user programmable digital counter element connected to count the output of the oscillator. The counter includes timing circuitry and a multiple stage programmable ripple counter timed thereby. Each stage of the counter is connected to a latch decoder which is in turn connected to a digit display element. The latch decoders are connected to be controlled by the timing circuitry.

Abstract: A frequency shift keyed (FSK) generator producing an output frequency which is determined by gating through a selected one of a plurality of crystal controlled oscillators. The oscillator output is divided by a digital frequency divider to the operating tone frequency. The square wave output of the divider is filtered to a sinewave by an active tracking bandpass filter which is instantaneously switched to the operating frequency simultaneously with the selection of the appropriate crystal controlled oscillator.

Abstract: A frequency synthesizer operating in the quaternary system of numeration and comprising a plurality of "quaternade" units, each including a frequency inserting element with a mixer which receives respective frequencies equal to 63 A, 64 A, 65 A and 66 A, A being a predetermined frequency. The said frequencies are generated from a common standard frequency through dividing the standard frequency by variable ratios generating harmonics of the resulting frequencies and filtering.

Abstract: A precision test frequency generator capable of selectively providing a sinusoidal output wave within a frequency range simulating the output of a flowmeter yielding a sinusoidal signal whose frequency is proportional to flow rate, the signal having a noise component superimposed thereon. The generator is constituted by a stable high-frequency standard coupled to a selectable output counter providing intermediate-frequency pulses whose repetition rate is a sub-multiple of the high-frequency standard and a predetermined multiple of the desired output frequency of the generator. The pulses are converted into a triangular wave whose frequency corresponds to the desired output frequency, the triangular wave having a staircase formation whose number of steps is determined by the multiple. The triangular wave is converted into a sinusoidal wave of the same frequency with a staircase modulation component simulating the flowmeter output signal.

Abstract: A digital frequency synthesizer includes an oscillator and a variable frequency digital divider, whose divisor N is switchably selected for dividing the oscillator frequency. A counter accumulates a count related to the number of cycles of the divided oscillator frequency occurring in a unit time, with this number being used to set the divisor of a second digital frequency divider. The oscillator frequency is also divided by the second divider, with the resultant signal having a frequency of N Hz.

Abstract: A frequency conversion system for converting high to low frequencies. The system comprises a first frequency dividing means for frequency dividing the frequency of an input signal into 1/MN of the same, a voltage controlled oscillator, a second frequency dividing means for frequency dividing the output frequency of the voltage controlled oscillator into 1/(N + 1) of the same, a phase detector for controlling the voltage controlled oscillator such that the frequencies of the respective outputs of the first and second frequency dividing means are equal to one another, and means for sampling the input signal by using the output frequency of the voltage controlled oscillator to lower the frequency of the input signal to 1/N thereof.