Parallel Connected Patents (Class 331/56)
  • Patent number: 7808328
    Abstract: This disclosure relates to delay cells in a ring oscillator that include sub-cells having a gain that is a function of a variable control signal and sub-cells with a gain that is set by a fixed control signal.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: October 5, 2010
    Assignee: Infineon Technologies AG
    Inventors: Eva Tatschl-Unterberger, Nicola DaDalt
  • Patent number: 7801483
    Abstract: A transmitter (2) modulates information to be transmitted with an alternating-current signal having a predetermined frequency and includes a variable reactance section (16) which produces resonance with a stray capacitance (18) between a circuit ground (17) in the transmitter (2) and an earth ground (20) which strays from the earth ground (20) and a stray capacitance (19) between the human body (3) and the earth ground (20).
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: September 21, 2010
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Tadashi Minotani, Mitsuru Shinagawa
  • Patent number: 7777580
    Abstract: A coupled ring oscillator includes n ring oscillators (20) each including m inverter circuits (10), and a phase-coupling loop (40) in which m×n phase-coupling circuits (30), each of which couples signal phases at two points in a certain phase mode, are connected with each other to form a loop. Connection points at which the inverter circuits (10) are connected with each other and the connection points at which the phase-coupling circuits (30) are connected with each other are connected bijectively; and each of the inverter circuits (10) is connected between two points that divide the phase-coupling circuits (30) into two parts at a certain ratio.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: August 17, 2010
    Assignee: Panasonic Corporation
    Inventors: Shiro Dosho, Shiro Sakiyama, Noriaki Takeda
  • Patent number: 7777586
    Abstract: A multi-band electronic apparatus and method thereof is provided. The method comprises outputting a first output signal in the first band by a first voltage controlled oscillator according to a switch control signal and a control voltage, outputting a second output signal in the second band by a second voltage controlled oscillator according to the switch control signal and the control voltage, the second band being not completely overlapped by the first band, performing frequency division selectively on the first output signal or the second frequency divided signal according to the switch control signal, and outputting a first frequency divided signal, determining a phase difference between the first frequency divided signal and a reference signal to output a phase difference signal, outputting the control voltage according to the phase difference signal, and selectively driving the first or the second voltage controlled oscillators by the control voltage according to the switch control signal.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: August 17, 2010
    Assignee: Richwave Technology Corp.
    Inventors: Yi-Fong Wang, Wei-Kung Deng
  • Patent number: 7760031
    Abstract: A method is provided for reducing inter modulation distortion products using multi-carrier phase alignment of the type where a combined carrier signal is generated from the combined output carried waves of a plurality of numerically controlled oscillators in which the frequency of the carrier wave can be altered by changing an input value into the oscillator. In particular the initial phase of the output carrier waves is adjusted so that the peak amplitude of the combined carrier signal is minimized so that compression of the higher amplitude portions of the combined signal is reduced.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: July 20, 2010
    Assignee: Vecima Networks Inc.
    Inventors: Gregory Clayton Whittet, Surinder Kumar
  • Patent number: 7750747
    Abstract: A clock selection circuit and synthesizer that is capable of selecting an optimum clock signal from among a plurality of clock signals in a short time. A reference-clock counter counts clock pulses in an inputted reference clock signal (REF). A clock counter counts clock pulses in one of the plurality of clock signals which is selected by a selection unit and frequency-divided by a frequency divider. An instruction-signal output unit outputs a plurality of comparison-instruction signals during an interval in which a difference occurs between the counts of two of the plurality of clock signals having the closest frequencies. A comparison unit compares the count of the reference-clock counter and the count of the clock counter. The selection unit selects a clock signal by a binary search according to the result of the comparison.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: July 6, 2010
    Assignee: Fujitsu Limited
    Inventor: Masazumi Marutani
  • Patent number: 7733189
    Abstract: Control circuitry is disclosed including an oscillator operable to generate an oscillator signal. A frequency of the oscillator signal increases as an amplitude of a first voltage increases up to a threshold, and the frequency of the oscillator signal decreases as an amplitude of the first voltage exceeds the threshold. The oscillator is operable to generate a foldover signal indicating when the frequency of the oscillator signal is decreasing due to the first voltage exceeding the threshold.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: June 8, 2010
    Assignee: Western Digital Technologies, Inc.
    Inventor: George J. Bennett
  • Patent number: 7622998
    Abstract: The present invention provides a solid state intra-cavity absorption spectrometer comprising a solid-state gain device interspersed in an array of oscillators in a chamber to produce a wide area coherent high power source of Terahertz radiation. The source is then partitioned into two separate regions, one having a gain medium and one having a sample chamber that can be held a different pressure and is chemically isolated from the gain region thereby forming an intra-cavity absorption spectrometer.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: November 24, 2009
    Assignee: Sarnoff Corporation
    Inventor: Robert Amantea
  • Patent number: 7598817
    Abstract: An oscillator includes: oscillation units (11 through 1n) outputting oscillation signals of different frequencies; a transmission line (15) to which outputs of the oscillation units (11, 12) are connected, the transmission line having a characteristic impedance corresponding to an output impedance of an output terminal (Tout); and a low-pass filter 818) connected between the transmission line (15) and the output terminal.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: October 6, 2009
    Assignee: Fujitsu Media Devices Limited
    Inventors: Toshimasa Numata, Alejandro Puel
  • Patent number: 7581132
    Abstract: A method is provided for configuring a microcontroller clock system that includes a main oscillator, a phase locked loop, and a backup oscillator. According to the method, the main oscillator and the backup oscillator are activated in reset mode. A clock signal is generated from the backup oscillator, and the clock signal that is generated is applied to the microcontroller in order to start the microcontroller. Also provided are a clock system for a microcontroller, and a microcontroller including a clock system.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: August 25, 2009
    Assignee: STMicroelectronics SA
    Inventor: Olivier Plourde
  • Patent number: 7576616
    Abstract: A phase controlling apparatus is disclosed. The phase controlling apparatus controls phases of signals which are output from a plurality of signal sources corresponding to first phase information which indicates a phase of a predetermined signal. The phase controlling apparatus includes a phase information storing section and a phase controlling section. The phase information storing section stores second phase information which indicates a phase of a signal which is output from each of the plurality of signal sources. The phase controlling section changes a phase of a signal which is output from at least one of the plurality of signal sources corresponding to the second phase information stored in the phase information storing means to control the difference of phases of signals which are output from the plurality of signal sources.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: August 18, 2009
    Assignee: Agilent Technologies, Inc.
    Inventor: Katsuhito Iwasaki
  • Patent number: 7576618
    Abstract: The present invention discloses a frequency synthesizer, including: a plurality of frequency locking circuits, for locking a plurality of clock signals to output the clock signals according to a plurality of reference clock signals respectively; a selecting circuit, for selecting a specific clock signal from the clock signals as an output clock signal, wherein a specific frequency locking circuit of the frequency locking circuits locks the specific clock signal; and a control circuit, for controlling the frequency locking circuits. The control circuit controls at least one of the frequency locking circuits apart from the specific frequency locking circuit to lock another clock signal according to another reference clock signal at the same time. A related method for frequency synthesizing is also disclosed.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: August 18, 2009
    Assignee: Realtek Semiconductor Corp.
    Inventor: Ren-Chieh Liu
  • Patent number: 7573340
    Abstract: There is provided a temperature detecting apparatus for improving operational characteristics, which vary according to the temperature, of elements in a semiconductor memory device. The temperature detecting apparatus of the present invention includes: a first oscillator that outputs a first oscillating signal in response to a first oscillator reset signal, the first oscillating signal being independent of the temperature; a second oscillator that outputs a second oscillating signal in response to a second oscillator enable signal, the second oscillating signal being dependent on the temperature; a comparator that compares an output pulse of the first oscillator with an output pulse of the second oscillator and then outputs a temperature detection comparison signal; and an output unit that outputs a temperature detection signal in response to an input of the temperature detection comparison signals.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: August 11, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kyong-Ha Lee
  • Publication number: 20090187345
    Abstract: A time measurement device for a geologic downhole measurement tool is provided. The device includes a plurality of oscillators for measuring a time value. At least one of the plurality of oscillators has a first temperature range that is different from a second temperature range of at least another of the plurality of oscillators. A time measurement system and a method for providing a time measurement are also provided.
    Type: Application
    Filed: January 14, 2009
    Publication date: July 23, 2009
    Applicant: BAKER HUGHES INCORPORATED
    Inventor: Martin Blanz
  • Patent number: 7551041
    Abstract: An oscillator is provided that includes at least one capacitor, at least one comparator, and at least one device for charging or discharging the at least one capacitor. The capacitor is coupled to the comparator. The comparator compares the voltage on the capacitor with a reference voltage, and activates the device so as to command the charging or the discharging of the capacitor. The oscillator also comprises a circuit for supplying a preset voltage to the comparator when the device commands the charging of the capacitor, so that the comparator compares the reference voltage diminished by the preset voltage with the voltage on the capacitor, or the voltage on the capacitor added to the preset voltage with the reference voltage.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: June 23, 2009
    Assignee: STMicroelectronics s.r.l.
    Inventors: Antonino Conte, Alberto Josè Di Martino
  • Patent number: 7538624
    Abstract: The present invention is an oscillator including: first transistors outputting oscillation signals of different oscillation frequencies to collectors; a common node to which outputs of emitters of the first transistors are connected and input; a feedback circuit feeding an output of the common node to bases of the first transistors; and isolation circuits that are respectively provided between the emitters of the first transistors and the common node and cut off high frequency components from the common node.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: May 26, 2009
    Assignee: Fujitsu Media Devices Limited
    Inventors: Toshimasa Numata, Alejandro Puel
  • Patent number: 7535306
    Abstract: An oscillator coupling system includes a plurality of oscillating members and a plurality of delay members connecting at least two of the oscillating members. Between the delay members is a specific phase or time delay relationship such that characteristics of phase or frequency noise suppression correlation of the two oscillating members are coupled to each other by the delay members, thereby reducing noise autocorrelation while the oscillator coupling system is in operation, enhancing phase or frequency noise suppression, using no bulky elements such as solid state circulators, isolators and resonators, reducing signal distortion, and increasing system stability.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: May 19, 2009
    Inventor: Heng-Chia Chang
  • Patent number: 7519140
    Abstract: An automatic frequency correction phase-locked loop (PLL) circuit includes an analog control circuit and a digital control circuit. The digital control circuit includes a High-side comparator and a Low-side comparator which receive an analog control voltage, a state monitor circuit, and a counter and decoder circuit. At least one of the High-side comparator and the Low-side comparator includes a threshold switching circuit which selectively provides a first threshold voltage and a second threshold voltage, the first and second threshold voltages having different magnitudes. When the analog control voltage remains stable between the High-side threshold voltage and the Low-side threshold voltage and the threshold switching circuit is providing the first threshold voltage, the state monitor circuit switches the threshold switching circuit from the first threshold voltage to the second threshold voltage, thereby expanding the interval between the High-side threshold voltage and the Low-side threshold voltage.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: April 14, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tsutomu Yoshimura
  • Patent number: 7492194
    Abstract: An oscillator includes phase frequency detectors, each detecting the phase difference between two input signals (output signal and external reference signal) and outputting a control command signal for controlling the output signal to achieve a desired frequency on the basis of the phase difference. A plurality of ICs, each including a phase frequency detector, frequency dividers, a charge pump, and a lock detection circuit, is operated in parallel. A composite control command signal generated by combining outputs of the phase frequency detectors is output via a loop filter to a voltage-controlled oscillator. Whether phase noise is reduced sufficiently is determined on the basis of detection results by an amplitude detection circuit for detecting the amplitude of an AC component of the composite control command signal and the lock detection circuits. The phase frequency detectors are repeatedly reactivated until the phase noise is reduced sufficiently.
    Type: Grant
    Filed: April 17, 2006
    Date of Patent: February 17, 2009
    Assignee: Kobe Steel, Ltd.
    Inventors: Koyo Kegasa, Chitaka Manabe
  • Publication number: 20080284528
    Abstract: Disclosed is a resonator including a plurality of resonator elements each including at least oscillation parts and lower electrodes with an intervening space therebetween, in which the plurality of resonator elements are disposed in a closed system and the oscillation parts of the plurality of resonator elements are continuously formed in an integrated manner.
    Type: Application
    Filed: May 20, 2008
    Publication date: November 20, 2008
    Applicant: Sony Corporation
    Inventors: Shinya MORITA, Akira AKIBA
  • Patent number: 7414490
    Abstract: Disclosed is a dual-band voltage-controlled oscillator using bias switching and output-buffer multiplexing. The dual-band voltage-controlled oscillator includes a power supply unit for supplying a source voltage; plural voltage-controlled oscillation units for outputting different oscillation frequencies according to controls of a certain tuning voltage; plural bias units for generating driving voltages for driving the voltage-controlled oscillation units and supplying the driving voltages to the voltage-controlled oscillation units; and plural buffers for selectively outputting oscillation frequencies of the plural voltage-controlled oscillation units. The present invention implements the dual-band voltage-controlled oscillator through bias switching and output-buffer multiplexing, which brings an advantage of elimination of interference between output frequencies to enhance phase noise characteristics.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: August 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-yoon Jeon, Heung-bae Lee, Seong-soo Lee, Jinup Lim, Joongho Choi
  • Patent number: 7397314
    Abstract: A redundant clock source provides a stable clock source for digital system. The clock source uses two oscillators to generate a clock signal. If one of the oscillators fails, the clock signal is generated from the other oscillator until the failed oscillator is replaced. Special filtering of the waveforms produced by the oscillators makes the clock source is resistant to jitter from the oscillators and transients that occur when an oscillator fails. This allows the clock source to not only use a redundant oscillator in an attempt to eliminate a single point of failure, but to also provide a stable clock signal even if one oscillator fails.
    Type: Grant
    Filed: September 11, 2002
    Date of Patent: July 8, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Daniel Wissell
  • Publication number: 20070285179
    Abstract: Provided is a grid-type high-speed clock signal distribution network capable of reducing a difference in amplitude of a standing wave on a transmission line and of supplying a signal from any position. The network for transmitting the clock signal is such that ends of the differential signal transmission line are connected via an inductor, a low-amplitude segment is eliminated by a phase shift in the inductor and a standing wave of substantially uniform phase and amplitude is produced, wherein the number of lines connected to the grid point is made the same for entire grid points.
    Type: Application
    Filed: May 4, 2007
    Publication date: December 13, 2007
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Hiroaki Ikeda, Mamoru Sasaki, Atsushi Iwata, Mitsuru Shiozaki, Atsushi Mori
  • Patent number: 7276981
    Abstract: A three dimensional (3D) microwave monolithic integrated circuit (MMIC) multi-push voltage controlled oscillator (VCO) and methods of making the same is provided. The 3D MMIC multi-push oscillator includes a plurality of matching frequency oscillators coupled to a phasing ring in substantially equidistantly spaced apart locations. A combined VCO output signal is provided at a central output connection point of the phasing ring. The central output connection point resides on a first plane. An output conductor transition has a first end coupled to the central output connection point and a second end provided as an output to the quad-push VCO. The output conductor transition extends transverse to the first plane and terminates at a second plane separated from the first plane. The multi-push oscillator can be a push-push, quad-push or N-push type VCO based on a particular implementation.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: October 2, 2007
    Assignee: Northrop Grumman Corporation
    Inventors: Mark Kintis, Flavia S. Fong, Thomas T. Y. Wong, Xing Lan
  • Patent number: 7209015
    Abstract: An oscillator circuit includes a current source for generating a current depending on the ambient temperature, a plurality of oscillators for oscillating at respective periods depending on the current from the current source and based on different relations between the ambient temperature and the periods, and a frequency demultiplication unit for receiving an output signal from one of the oscillators selected by a period selecting circuit 103. The frequency dividing ratio of the frequency demultiplication circuit is set so that a higher ambient temperature provides a smaller frequency dividing ratio.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: April 24, 2007
    Assignee: Elpida Memory, Inc.
    Inventor: Takeshi Hashimoto
  • Patent number: 7184205
    Abstract: An apparatus and methods for operating a single quasi-optical structure are disclosed. The apparatus operates as an amplifier or an oscillator. The method disclosed teaches how to operate the single quasi-optical structure as an amplifier or an oscillator.
    Type: Grant
    Filed: February 3, 2006
    Date of Patent: February 27, 2007
    Assignee: HRL Laboratories, LLC
    Inventor: Jonathan J. Lynch
  • Patent number: 7164324
    Abstract: A CMOS single-ended frequency doubler with improved subharmonic rejection and low phase noise which allows a single ended reference signal to be utilized in a Balanced Colpitts oscillator. The input is reproduced with a 180-degree phase shift for the opposite Colpitts transistor. This is achieved by adding two PMOS transistors. One transistor is placed as a follower, which reproduces any voltage shift applied to its gate to its source. Another transistor is a matching transistor for balance. By applying the single-ended signal to the gate of the follower transistor, it is reproduced at the source. The rest of the circuit takes advantage of the summing of two period currents with a 180-degree phase shift. The present invention achieves superior performance for frequency doubling due to the squaring of the gate voltage in the corresponding drain current. As a result, the double frequency component is further enhanced.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: January 16, 2007
    Assignee: Phaselink Semiconductor Corporation
    Inventor: Pierre Paul Guebels
  • Patent number: 7145405
    Abstract: A planar harmonic high frequency oscillator comprises a pair of amplifiers for oscillation, a micro-strip line for connecting between inputs of the pair of amplifiers and between outputs of the amplifiers, a slot line disposed between the inputs and the outputs of the pair of the amplifiers for electromagnetically coupling with the micro-strip line, an output line connected to the micro-strip line at a position at which the micro-strip line traverses the slot line between the inputs or outputs of the pair of amplifiers, and an electronic device for connecting conductors on both sides of the slot line, and for controlling an electromagnetic wave field of the slot line in response to a control signal applied thereto. Two oscillation systems which oscillate in opposite phases with respect to the fundamental wave of oscillation are formed to generate an even-order harmonic of the fundamental wave.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: December 5, 2006
    Assignees: Nihon Dempa Kogyo Co., Ltd., Saga University
    Inventors: Masayoshi Aikawa, Takayuki Tanaka, Fumio Asamura, Takeo Oita
  • Patent number: 7145404
    Abstract: A push-push high frequency oscillator comprises a pair of amplifiers for oscillation, a loop-shaped microstrip line for connecting inputs of the pair of amplifiers to each other and connecting outputs of the pair of amplifiers to each other, a slot line disposed between the inputs and the outputs of the pair of amplifiers for electromagnetically coupling with the microstrip line, a nonlinear circuit for enhancing the level of harmonic components in an applied synchronization signal, a coupler circuit for electromagnetically coupling the output of the nonlinear circuit to the microstrip line, and a filter circuit disposed at the output of the nonlinear circuit. The filter circuit filters harmonic components of the synchronization signal such that the two oscillation systems are injected with the same frequency components as the fundamental wave or frequency components twice as high as the fundamental wave to increase frequency stability.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: December 5, 2006
    Assignees: Nihon Dempa Kogyo Co., Ltd., Saga University
    Inventors: Masayoshi Aikawa, Takayuki Tanaka, Fumio Asamura, Takeo Oita
  • Patent number: 7138877
    Abstract: A PLL circuit and method provides an adjustable operating frequency range by using at least two VCOs. In an embodiment of the present invention, circuit components of a PLL are adjusted in order to obtain a selected frequency range. In particular, a gain of a charge pump and resistance of a filter is adjusted responsive to a control signal. In alternate embodiments of the present invention, a voltage regulator, including an operational amplifier, is coupled to the output of the filter and the respective inputs of two VCOs. An output multiplexer then selects a VCO output responsive to the control signal. In another embodiment of the present invention, a multiplexer is coupled to the output of the voltage regulator to select which VCO receives a buffered voltage.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: November 21, 2006
    Assignee: Rambus Inc.
    Inventors: Roxanne Vu, Huy Nguyen, Benedict Lau
  • Patent number: 7119625
    Abstract: A high frequency oscillator comprises a transmission line resonator having a midpoint which serves as a null potential point, a pair of active devices for oscillation respectively connected to a pair of mutually opposite-phase resonance wave points for the transmission line resonator, and a plurality of output lines each having one end connected to the transmission line resonator at a point symmetric to the midpoint, and the other end commonly connected to a connection. The pair of active devices share the resonator and oscillate in opposite phases to each other. The plurality of output lines are coupled to the transmission line resonator respectively at maximum displacement distribution points for a standing wave of an 2n-th harmonic in the transmission line resonator, where n is an integer equal to or larger than two. Even-order harmonic components of 2(n?1)-th or lower are suppressed at the connection.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: October 10, 2006
    Assignees: Nihon Dempa Kogyo Co., Ltd., Saga University
    Inventors: Masayoshi Aikawa, Takayuki Tanaka, Fumio Asamura, Takeo Oita
  • Patent number: 7088189
    Abstract: In one aspect, a voltage controlled oscillator is provided that includes circuitry comprising tunable coupled resonator networks, which are coupled to a terminal of a pair of three-terminal devices through a tuning voltage network which supports wide-band tunability. In another aspect, a wide-band tunable resonator is provided that is amenable to integration in the integrated circuit form.
    Type: Grant
    Filed: December 9, 2004
    Date of Patent: August 8, 2006
    Assignee: Synergy Microwave Corporation
    Inventors: Ulrich L. Rohde, Reimund Rebel, Ajay Kumar Poddar
  • Patent number: 7061333
    Abstract: A high frequency oscillator has a substrate, a resonator circuit which is disposed on one principal surface of the substrate and consists of a closed loop-shaped slot line including an inner conductor and an outer conductor, an electric boundary point set on the slot line, a two-port negative resistance element for connecting between the inner conductor and outer conductor, and an output line electrically connected to the slot line. The electric boundary point is set by connecting, for example, a stub to the resonator circuit. The stub functions as an electrically short-circuited end or an electrically open end. A Gunn diode is preferably used for the negative resistance element, and inserted at a position of the slot line resonator circuit at which impedance matching is achieved.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: June 13, 2006
    Assignees: Masayoshi Aikawa, Nihon Dempa Kogyo Co., Ltd.
    Inventors: Masayoshi Aikawa, Takayuki Tanaka, Fumio Asamura, Takeo Oita
  • Patent number: 7015765
    Abstract: A circuit for distributing a clock signal in an integrated circuit includes a capacitive clock distribution circuit having at least conductor therein. At least one inductor is formed in a metal layer of the integrated circuit and is coupled to the clock distribution circuit. The inductor, generally in the form of a number of spiral inductors distributed throughout the integrated circuit, provides an inductance value selected to resonate with the capacitive clock distribution circuit. By operating the clock distribution circuit at resonance, power dissipation is reduced while skew and jitter performance can be improved.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: March 21, 2006
    Assignee: The Trustees of Columbia in the City of New York
    Inventors: Kenneth Shepard, Steven Chan
  • Patent number: 6946921
    Abstract: A method and apparatus for producing high-frequency oscillations is disclosed. A new resonator architecture minimizes via losses and supports a compact layout of active circuitry. The resonator architecture incorporates dual resonant transmission lines to reduce resonator loss and facilitate compact layout. The oscillations of two oscillators are cross-coupled in a way that compensates for the delay in the active devices of the oscillator, thus permitting accurate alignment of the active circuitry response with the oscillation waveform. The cross-coupling of the two oscillators improves phase noise performance and eliminates spurious oscillations. An active circuit architecture provides very narrow pulses for the operation of the oscillator. This architecture provides for accurate cross-coupling and pulsed-mode operation to improve manufacturing stability and phase noise performance.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: September 20, 2005
    Assignee: Big Bear Networks, Inc.
    Inventor: Derek Shaeffer
  • Patent number: 6909333
    Abstract: A high frequency oscillator has a substrate made of, for example, a dielectric material, a resonator circuit disposed on one principal surface of the substrate and formed of a finite-length coplanar line having a signal line and a ground conductor arranged along the signal line on both sides thereof, a negative resistance element for connecting between the signal line and the ground conductor, and an output line routed on the other principal surface of the substrate and electromagnetically coupled to the resonator circuit through the substrate. A Gunn diode is preferably used for the negative resistance element, and is connected, for example, in a substantially central region of the signal line. The output line preferably forms a microstrip line structure together with the ground conductor.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: June 21, 2005
    Assignees: Nihon Dempa Kogyo Co., Ltd.
    Inventors: Masayoshi Aikawa, Takayuki Tanaka, Fumio Asamura, Takeo Oita
  • Patent number: 6771137
    Abstract: A high-frequency oscillator includes: a substrate composed of a dielectric material; a first transmission line of coplanar structure which is arranged on one principal surface of the substrate; an amplifier having an input terminal and an output terminal and which is inserted into the first transmission line such that the input terminal and output terminal connect to the first transmission line; and a second transmission line which is provided on the other principal surface of the substrate, which electromagnetically couples with the first transmission line, and which constitutes a feedback circuit with respect to the amplifier. The first transmission line is typically a coplanar line of finite length, and the second transmission line is typically a microstrip line.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: August 3, 2004
    Assignee: Nihon Dempa Kogyo Co. Ltd
    Inventors: Masayoshi Aikawa, Takayuki Tanaka, Fumio Asamura, Kenji Kawahata, Takeo Oita
  • Patent number: 6744325
    Abstract: A quadrature ring oscillator for high clock-rate applications is disclosed. A quadrature LC ring oscillator may use two stages of LC oscillators and variable mixers to provide consistent oscillation even at high clock rates. One stage of the quadrature ring oscillator comprises a first resonating element having an input and an output, and a first variable summer having L and P inputs and an output, with its L input being connected to the output of the first resonating element. The output of the first variable summer is connected to the input of the first resonating element The first variable summer may generate its output at a first phase by combining the L and P inputs. A second stage of the LC ring oscillator comprises a second resonating element, which has an input and an output, with its output being connected to the P input of the first variable summer. An inverter is used to produce an inverted signal of the output of the first resonating element.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: June 1, 2004
    Assignee: Sierra Monolithics, Inc.
    Inventors: Thomas W. Krawczyk, Jr., David A. Rowe
  • Patent number: 6714086
    Abstract: A symmetrical oscillator includes a reactive element, such as an inductor, coupled between first and second active components, where the reactive element defines a fundamental resonant frequency with one or more capacitances of the oscillator. A first feedback circuit is coupled between the first active component and a common node, while a second feedback circuit is coupled between the second active component and the common node such that an output signal at substantially twice the fundamental resonant frequency is obtained at the common node.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: March 30, 2004
    Assignee: ITT Manufacturing Enterprises, Inc.
    Inventors: James Edward Landrith, William J. Tanis
  • Patent number: 6703904
    Abstract: A high frequency oscillator for combining outputs of two oscillator to generate an oscillation output. The oscillators has a substrate, a slot line formed on a first main plane of the substrate and having both longitudinal ends, the both longitudinal ends being electrically short-circuited, a first and a second amplifier for oscillation, each disposed on one and the other side of the slot line, and having outputs of the same oscillation frequency, and an unbalanced transmission line for connecting input terminals of the first and second amplifiers to each other and for connecting output terminals of the first and second amplifiers to each other. The unbalanced transmission line traverses the slot line and forms a closed loop including the first and second amplifiers.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: March 9, 2004
    Assignees: Nihon Dempa Kogyo Co., LTD, Saga University
    Inventors: Masayoshi Aikawa, Fumio Asamura, Takeo Oita
  • Patent number: 6700452
    Abstract: A method and apparatus for producing high-frequency oscillations is disclosed. A new resonator architecture minimizes via losses and supports a compact layout of active circuitry. The resonator architecture incorporates dual resonant transmission lines to reduce resonator loss and facilitate compact layout. The oscillations of two oscillators are cross-coupled in a way that compensates for the delay in the active devices of the oscillator, thus permitting accurate alignment of the active circuitry response with the oscillation waveform. The cross-coupling of the two oscillators improves phase noise performance and eliminates spurious oscillations. An active circuit architecture provides very narrow pulses for the operation of the oscillator. This architecture provides for accurate cross-coupling and pulsed-mode operation to improve manufacturing stability and phase noise performance.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: March 2, 2004
    Assignee: Big Bear Networks, Inc.
    Inventor: Derek Shaeffer
  • Patent number: 6683504
    Abstract: A ring oscillator integrated circuit is provided that is comprised of a plurality of parallely arranged ring oscillator sections, where a ring oscillator section can be any conventional ring oscillator circuit. That is, the inputs and the outputs of a plurality of conventional ring oscillators are connected together. Since each ring oscillator section output signal includes random noise, the parallel arrangement of ring oscillators, and the summing of several oscillator signals, causes at least some noise cancellation. As a result, a lower noise oscillator signal is supplied. A method of reducing random noise in a ring oscillator circuit is also provided.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: January 27, 2004
    Assignee: Applied Micro Circuits Corporation
    Inventor: Brian Lee Abernathy
  • Patent number: 6661298
    Abstract: A clock multiplication technique includes driving two oscillatory circuits by an input signal. One of the circuits has an inverted input. The oscillatory circuits are characterized by a transfer function having an unstable region bounded by two stable region. Oscillations produced during operation of each of the circuits in the unstable regions are combined to produce a signal whose frequency is a multiple of the input frequency.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: December 9, 2003
    Assignee: The National University of Singapore
    Inventors: Kin Mun Lye, Jurianto Joe
  • Publication number: 20030098746
    Abstract: A high frequency oscillator for combining outputs of two oscillator to generate an oscillation output. The oscillators has a substrate, a slot line formed on a first main plane of the substrate and having both longitudinal ends, the both longitudinal ends being electrically short-circuited, a first and a second amplifier for oscillation, each disposed on one and the other side of the slot line, and having outputs of the same oscillation frequency, and an unbalanced transmission line for connecting input terminals of the first and second amplifiers to each other and for connecting output terminals of the first and second amplifiers to each other. The unbalanced transmission line traverses the slot line and forms a closed loop including the first and second amplifiers.
    Type: Application
    Filed: September 13, 2002
    Publication date: May 29, 2003
    Inventors: Masayoshi Aikawa, Fumio Asamura, Takeo Oita
  • Patent number: 6512801
    Abstract: A receive control portion activates each of VCOs, and then sets a reference dividing ratio Ntyp in the programmable divider. With each of the VCOs active, the receive control portion determines whether the PLL circuit locks or not based on a signal inputted during this time. Based on the determination result, the receive control portion then creates pattern data in a first table. A second table is previously stored in memory. Written into the second table is an optimal VCO for each pattern. The receive control portion determines the optimal VCO corresponding to the created pattern data referring to the second table. This allows the receiver to optimally select a VCO at high speed.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: January 28, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shuichi Ninomiya
  • Publication number: 20020113657
    Abstract: The present invention, generally speaking, provides a controlled oscillator that attains the foregoing objectives. The structure of the oscillator is, in general, that of a ring; however, timing of the oscillator is governed largely by an RC time constant. Since the delay is mostly RC-based, phase noise is minimal compared to an active implementation. Furthermore, in a preferred embodiment, two ring oscillators of this type are combined to form a differential oscillator circuit having still lower phase noise. In an exemplary embodiment, the ring oscillators are three-stage ring oscillators. The operation of two inverters is unaffected by the RC time constant. Because the speed of these inverters is very fast compared to the RC time constant, the oscillation frequency is quite constant versus temperature and supply voltage.
    Type: Application
    Filed: December 14, 2000
    Publication date: August 22, 2002
    Inventor: Yves Dufour
  • Patent number: 6429748
    Abstract: There is a manufacturing limit on how small ceramic coaxial resonators can be produced, which leads to a limit on the frequency of resonance for these resonators. One technique to double the effective frequency of a ceramic coaxial resonator is to couple each end of a resonator to a Colpitts oscillator, the oscillators being balanced and out-of-phase by 180°. During operation, the resonator is effectively divided in half with a virtual ground forming in the center. This allows a single resonator to operate as two resonators of half the original size. Hence, the oscillation frequency for each of these balanced oscillators is doubled when compared to the frequency of similar oscillators that have separate ceramic coaxial resonators of similar size. If this technique is further implemented within a push-pull design tuned to the third harmonic, the output oscillation frequency becomes six times that of an oscillator using a separate ceramic coaxial resonator of similar size.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: August 6, 2002
    Assignee: Nortel Networks Limited
    Inventors: Charles T. Nicholls, Johan M. Grundlingh
  • Publication number: 20020075086
    Abstract: A multi-octave, wideband voltage controlled oscillator has a plurality of high impedance current output individual voltage controlled oscillators coupled in parallel to form a bank of voltage controlled oscillators covering at least one high frequency octave. The outputs of the VCOs are wire-OR'd together and the VCOs are selected by a select signal that turns on the desired oscillator(s). A main limiter/divider selects a frequency octave at either the fundamental frequency of the selected VCO or a sub-harmonic thereof as the multi-octave, wideband voltage controlled oscillator output. A reference limiter/divider selects a reference frequency from the selected VCO for use in a phase locked loop. Each VCO has a tank circuit coupled across the bases of a pair of transistors, the emitters of which are coupled through respective current sources to ground. The collectors of the transistors are coupled to the wire-OR'd network.
    Type: Application
    Filed: December 20, 2000
    Publication date: June 20, 2002
    Inventor: Steven H. Pepper
  • Patent number: 6392498
    Abstract: A clock multiplication technique includes driving two oscillatory circuits by an input signal. One of the circuits has an inverted input. The oscillatory circuits are characterized by a transfer function having an unstable region bounded by two stable region. Oscillations produced during operation of each of the circuits in the unstable regions are combined to produce a signal whose frequency is a multiple of the input frequency.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: May 21, 2002
    Assignee: The National University of Singapore
    Inventors: Kin Mun Lye, Jurianto Joe
  • Patent number: 6359520
    Abstract: An improved resonant tunneling device (RTD) oscillator is provided by supplying electrical power to the RTD device 23 using a photocell 21 and a light source 25 such that essentially no spurious resonances are possible.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: March 19, 2002
    Assignee: Raytheon Company
    Inventors: Gary Frazier, William Frensley