Abstract: Provided are a method and an apparatus for processing a transmission signal, which reduce a peak value to an appropriate magnitude by appropriately distorting a final transmission signal through implementation into simple hardware having a small memory and a small operation amount to effectively reduce a peak-to-average power ratio (PAPR) by effectively processing a signal for wireless communication in real time.

Abstract: A reference signal generating circuit is provided that generates a reference signal corresponding to an input signal for power factor compensation of a power converter. The reference signal generating circuit includes a detector sampling the input signal according to a reference clock to detect and hold the maximum input signal and a phase measuring unit measuring a phase of the sampled input signal based on the sampled input signal and the detected maximum input signal. The circuit also includes a reference signal generating unit configured to generate a reference signal having a specific value in response to the measured phase.

Abstract: One embodiment relates to a system which includes a pre-distortion unit, a power amplifier circuit, a power amplifier model, and a parameter estimation unit. The pre-distortion unit is configured to pre-distort an input signal based on a model parameter by directly computing the model inverse in an iterative fashion, thereby providing a pre-distorted signal. The power amplifier circuit is configured to amplify the pre-distorted signal. The power amplifier model is configured to model amplification of the pre-distorted signal by the power amplifier circuit based on the pre-distorted signal and the model parameter. Based on the pre-distorted signal and an error signal, the parameter estimation unit is configured to update the model parameter provided to the pre-distortion unit and the power amplifier model. The error signal represents a difference between an output signal from the power amplifier circuit and a modeled output signal from the power amplifier model.

Abstract: Provided is a signal transmission device including a first modulation unit generating a first modulated signal having at least three logic levels by modulating an input signal; a characteristic adjustment unit generating an adjusted first modulated signal by adjusting the at least one of electrical characteristic values based on an adjustment signal; a second modulation unit generating a second modulated signal by modulating the adjusted first modulated signal; and an adjustment operation unit generating the adjustment signal based on electrical characteristic values respectively corresponding to the at least three logic levels of the first modulated signal and corresponding to at least three logic levels of the second modulated signal. Linearity of the modulated signal generated by the provided signal transmission device is enhanced.

Abstract: A phase-locked loop double-point modulator may include a frequency divider having a ratio which can be changed by a first modulation signal, and an oscillator, a frequency of which can be changed by a second modulation signal correlated to the first modulation signal. A calibration circuit may be configured, in a calibration mode, to match the gains of the first and second modulation signals based on frequency measurements of the oscillator for two different calibration values of the second modulation signal. The phase-locked double-point modulator may also include an attenuator having a constant ratio greater than 1 and placed in the path of the second modulation signal, and a selector switch configured to be controlled by the calibration circuit to reduce the ratio of the attenuator in the calibration mode.

Abstract: A radio transmitter includes a signal processing circuit splitting a basic modulating signal into first and second modulating signals and outputting the first and second modulating signals. A PLL decides a fundamental wave. A VCO forms a portion of the PLL and modulates the fundamental wave decided by the PLL in accordance with a voltage of the first modulating signal outputted from the signal processing circuit. A PLL circuit forms a portion of the PLL and varies a frequency division ratio to modulate the fundamental wave decided by the PLL in accordance with the second modulating signal outputted from the signal processing circuit.

Abstract: A multi-band signal is generated by combining two or more input signals separated in frequency. The input signals are combined either before or after predistortion depending on the bandwidth of the multi-band signal. If the bandwidth of the multi-band signal is less than a predetermined bandwidth threshold, the input signals are combined and predistortion is applied to the combined signal to generate the multi-band signal. If the bandwidth of the multi-band signal is greater than the bandwidth threshold, the individual input signals are predistorted and subsequently combined to generate the multi-band signal.

Abstract: A communications device includes a modulator and a filter downstream therefrom and operable to generate an output wideband complex signal with a frequency notch therein. The filter includes a finite impulse response (FIR) filter with L taps to generate N output values, with L>N. A Fast Fourier Transform (FFT) block is downstream from the FIR filter and has a length N so that filter transition regions occur between frequency bins of the FFT block. A notching block is downstream from the FFT block to generate the frequency notch. An Inverse Fast Fourier Transform (IFFT) block is downstream from the notching block and has the length N.

Abstract: A method of determining signal quality in a cable network comprises the steps of: providing a network model (1) comprising an interconnection model (2) and component models (3), providing an input signal (IS), determining an output signal (OS) using the input signal and the network model, and determining the signal quality from the input signal (IS) and the output signal (OS). The input signal (IS) comprises multiple constituent signal components, each signal component representing a class of input signals. The step of determining the output signal involves determining intermodulations of the constituent signal components by effecting frequency domain convolutions of the spectra of the constituent signal components.

Abstract: In an electronic system, a frequency modulator manages clock signals for electromagnetic interference (EMI) reduction. The illustrative frequency modulator comprises a core oscillator, and a clock divider coupled to the core oscillator that modulates frequency of the core oscillator and deterministically spreads clock spectral components of a digital clock signal whereby electromagnetic interference (EMI) is reduced. The frequency modulator further comprises a circuit coupled to the clock divider that receives the digital clock signal, combines the digital clock signal with a data bitstream for transmission across an isolation barrier, and resynchronizes to the digital clock signal.

Abstract: A wireless network (20) with at least a first radio communication unit (24) and a second radio communication unit (26) transmits and receives signals with minimal interference from the surrounding environment of the first unit (24) and second unit (26). The first radio communication unit (24) determines frequencies (54) having power level above a threshold (52), and creates a list of these frequencies (50) to be transmitted to the second radio communication unit (26). The second radio communication unit (26) places notches (140) in its transmission band (88) based on frequencies (54) in the list (50), reserved frequencies (132), and local frequencies (92) having signal energy above a threshold (90). When transmitting a signal (42), the second radio communication unit (26) avoids transmitting in frequencies that have notches (140).

Abstract: It is possible to restrain distortions generated in a mixer. A modulator includes a local signal source that generates an in-phase local signal, a multiplier that multiplies an in-phase baseband signal (I) and the in-phase local signal by each other, a phase inverter that receives the in-phase local signal from the local signal source, and inverts the phase thereof, an anti-phase multiplier that multiplies an anti-phase baseband signal (?I) (signal equivalent to a signal obtained by inverting the phase of the in-phase baseband signal (I)) and an output from the phase inverter (anti-phase local signal) by each other, and an adder that adds an output from the multiplier and an output from the anti-phase multiplier to each other. The addition by the adder of a leak component (carrier leak) which is the in-phase local signal leaked from the multiplier, and the signal which is the output from the phase inverter leaked from the anti-phase multiplier to each other results in zero.

Abstract: Circuits and methods of dynamic modulation are disclosed. A dynamic modulator is used to reduce measurable conducted and/or radiated electromagnetic interference (EMI). The dynamic modulator is configured to generate either a set of optimal frequency modulation depths or discrete frequencies or both, and dynamically selects them to use over a series of programmable time durations (dwell time). Together with the utilization of Peak, Average or Quasi-Peak (QP) method of measurement, the dynamic modulator can reduce the spectral amplitude of EMI components, in particular the lower harmonics, to effectively pass regulatory requirements. In alternative embodiments, the dynamic modulator is used in a closed loop system to continuously adjust the frequency and the duty cycle of a PWM signal to reduce conducted and/or radiated EMI.

Abstract: The invention relates to a transmission module for transmitting data in the form of useful digital signals by modulation of a carrier, determined by the useful signals, by means of frequency shift keying. The transmission module contains a PLL circuit with a voltage-controlled oscillator and a controllable frequency divider with a frequency divider control input. The transmission module is designed to induce direct frequency shift keying (DFSK) of the carrier signal by appropriate triggering of the frequency divider with at least two different frequency divider control signals, and it has a modulation data preprocessing unit, which is connected to the frequency divider control input and is designed to weight samples of the same polarity of the useful signals to be transmitted and to fine tune the frequency divider control signal with regard to the frequency deviation to be induced.

Abstract: A wireless communication device corrects data transmission errors caused by the simultaneous transmission of multiple streams of data in a Multiple-Input Multiple-Output (MIMO) network. The wireless communication device corrects data transmission errors by removing the signal contribution associated with one or more received signal components from a corresponding received composite signal, thus allowing the remaining components to be decoded relatively free from the signal contribution of the removed components. In one embodiment, the wireless communication device comprises a plurality of antennas and a baseband processor. The antennas are configured to receive a composite signal having a plurality of received signal components.

Abstract: A distortion correction control apparatus is for compensating for a burst distortion of a transmission amplifier caused by a burst of an input signal of a transmission target. The apparatus includes a generation unit that generates a distortion correction coefficient having reverse characteristics to the foregoing burst distortion; a unit that multiplies the distortion correction coefficient output from the generation unit by the input signal or adds the distortion correction coefficient output from the generation unit to the input signal, upon reception of burst information notifying of switching between presence and absence of the input signal; and an update unit that updates, based on the input signal and a branch signal fed back as an output signal of the transmission amplifier, parameters of functions used for adaptively generating the distortion correction coefficient, and that inputs the updated parameters to the generation unit.

Abstract: A system and method for providing a peak power reduced OFDM communications signal are disclosed. The system and method provide peak reduction processing in the time domain followed by inter-symbol interference (ISI) control processing in the frequency domain to maintain modulation errors introduced by the peak reduction processing to an acceptable level. The processing is preferably done on a parallel signal path and the peak corrections with ISI control are added into the main signal path to provide the peak reduced OFDM signal.

Abstract: A distortion compensating apparatus has an adaptive distortion compensating unit to compensate nonlinear distortion by controlling an input signal of a nonlinear distortion circuit by using an adaptive algorithm so as to reduce an error between a reference signal and a feedback signal from the nonlinear distortion circuit; and an adaptive equalizer connected between the adaptive distortion compensating unit and the nonlinear distortion circuit or provided in front of the adaptive distortion compensating unit. The adaptive equalizer includes a digital filter to form an amplitude characteristic and a phase characteristic of the input signal on the basis of a filter coefficient group that is set to the digital filter; a memory to hold in advance the filter coefficient group; and a control unit to control reading of the filter coefficient group from the memory on the basis of the input signal and the feedback signal.

Abstract: A distortion compensation apparatus includes an amplifier for amplifying an input signal, a calculation unit for obtaining a distortion compensation coefficient of the amplifier corresponding to an amplitude level of the input signal, based on the input signal input to the amplifier and an output signal output from the amplifier, a memory for storing the distortion compensation coefficient, obtained by the calculation unit, into a write address being made to correspond to the input signal amplitude level, a distortion compensation processing unit for reading out the distortion compensation coefficient from the readout address of the memory, and for performing distortion compensation processing of the input signal using the distortion compensation coefficient, and an address generator for generating the write address and the readout address, based on the input signal amplitude level.

Abstract: For decreasing errors within an analog phase-locked loop, an all-digital phase-locked loop (ADPLL) with digital components and digital operations is used. The ADPLL may also be used for direct frequency modulation (DFM). By defining a proportional path gain of an ADPLL by a bandwidth and a reference frequency of the ADPLL, by a TDC gain, a DCO gain, a dividing ratio of a frequency divider, a gain of an amplifier or a combination thereof, the gain of the amplifier may be adjusted so that an optimal loop bandwidth of the ADPLL may be well calibrated. For achieving the aim of entirely digital of the ADPLL, the gains of the TDC and the DCO may be further adjusted in a digital manner.

Abstract: A predistortion linearized amplifier system that uses analog polynomial based predistortion is disclosed. An analog polynomial function generator receives polynomial parameter updates from a polynomial parameter generator. The polynomial parameter generator uses a combination of analog and digital signal processing to create the parameter updates. This processing is performed on input signal amplitude, detected using analog circuits, and RF coupled samples of the input signal, and the output signal. By using a combination of analog and digital signal processing means, digital processing can be performed at sub-Nyquist rates, significantly reducing the cost of digital circuits. Also, since the predistortion modulation signal is created with an analog function generator, time correlating delay is minimized reducing circuit costs.

Abstract: A frequency modulator includes a tuning circuit configured to determine a nominal gain characteristic of a digitally controlled oscillator (DCO) in a first mode, and to determine an actual gain characteristic of the DCO in a second mode using the nominal gain characteristic. The frequency modulator also comprises a modulation circuit comprising the DCO coupled to the tuning circuit, configured to modulate a frequency of a DCO output signal with a modulation signal input, and to scale the modulated DCO output signal based on the actual gain characteristic in the second mode to provide gain compensation and frequency modulation of the DCO. The tuning circuit may include a select switch to couple a minimal and maximal tuning word to the DCO in the first mode and an actual operating point word in the second mode to the DCO to determine the nominal gain characteristic.

Abstract: A method and apparatus for frequency modulating a PWM involves 1) generating a high frequency carrier signal much greater in frequency than the PWM signal; 2) modulating the high frequency signal to generate a spread spectrum carrier signal; and, 3) retiming a PWM signal with this high frequency SS carrier signal so that the binary transitions of the PWM signal are aligned with the frequency varying carrier signal. In another embodiment, a PWM oscillator is driven by a second, FM oscillator having spread spectrum characteristics. In another embodiment a PWM oscillator is driven and modulated by a counter/frequency divider comprised of modules.

Abstract: A method and apparatus for frequency modulating a PWM involves 1) generating a high frequency carrier signal much greater in frequency than the PWM signal; 2) modulating the high frequency signal to generate a spread spectrum carrier signal; and, 3) retiming a PWM signal with this high frequency SS carrier signal so that the binary transitions of the PWM signal are aligned with the frequency varying carrier signal. In another embodiment, a PWM oscillator is driven by a second, FM oscillator having spread spectrum characteristics. In another embodiment a PWM oscillator is driven and modulated by a counter/frequency divider comprised of modules.

Abstract: A method of processing a baseband multiplex signal comprises the steps of frequency modulating the baseband multiplex signal to produce a first modulated signal, filtering the first modulated signal to produce a first filtered signal, demodulating the filtered signal to produce a demodulated baseband multiplex signal, correcting the demodulated baseband multiplex signal to reduce or eliminate distortion in a predetermined frequency range of the demodulated baseband multiplex signal to produce a corrected signal, and frequency modulating the corrected signal to produce a second modulated signal. An apparatus that operates in accordance with the method is also provided.

Abstract: A spread spectrum frequency modulated oscillator circuit usable as a clock comprises a reference component such as a resistor, a voltage controlled oscillator and a first circuit coupled to the reference component and voltage controlled oscillator and configured to supply a first control signal to the oscillator to cause the oscillator to oscillate at a frequency corresponding to a value of the reference component. A second circuit configured to supply a random signal to the oscillator causes the frequency of the oscillator to dither.

Abstract: Mixing circuitry for quadrature processing in communication systems and related methods are disclosed. The weighted mixing circuitry allows for arbitrary dividers to be utilized in generating the mixing signals for quadrature processing and thereby provides a significant advantage over prior architectures where 90 degree offset I and Q mixing signals were needed for quadrature mixing.

Abstract: The invention relates to a device for converting frequencies comprising a local oscillator of fixed frequency and a first mixer with two inputs and an output, a first input receiving the signal to be converted and a second input receiving the signal arising from the local oscillator. It further comprises a second mixer with two inputs and an output, a first input receiving the signal arising from the phase-shifted local oscillator and the second input receiving a dc signal whose value is dependent on the power of the residual spectral component at the output of an adder receiving as input the signals arising from the first and from the second mixer(s) and giving as output a transposed signal. The invention applies in particular in terminals operating in the Ka band.

Abstract: Disclosed herein is a method and apparatus used to create an idealized voltage controlled oscillator (VCO) which allows very high modulation rates without the expected phase noise (jitter) which nominally comes from wide bandwidth VCOs. In this fashion, high quality VCOs that typically offer pure signals at the cost of small tuning bandwidths can be enhanced to create idealized VCOs that offer both high quality (low jitter) and high tuning bandwidths. A high-frequency phase modulator and control voltage processing is used in conjunction with a natural VCO to create a method and apparatus in accordance with the invention. The control voltage processing includes separation of frequency components of the controlling voltage and electrical integration of high-frequency control voltage components directed to the phase modulator to create the overall voltage-to-frequency transfer function for the ideal VCO.

Abstract: A data communication apparatus and method based on OFDMA are provided. In a first user transmitting unit through which a user transmits user information to a base station in units of first symbol blocks each including M symbols, a first encoder generates a first sub-block composed of Mu user symbols for a u-th user by encoding the user information. A first block repeater repeats the first sub-block Lu times to generate M symbols. A first multiplier multiplies the M symbols by ?u exp(j2?kmu/M) and outputs a u-th user signal. A first cyclic extension symbol inserter inserts a cyclic extension symbol into the u-th user signal and generates a single complete first symbol block. Accordingly, data transmission speed can be freely changed, a very small PAR can be provided, influence of the signal interference is greatly reduced, interference occurring between received blocks due to channels can be prevented, and distortion between channels can be effectively compensated for.

Abstract: The phase locked loop (PLL) frequency synthesizer includes a phase detector receiving a reference signal, a controlled oscillator (e.g. a voltage controlled oscillator) connected to the phase detector and generating a synthesized frequency output signal based upon the reference signal, a mixer (e.g. an in-phase and quadrature-phase (IQ) modulator) connected to the controlled oscillator, a divider connected between the mixer and the phase detector, and a signal source driving the mixer. The frequency synthesizer and method have narrow frequency steps (e.g. as low as fractions of a Hertz) while using a relatively high reference frequency to maintain low phase noise. Furthermore, the fine frequency tuning resolution is achieved while also reducing output spurs and using a relatively simple topology.

Abstract: A clock signal generator varies a frequency of a digital clock over a selected range of frequencies. The generator employs a divider for lowering a frequency of a clock signal. A counter increments synchronously with the signal, and causes a selected sequence of outputs to be generated by a pattern generator. The pattern generator output forms an input to a digitally controllable delay line which receives the lower frequency clock signal. The pattern generator causes the digital delay line to vary a frequency of the lowered frequency clock signal between selected boundaries. The varying frequency clock signal is then raised up again such that a final clock has a varying frequency, and will exhibit less EMI spiking during switching of an associated, synchronous digital data device. The solid state nature of the generator allows for simple fabrication, inexpensive manufacture and ready integration into digital circuitry, such as multifunction integrated circuits.

Abstract: A clock signal generator varies a frequency of a digital clock over a selected range of frequencies. The generator employs a divider for lowering a frequency of a clock signal. A counter increments synchronously with the signal, and causes a selected sequence of outputs to be generated by a pattern generator. The pattern generator output forms an input to a digitally controllable delay line which receives the lower frequency clock signal. The pattern generator causes the digital delay line to vary a frequency of the lowered frequency clock signal between selected boundaries. The varying frequency clock signal is then raised up again such that a final clock has a varying frequency, and will exhibit less EMI spiking during switching of an associated, synchronous digital data device. The solid state nature of the generator allows for simple fabrication, inexpensive manufacture and ready integration into digital circuitry, such as multifunction integrated circuits.

Abstract: A multi-channel RF receiver uses an image rejection mixer (e.g. double quadrature mixer) in the IF down conversion stage for image side band rejection (whereby use of an IF narrow band filter for image rejection may be omitted if desired) and comprises a simplified frequency synthesizer which generates both a “wandering” IF oscillator frequency and an RF oscillator frequency for the up/down conversion stages (being, for down conversion, from RF to IF and from IF to base band. The IF used for a particular RF carrier (channel) is selected so as to be both an integer (N) sub-harmonic of that RF carrier and within the operating frequency band of the image rejection mixer. Advantageously, the synthesizer comprises only one loop and one VCO, wherein the IF oscillator signal is produced from the RF oscillator signal by means of a frequency divider.

Abstract: First and second calibration signals (308, 309) are sent to a frequency divider (102) and an adder (116) of a PLL section (100A), demodulated in a demodulator (111), filtered through a low pass filter (113) and a high pass filter (114) and thereafter sent to a modulation signal control circuit (115). The modulation signal control circuit (115) generates control information (318) in comparison with the phase and amplitude of the first and second calibration signals (308 and 309) and sends the control information (318) to a modulation control signal generator (106). Modulation control signal generator (106) holds the control information (318) and controls the values of the first modulation signal and second modulation signal sent to the frequency divider (102) and adder (116) on the based on the control information (318) held in modulation operation.

Abstract: The present invention reduces adjacent channel interference for a wireless peripheral device. A direct digital synthesizer generates a waveform having intermediate angular changes during a transition time between symbol intervals. After the transition time, the direct digital synthesizer generates the waveform with an angular value that corresponds to the symbol being transmitted. In an exemplary embodiment, a generated waveform is characterized by one of two designated frequencies in response to a value of an input information bit. The waveform is further characterized by at least one intermediate frequency during a transition time between a change of the designated frequency. Another embodiment of the invention utilizes phase changes rather than frequency changes during reduce adjacent channel interference. With another aspect of the invention, methods are provided to determine waveform parameters for reducing adjacent channel power (ACP) to a maximum level of interference.

Abstract: A method and apparatus for generating a burst FSK signal having precisely shaped transitions between modulation states. The apparatus uses feedforward compensation of phase gain and phase preemphasis coefficients for compensating the frequency conversion gain of the apparatus, and the phase gain coefficient is used for stabilizing a frequency synthesis loop. The phase gain and preemphasis coefficients are determined in a calibration within the time constraints of on-line signal bursts based upon measured phase errors and accelerated predicted phase gain and preemphasis phase errors.

Abstract: A system and method for post filtering signal peak reduction adapted for use in a multi-carrier communication system incorporating a source of a multi-carrier communication signal band limited in plural bands corresponding to the plural carriers. A first signal path receives as an input the band limited multi-carrier communication signal. A second parallel signal path includes a peak reduction calculation circuit for calculating a peak reduction correction signal and a plurality of filters providing a plurality of parallel filtering operations on the peak reduction correction signal corresponding to the plural bands to which the communication system is limited. The filtered peak reduction correction signals and delayed input signal are combined to provide peak adjusted output signals without violating the band limits of the communication signal or the modulation scheme of the communication signal.

Abstract: A peak suppression method detects a peak value exceeding a threshold value of a transmitting signal, forms a peak value prediction signal which is limited to a noise cancelling frequency band of a receiving end, based on the detected peak value of the transmitting signal, and subtracts the peak value prediction signal from the transmitting signal.

Abstract: A modulation factor is kept immune from the influence of temperature variation. A modulator is provided with an operational amplifier to one of whose input ends are inputted video signals and to the other is applied a reference voltage and a video mixer into which are entered carrier wave signals and video signals amplified by the operational amplifier, wherein the reference voltage is raised or lowered as the gain of the video mixer increases or decreases, respectively, with a variation in temperature.

Abstract: There is a need for an inexpensive, high-performance, fully-integrable, multi-standard transceiver. The invention provides a topology that satisfies this need, consisting of: an active mixer, followed by a high pass filter, and a passive mixer. The input signal is modulated up, or demodulated down, using a pair of complementary, aperiodic mixing signals. The use of aperiodic mixing signals allows a fully-integrated transceiver to be built. Several embodiments of the active mixer are also presented, including those having electrically-adjustable performance and allowing multiple RF signal inputs. This allows the topology of the invention to be employed in multi-band, multi-frequency applications, while still providing high performance.

Abstract: A modulation circuit includes a band restriction filter 2, an attenuator 3, a modulator 4, a reference voltage generator 8, a comparing reference voltage generator 9, a voltage comparator 10 and an attenuator controller 7. The band restriction filter 2 receives modulation data. The attenuator 3 is connected to the band restriction filter 2 for adjusting its attenuation in response to an attenuator control signal. The reference voltage generator 8 is connected to the attenuator 3 for providing a reference voltage independent of a temperature and a power supply voltage to the attenuator. The comparing reference voltage generator 9 is connected to the reference voltage generator 8 for providing a comparing reference voltage independent of the temperature and the power supply voltage. The modulator 4 is connected to the attenuator 3.

Abstract: In a circuit arrangement for demodulating signals, particularly frequency-modulated signals, in which a limiter, to whose input the signals to be modulated can be applied, is followed by a demodulator from whose output the demodulated signals can be derived, the outputs of the demodulator and the limiter are connected to a respective input of a mixer whose output is connected to the input of the limiter via a low-pass filter.

Abstract: A modulator including a noise shaper receiving the input signal and providing a signal coded over one bit, a phase loop including an adder and a shift register. The adder receives the signal coded over one bit, the output of the shift register, and a constant. The input of the shift register receives the adder output. A sinusoidal shaper is coupled to the output of the shift register to provide a signal modulated in frequency by the input signal. The present invention also relates to a modulation chain including a modulator.

Abstract: A method for generating a plurality of frequencies having predetermined frequency deviations from a phase lock loop device including a VCO having a main voltage input, a modulation voltage input and a frequency output, a first and second feedback loop digital divider, each having an input and an output, a phase frequency detector having a first and second input and an output, a reference frequency generator such as a crystal oscillator having an output, a first and second reference frequency digital divider, each having an input and an output, a loop filter having an input and an output, a switch having an input and a first and a second switched output, a hold circuit having an input and an output, a memory circuit for storing the a lock voltage and the corresponding loop output frequency, the steps including; setting a first initial predetermined value of the first feedback loop digital divider, connecting a switch output to the main input of the VCO, supplying a first predetermined reference frequency to th

Abstract: An FM signal oscillator circuit includes a resonator having a graded- or abrupt-junction variable capacitance diode that is producible through standard IC manufacturing processes but causes an inconstant modulation level. The FM signal oscillator circuit, therefore, is provided with a function of maintaining a constant modulation level irrespective of oscillation frequencies. Namely, to maintain a constant modulation level without regard to oscillation frequencies that change depending on a control voltage applied to the variable capacitance diode, the FM signal oscillator circuit employs a variable gain amplifier whose gain changes in response to the control voltage. The variable gain amplifier amplifies a modulating signal, and the amplified modulating signal is superimposed onto the control voltage.

Abstract: The present invention monitors the average switching frequency at the output of the comparator and adjusts the delay compensation accordingly. That is, the switching frequency monitoring circuit looks at the average switching frequency and maintains the average switching frequency in a “frequency zone” which corresponds to a high elbow and a low noise floor.

Abstract: A digitally modulated RF amplifier system is presented having improved adjacent sideband distortion reduction. This system includes the provision of a first RF carrier signal at a first frequency within a first frequency channel having adjacent channels. A modulator receives a digital information signal and modulates the first RF carrier signal with the digital information signal to provide a digitally modulated RF signal within the first RF channel. A second RF carrier signal is provided having a second frequency spaced from the first frequency channel by a frequency that is greater than the bandwidth of the first channel. The digitally modulated RF signal is combined with the second RF carrier signal to provide a combined RF signal which is then amplified resulting in an amplified RF signal having reduced adjacent sideband distortion products.

Abstract: A frequency modulator having variable carrier frequency is provided. A VCO frequency-modulates an oscillator input signal using an oscillation frequency set by a set signal as the carrier frequency. A phase/frequency detector outputs phase and frequency differences between a VCO output signal and a reference signal. A filter receives a phase/frequency detector output and generates the set signal. An amplifier generates a pair of output signals whose voltage levels change in opposite directions. A compensation circuit changes the voltage levels of the output signal pair and provides resulting signals to the VCO as the oscillator input signal.

Abstract: Device for estimating the frequency offset in a signal received by a differential demodulator of a mobile-telephone set, intended for implementing the method according to one of claims 1 to 3, characterized in that it has means (1) for calculating an error signal &egr; on the basis of the phase &phgr; of the output signal of the demodulator and the ideal phase &phgr;o of this signal, means (4) for establishing the absolute value (ABS) of the error signal &egr;, means (2, 5, 7) for calculating an estimate of the average of the error signal &egr; calculated over a certain number of samples, from which estimate nFO-RAW bits are taken, means (3, 6, 8) for calculating an estimate of the average of the absolute value of the error signal &egr; over a certain number of samples, from which estimate nQ-RAW bits are taken, and means (10) for modelling a frequency-offset function &OHgr;(FO-RAW, Q-RAW) on the basis of the said estimates.