Abstract: A coupling apparatus having plurality of branches and a resistive element is disclosed. Each branch may be configured to couple at least one of (i) a first input node and (ii) a second input node to a first output node through a plurality of switches and a plurality of capacitors. The resistive element generally connects the first output node to a second output node. The first output node may be loaded by a respective parasitic capacitance of at least one of the switches.

Abstract: There is provided a high frequency switch including: a first signal transferring unit including a plurality of first switching devices and at least one first diode device individually connected to control terminals of the plurality of first switching devices to enable or block signal flow between a common port transmitting and receiving a first high frequency signal and a first port inputting and outputting the first high frequency signal; and a second signal transferring unit including a plurality of second switching devices and at least one second diode device individually connected to control terminals of the plurality of second switching devices to enable or block signal flow between the common port transmitting and receiving a second high frequency signal and a second port inputting and outputting the second high frequency signal.

Abstract: There is provided a high frequency switch formed on an SOI substrate and having improved insertion loss characteristics in a multimode system. The high frequency switch includes: at least one first port; at least one second port; a common port; a first series switch; and a second series switch.

Abstract: A high-frequency circuit for use in a multiband wireless apparatus for switching the connection between an antenna and transmission/reception circuits depending on signals for pluralities of communications systems, comprising a single-pole, multi-throw switch circuit comprising FET switch circuits between a common port connected to an antenna-side circuit and pluralities of single ports connected to the transmission/reception circuits, and a first matching circuit connected to the common port; the first matching circuit comprising a first inductance element connected in series to a signal path between the antenna and the common port, and a first capacitance element connected to the first inductance element on the antenna side and grounded; the first inductance element making the impedance of the single-pole, multi-throw switch circuit inductive when the single port is viewed from the antenna side; and the first capacitance element adjusting impedance matching between the antenna-side circuit and the transmiss

Abstract: There is provided a high frequency switch which is satisfactory in terms of both insertion loss characteristics and harmonic characteristics. The high frequency switch includes: a common port outputting a transmission signal to an antenna; a plurality of transmission ports each having the transmission signal input thereto; and a plurality of switching units each connected between the plurality of transmission ports and the common port to conduct or block the transmission signal from each of the transmission ports to the common port, wherein each of the switching units includes a plurality of series-connected MOSFETs formed on a silicon substrate, the plurality of MOSFETs are any one of body contact-type FETs and floating body-type FETs, and each of the switching units includes both of the body contact-type FETs and the floating body-type FETs.

Abstract: A module includes: a diplexer that includes a first terminal, a second terminal, and a common terminal coupled to an antenna; a first switch that is coupled to the first terminal, includes first ports, and selects, from the first ports, and connects one port to the diplexer; a first duplexer that is coupled to at least one of the first ports; a second duplexer that is coupled to the second terminal and has a passband different from a passband of the first duplexer; and a first impedance portion that is coupled to another port of the first ports.

Abstract: In terms of achieving a reduction in the cost of an antenna switch, there is provided a technology capable of minimizing harmonic distortion generated in the antenna switch even when the antenna switch is particularly formed of field effect transistors formed over a silicon substrate. Between the source region and the drain region of each of a plurality of MISFETs coupled in series, a distortion compensating capacitance circuit is coupled which has a voltage dependency such that, in either of the cases where a positive voltage is applied to the drain region based on the potential of the source region and where a negative voltage is applied to the drain region based on the potential of the source region, the capacitance decreases to a value smaller than that in a state where the potential of the source region and the potential of the drain region are at the same level.

Abstract: A transmit/receive switch circuit has a comprises a controllable transmit section and a controllable receive section, having an output and an input coupled to an RF transmit/receive terminal respectively. The transmit section comprises a first transistor having a main current channel coupled between an RF transmit signal input and the RF transmit/receive terminal. The receive section comprises a first transistor having a main current channel coupled between the RF transmit/receive terminal and a RF receive signal output and a second transistor having a main current channel coupled between the RF receive signal output and ground. A signal that is derived from an RF input signal at the RF transmit/receive terminal is rectified. The rectified signal is used to control a control electrode of the second transistor of the receive section to make this transistor increasingly conductive with increasing RF signal amplitude.

Abstract: Disclosed is a low phase shift voltage variable attenuator. The low phase shift voltage variable attenuator may include: a first directional coupler including a first input terminal in which a signal is input, a first isolation terminal connected to a ground power source through a termination resistor, a first coupling terminal, and a first through terminal; a second directional coupler including a second input terminal through which an attenuated signal, which is the attenuated input input signal, is output, a second isolation terminal connected to a ground power source through a termination resistor, a second coupling terminal, and a second through terminal; and a signal attenuating unit connected to the first coupling terminal, the first through terminal, the second coupling terminal, and the second through terminal, and configured to attenuate a signal transmitted through the first directional coupler to transmit the attenuated signal to the second directional coupler.

Abstract: A radio frequency (RF) switch with a transformer and a switching method thereof are provided. The RF switch includes a transmitting end transformer having a primary side connected to a transmitting end and a secondary side connected to an antenna; and a receiving end transformer having a primary side connected to the antenna and a secondary side connected to a receiving end. In a transmission mode, the transmitting end transformer is tuned on, and, in a reception mode, the receiving end transformer is turned on. Accordingly, since switching is performed based on transformers rather than transistors connected in series, the RS switch, which can achieve high linearity and low insertion loss as well as high isolation, can be implemented.

Abstract: Embodiments provide a switching device including one or more field-effect transistors (FETs) and bias circuitry. The one or more FETs may transition between an off state and an on state to facilitate switching of a transmission signal. The one or more FETs may include a drain terminal, a source terminal, a gate terminal, and a body. The biasing circuitry may bias the drain terminal and the source terminal to a first DC voltage in the on state and a second DC voltage in the off state. The first and second DC voltages may be non-negative. The biasing circuitry may be further configured to bias the gate terminal to the first DC voltage in the off state and the second DC voltage in the on state.

Abstract: A switching device includes: a switch that selects and connects one of input-output terminals to a common terminal; and a delay line that is connected in parallel to the switch between two terminals of the input-output terminals and delays a signal by using an acoustic wave.

Abstract: A frequency tunable transmit/receive (Tx/Rx) antenna switch uses a tuned PIN diode RF switch topology (e.g. shunt, series or series-shunt). Frequency tunability may be provided for either a transmit or a receive port (or both) that is tuned by a quarter-wavelength transmission line. The quarter-wavelength (?c/4) line establishes a passband centered about a center frequency fc. An electronically tunable LC tank circuit adds capacitance to the switch impedance to shift the center frequency fc to lower frequencies and progressively narrow the passband with the addition of more capacitance. Transceiver units provided with frequency tunable Tx/Rx antenna switches can, for example, be used in a Master/Slave network in which multiple units communicate with each other or in an autonomous network in which each of the multiple units operate independently.

Abstract: According to one embodiment, a high-frequency switch includes a high-frequency switch IC chip. The high-frequency switch IC chip has a high-frequency switching circuit section including an input terminal, a plurality of switching elements, a plurality of high-frequency signal lines, and a plurality of output terminals. The input terminal is connected to each of the plurality of output terminals via each of the plurality of switching elements with the high-frequency signal lines having the same lengths. The plurality of output terminals are arranged on a surface at an outer periphery of the high-frequency switch IC chip. The input terminal is arranged on the surface of the high-frequency switch IC chip at the center of the high-frequency switch IC circuit section.

Abstract: One high-frequency switch Qm supplied with transmit and receive signals to ON, and another high-frequency switch Qn supplied with a signal of another system to OFF are controlled. In the other high-frequency switch Qn, to set V-I characteristics of near-I/O gate resistances Rg1n-Rg3n of a near-I/O FET Qn1 near to a common input/output terminal I/O connected with an antenna are set to be higher in linearity than V-I characteristics of middle-portion gate resistances Rg3n and Rg4n of middle-portion FETs Qn3 and Qn4. Thus, even in case that an uneven RF leak signal is supplied to near-I/O gate resistances Rg1n-Rg3n, and middle-portion gate resistances Rg3n and Rg4n, the distortion of current flowing through the near-I/O gate resistances Rg1n-Rg3n near to the input/output terminal I/O can be reduced.

Abstract: A switch is disclosed for selecting a port. The switch includes a dielectric layer, a first circuit, and a second circuit. The first and second circuits are disposed on the dielectric layer and electrically coupled to each other through the dielectric layer. The first circuit includes a set of ports. The switch further includes a control port for receiving a control signal and a plurality of switching elements. The control signal selects at least one of the set of ports to be connected to the second circuit by setting operational states of the plurality of switching elements.

Abstract: A switch circuit includes: first, second, and third input-output terminals; a first switching element connected between the first and second input-output terminals; a second switching element connected between the third input-output terminal and a grounding point; a third switching element connected between the first and third input-output terminals; a fourth switching element connected between the second input-output terminal and the grounding point; a first control voltage applying terminal connected to control terminals of the first and second switching elements; a second control voltage applying terminal connected to control terminals of the third and fourth switching elements; first and second resistors connected between the control terminals of the first and second switching elements and the first control voltage applying terminal, respectively; and first and second diodes connected in parallel with the first and second resistors, respectively, and having cathodes connected to the first control voltage

Abstract: A semiconductor apparatus includes multiple field effect transistors provided between an antenna terminal to be connected to an antenna and multiple external terminals through which RF signals are capable of being supplied and a voltage generating circuit. When the field effect transistors provided between one of the multiple external terminals and the antenna terminal are turned off, the voltage generating unit charges a capacitor via a resistor circuit by switching the polarity of the RF signal to be supplied to the other external terminal with respect to the control signal and outputs a voltage based on a sum of the charge voltage and the voltage of the control signal as the gate drive voltage. The resistor circuit includes a first resistor including positive temperature characteristics and a second resistor including negative temperature characteristics.

Abstract: A radio frequency module is configured to enter a power saving mode with high reliability. The radio frequency module includes, e.g., a first switch transistor for coupling a transmission node to an antenna, a second switch transistor for shunting the transmission node to a ground voltage, and a level shift circuit for performing on-off control of the first and second switch transistors by positive and negative power supply voltages.

Abstract: A switching device includes: a first switching circuit, having a control node coupled to a first control signal, and arranged to selectively couple a signal node to a first amplifying circuit according to the first control signal; and a first control circuit, having a first control node and a second control node coupled to the control node of the first switching circuit and the signal node, respectively, wherein when the first switching circuit is controlled to electrically disconnect the signal node from the first amplifying circuit and a voltage level of the signal node reaches a first predetermined voltage level, the first control circuit is arranged to make the control node of the first switching circuit electrically connected to the signal node.

Abstract: A method and device for providing impedance tuning to compensate for capacitive loading effects on an antenna which are associated with conductive or physical components in close proximity to the antenna is provided. A dynamic impedance tuning (DIT) controller periodically receives information that indicates that one or more functions of a physical component and/or a particular device operating state are currently active. In response to one or more functions of the physical component being activated, the DIT controller configures the tunable impedance to a pre-set impedance level to compensate for capacitive loading effects on the antenna. In addition, the controller triggers a switch to connect the tunable impedance to the ground signal line to provide antenna tuning corresponding to the preset impedance level. The tunable impedance adjusts the terminal impedance of the ground signal line to minimize capacitive loading effects associated with the signal line.

Abstract: This disclosure relates to antenna switching circuitry and other radio frequency (RF) front-end circuitry. In one embodiment, the antenna switching circuitry includes a multiple throw solid-state transistor switch (MTSTS) and a multiple throw microelectromechanical switch (MTMEMS). The MTSTS is configured to selectively couple a first pole port to any one of a first set of throw ports and to selectively couple a second pole port to any one of a second set of throw ports. The MTMEMS is configured to selectively couple a third pole port to any one of a third set of throw ports. The third pole port of the MTMEMS is coupled to a first throw port in the first set of throw ports and a second throw port in the second set of throw ports of the MTSTS. Accordingly, the MTSTS is capable of routing multiple RF signals to and from the MTMEMS.

Abstract: This disclosure relates to antenna switching circuitry and other radio frequency (RF) front-end circuitry. In one embodiment, the antenna switching circuitry includes a multiple throw solid-state transistor switch (MTSTS), a multiple throw microelectromechanical switch (MTMEMS), and a control circuit. The MTSTS is configured to selectively couple a first pole port to any one of a first set of throw ports and to selectively couple a second pole port to any one of a second set of throw ports. The MTMEMS is configured to selectively couple a third pole port to any one of a third set of throw ports. The control circuit is configured to control the selective coupling of the MTSTS and the MTMEMS. In this manner, the control circuit may operate the antenna switching circuitry so that RF signals may be routed in accordance with Long Term Evolution (LTE) Multiple-Input and Multiple-Output (MIMO) and/or LTE diversity specifications.

Abstract: A phase shifter includes a low-pass filter, a high-pass filter, and an all-pass filter coupled in series between an RF input terminal and an RF output terminal of the phase shifter, at least one of the filters being tunable, controlling the phase of an input signal over a wide range of frequencies.

Abstract: Disclosed are switching circuits and methods that enable a device to switch between two wireless protocols with antenna sharing. In some implementations, the device may use two different wireless protocols concurrently and with high isolation. In some implementations, the device can be provided with insertion loss matched transmission diversity for one of the wireless protocols. In some embodiments, various signal paths and related switches that allow such functionalities can be implemented on a single die such as a silicon-on-insulator (SOI) die.

Abstract: An electronic circuit comprises a high-pass and a low-pass. The low-pass comprises at least one low-pass series element and a low-pass transverse element. The high-pass comprises at least one high-pass series element and a high-pass transverse element. The low-pass series element and the high-pass transverse element are realised in this context by a common component, and/or the high-pass series element and the low-pass transverse element are realised in this context by a common component.

Abstract: There is provided a high frequency switching circuit reducing power consumption at the time of signal reception and signal transmission. The high frequency switching circuit includes a pulse generation unit generating a clock selecting pulse signal having a predetermined active period; a clock selection unit selecting a reference clock signal when the clock selecting pulse signal is in an active state and selecting a low-speed clock signal having a frequency lower than that of the reference clock signal when the clock selecting pulse signal is not in an active state; a voltage down unit accumulating negative charges in a capacitor to generate predetermined negative voltage; and a switching unit including at least one switch holding a turned-off state by being applied with the predetermined negative voltage.

Abstract: A transmission gate includes first and second transmission path terminals, a series connection of first and second field effect transistors (FETs), and a control circuit. The channels of the first and second FETs are coupled in series between the first transmission path terminal and the second transmission path terminal, such that a channel contact of the first FET is coupled to the second transmission path terminal and a channel contact of the second FET is coupled to the first transmission path terminal.

Abstract: Disclosed herein is a resistor-sharing switching circuit including: a first switching device and a second switching device; and a resistor whose first end is connected to a control signal input end to which a control signal for controlling bodies of the first switching device and the second switching device is applied and whose second end is connected to the bodies of the first switching device and the second switching device.

Abstract: Example embodiments of the invention are directed to CMOS differential antenna switches with multi-section impedance transformation. The differential architecture can provide relief from large voltage swings of the power amplifiers by distributing the voltage stress over the receiver switch with two of the identical or substantially similar single-ended switches. In order to reduce the voltage stress further, multi-section impedance transformations can be used. Degraded insertion loss due to the impedance transformation technique can be compensated by selecting an optimal impedance for the antenna switch operation. Accordingly, the use of the multi-section impedance transformations with the differential antenna switch architecture enables high power handling capability for the antenna switch with acceptable efficiency for the transmitter module.

Abstract: Provided is a high frequency switch wherein first switch circuits, each of which includes a first PIN diode, are connected in parallel to one or more first ?/4 signal transmitting paths which transmit transmitting signals, and second switch circuits, each of which includes a second PIN diode, are connected in parallel to one or more second ?/4 signal transmitting paths which transmit receiving signals to a receiving terminal. A first control voltage is applied to the cathode of the first PIN diode, and a second control voltage is applied to the cathode of the second PIN diode. Furthermore, a biasing circuit which applies a constant bias voltage is connected to each anode of the first PIN diode and the second PIN diode.

Abstract: A method for switching between first and second voltages is provided. Initially, a first voltage is provided from a first input terminal to an output terminal through a first MOS transistor, and the first MOS transistor is deactivated. A back-gate of a second MOS transistor is shorted to the output terminal in response to the deactivation of the first MOS transistor and after a settling interval, and the second MOS transistor is activated while its back-gate is shorted to the terminal so as to provide a second voltage from a second input terminal to the output terminal.

Abstract: This document discusses, among other things, apparatus and methods for passing a signal in a power down state. An example switch device can include a first depletion-mode transistor configured to pass an analog signal between a first node and a second node in a first state and to isolate the first node from the second node in a second state, a control circuit coupled to a control node of the first depletion-mode transistor and configured to isolate the control node from a first supply input in the first state and to couple the control node to the first supply input in the second state, and a tracking circuit configured to couple the control node of the first depletion-mode transistor to the first node during the first state and to isolate the control node of the first depletion-mode transistor from the first node in the second state.

Abstract: There is provided a high frequency switch having a reduced circuit scale while maintaining satisfactory harmonic characteristics in a transfer path of a high frequency signal. The high frequency switch includes: at least one transmission port; at least one reception port; a common port; transmission side series switches each including a body contact type FET; transmission side shunt switches each including a body contact type FET; reception side series switches each including a body contact type FET; and reception side shunt switches each including at least one floating body type FET.

Abstract: There is provided a high frequency semiconductor switch having an FET designed in consideration of characteristics required for a transmission terminal and a reception terminal. The high frequency semiconductor switch includes a plurality of field effect transistors that each include a source region and a drain region formed on a substrate to be spaced apart by a predetermined distance, a gate formed on the substrate to be disposed at the predetermined distance, a source contact formed on the substrate to be connected with the source region, and a drain contact formed on the substrate to be connected with the drain region. A distance between a source contact and a drain contact of a reception terminal side transistor is longer than a distance between a source contact and a drain contact of a transmission terminal side transistor.

Abstract: Provided is a RF switch for switching a path of a RF signal using a semiconductor transistor such as a field effect transistor (FET). The RF switch includes a plurality of resonators connected to a RF transmission line, and at least one of switching elements connected in shunt or in series between the plural of resonators. The plurality of resonators resonate by interacting with the switching elements when the switching elements are shorted or open.

Abstract: A system and method are provided for biasing transistor switches in a semiconductor based high power switch. Off-state Vgsd biasing for the off transistor switches is based upon acceptable levels of spurious harmonic emissions and linearity.

Abstract: According to one embodiment, a semiconductor switch includes a voltage generator, a driver, a switch section, and a power supply controller. The voltage generator is configured to generate a first potential and a negative second potential. The first potential is higher than a power supply voltage supplied to a power supply terminal. The driver is connected to an output of the voltage generator and is configured to output the first potential in response to input of high level and to output the second potential in response to input of low level. The switch section is configured to switch connection between terminals in response to an output of the driver. The power supply controller is configured to control the output of the voltage generator.

Abstract: Circuits and methods related to a switch having extended termination bandwidth are disclosed. A switch having an input end and an output end, and capable of being in an ON state and an OFF state, can include a termination circuit configured to yield an extended frequency bandwidth in which a desired OFF state termination impedance is provided. A termination circuit may include two or more electrically parallel resistor-capacitor branches coupled to the switch input or output end. A switch termination circuit may provide an OFF state termination impedance that is substantially equal to the switch ON state termination impedance. Also, a termination circuit may enable a desired termination impedance without sacrificing other switch performance features, including insertion loss, isolation, or VSWR difference between ON and OFF states. Also disclosed are examples of how the foregoing features can be implemented in different products and methods of fabrication.

Abstract: Provided is a high-frequency switch formed by a first switch circuit connected in parallel to a first ?/4 signal transmission path for transmitting a transmission signal from a transmission terminal and a second switch circuit connected in parallel to a second ?/4 signal transmission path for transmitting a reception signal to a reception terminal. The high-frequency switch further includes a directivity coupler which has the first ?/4 signal transmission path as a constituent element and detects a reflected wave of the transmission signal. The directivity coupler includes: the first ?/4 signal transmission path; a ?/4 signal line arranged to oppose to the first ?/4 signal transmission path; a reflected wave output terminal connected to one end of the ?/4 signal line; and a terminal resistor connected to the other end of the ?/4 signal line.

Abstract: A semiconductor switch includes a main line, branch lines branching from the main line at the same branch point, switching devices shunt-connected between one of the branch lines and ground and operated so that the one of the branch lines is connected to and disconnected from ground, a main terminal connected to an end of the main line, and branch terminals connected to an end of one of the branch lines. The impedance of one of the branch lines, as seen from the branch point, is conjugately matched to the combined impedance of the main line and the rest of the branch lines, as seen from the branch point, the one of the branch lines transmitting an RF signal, and the rest of the branch lines blocking the RF signal.

Abstract: A semiconductor switching device includes a field effect transistor and an inductor structure that provides a frequency dependent inductance in a parallel connection. During the off-state of the semiconductor switching device, the frequency dependent impedance component due to the off-state parasitic capacitance of the switching device is cancelled by the frequency dependent inductance component of the inductor structure, which provides a non-linear impedance as a function of frequency. The inductor structure provides less inductance at a higher operating frequency than at a lower operating frequency to provide more effective cancellation of two impedance components of the parasitic capacitance and the inductance. Thus, the semiconductor switching device can provide low parasitic coupling at multiple operating frequencies. The operating frequencies of the semiconductor switching device can be at gigahertz ranges for millimeter wave applications.

Abstract: An attenuating antenna switch may be used to suppress increase in the scale and power consumption of an RFIC. The antenna switch has a first terminal, a second terminal, and an antenna terminal coupled to the first and second terminals and configured to be connected to an antenna. The first switch switches between a first state in which a high frequency signal is propagated between the first terminal and the antenna terminal, and a second state in which the high frequency signal is interrupted. A second switch switches between the first and second states between the second terminal and the antenna terminal. The first and second switches are controlled in a mutually exclusive manner such that only one of the two switches can be in the first state at any given time. When in the first state, each switch adjusts an attenuation amount of the high frequency signal.

Abstract: Switch circuits are disclosed, for providing a single-ended and a differentially switched high-voltage output signals by switching a high supply voltage in response to at least one logic-level control signal. The switch that provides the single-ended switched high-voltage output signal includes a chain of at least three serially coupled field effect transistors (FETs). The chain receives the high supply voltage and switches it to output the high-voltage output signal. The switch that provides the differentially switched high-voltage output signal includes two differentially coupled chains, each having at least three serially coupled FETs. The chains receive the high supply voltage and switch it to output the differential high-voltage output signal. A control/bias circuit provides a control voltage to at least one of the FETs in the chains, responsive to the control signal.

Abstract: Disclosed is a high frequency switch wherein a first switch circuit is connected in series to a first ?/4 signal transmission path connected between an antenna connecting terminal and a transmission terminal. In the first switch circuit, a first ?/4 transmission path and a first parallel resonant circuit, which includes one first PIN diode, are connected in series. In a first inductor of the first parallel resonant circuit, a constant is set so that a resonance frequency of the first parallel resonant circuit and the center frequency of a first antenna switch are the same when the first PIN diode is turned off.

Abstract: A semiconductor switch includes: a switch section, provided on a substrate, switching connection states among a plurality of terminals; a positive voltage generator generating a positive potential higher than a supply potential supplied from a power-supply line; a driver, connected to an output line of the positive voltage generator, supplying a control signal to the switch section in response to a terminal switching signal; and a voltage controller, provided on the same substrate, controlling to connect the output line of the positive voltage generator to the power-supply line for a first period corresponding to a change in the connection states, and controlling to disconnect the output line from the power-supply line after the first period.

Abstract: In an improved T/R switch configuration of a radio transceiver, the sizes of active switches coupled in series between the receive port and the common port are tapered such that the voltage referenced to ground across the active devices of the T/R switch is more evenly distributed among the switches which increases the power handling capability of that path. According to one embodiment of the present invention, an RF switch includes a plurality of first switches coupled in series between a transmit port and a common port for transmitting an RF signal, and a plurality of second switches coupled in series between a receive port and the common port. At least two of the plurality of second switches have different sizes such that the at least two of the second switches have substantially the same nodal impedance with respect to a frequency of the RF signal and an RF ground.

Abstract: A front end circuit for selectively coupling a first antenna and a second antenna to a transmit chain and a receive chain of a radio frequency (RF) transceiver is disclosed. There is a first power amplifier having an input connectible to the transmit chain of the RF transceiver, a first low noise amplifier having an output connectible to the receive chain of the RF transceiver, and a second low noise amplifier with an input connectible to the second antenna, as well as an output connectible to the receive chain of the RF transceiver. A first matching and switch network is connected to the first antenna, the output of the first power amplifier, and the input of the first low noise amplifier. Transmit signals from the first power amplifier and receive signals from the first antenna are selectively passed to the first antenna and the first low noise amplifier.

Abstract: The invention relates to a Radio Frequency System and method. A Radio Frequency (RF) system comprising a RF switch comprising a plurality of transistor switching elements implemented on Silicon on Insulator (SOI) for switching at least one or more RF signals and said SOI comprises a bulk substrate region and a buried oxide region. At least one filter is adapted to isolate the RF signal from the substrate and/or other high frequency signals or control signals present in the RF system. There is also provided a coupling capacitor adapted to cooperate with the filter to improve linearity of the transistor switch elements.

Abstract: One high-frequency switch Qm supplied with transmit and receive signals to ON, and another high-frequency switch Qn supplied with a signal of another system to OFF are controlled. In the other high-frequency switch Qn, to set V-I characteristics of near-I/O gate resistances Rg1n-Rg3n of a near-I/O FET Qn1 near to a common input/output terminal I/O connected with an antenna are set to be higher in linearity than V-I characteristics of middle-portion gate resistances Rg3n and Rg4n of middle-portion FETs Qn3 and Qn4. Thus, even in case that an uneven RF leak signal is supplied to near-I/O gate resistances Rg1n-Rg3n, and middle-portion gate resistances Rg3n and Rg4n, the distortion of current flowing through the near-I/O gate resistances Rg1n-Rg3n near to the input/output terminal I/O can be reduced.