Simulating Specific Type Of Reactance Patents (Class 333/214)
  • Patent number: 6737944
    Abstract: A transistor M1 has its drain connected to a source of a transistor M2 through a capacitor Cc3. A series connection of a resistor R and a capacitor Cc1 is provided between a source of the transistor M1 and a gate of the transistor M2. The transistor M1 has its gate connected to a drain of the transistor M2 through a capacitor Cc2. Appropriate dc bias potentials P1, P2 and P3 are provided for the drain of the transistor M2, the gate and the drain of the transistor M1, respectively, so that an active inductor is obtained between the gate and the source of the transistor M2.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: May 18, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Tatsuya Kunikiyo
  • Patent number: 6734767
    Abstract: The invention refers to a diplexer, particularly for use in microwave devices, comprising a low-pass filter and a high-pass filter, both having inductors and capacitors. It is suggested that at least one inductor of each of said filters is provided as an active inductor.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: May 11, 2004
    Assignee: Alcatel
    Inventors: Justine Vanoverschelde, Georges Coury, Lucien Loval
  • Patent number: 6707354
    Abstract: A circuit for an apparatus is an active circuit that synthesizes self-induction. The active circuit comprises only one operational amplifier. With the use of tunable capacitors, the inductor synthesized by the active circuit becomes a tunable inductor.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: March 16, 2004
    Assignee: Alcatel
    Inventors: Thierry Pollet, Stéphane Bloch
  • Publication number: 20040041669
    Abstract: A tuning circuit using a negative resistance circuit for compensating an equivalent series resistance component thereof is provided. The negative resistance circuit has simple circuit construction and design and adjustment thereof is easy.
    Type: Application
    Filed: August 1, 2003
    Publication date: March 4, 2004
    Inventor: Kazuo Kawai
  • Publication number: 20040017273
    Abstract: In order to improve Q of a tuning circuit by using a negative resistance circuit, a tuning circuit wherein a frequency selectivity characteristic and a tuning circuit gain does not vary and are kept constant values even if a tuning frequency is changed, is provided. The tuning circuit is constructed so as to compensate a series resistance component by connecting a negative resistance circuit to a series resonance circuit. The negative resistance circuit includes a differential amplifying circuit having two transistors emitters of which are connected in common, and a low output impedance circuit such as an emitter follower. The low impedance output is fed back to a same phase input side of the differential amplifying circuit directly and also to an inverse phase input side thereof to obtain a negative resistance value at this inverse input terminal.
    Type: Application
    Filed: June 4, 2003
    Publication date: January 29, 2004
    Inventor: Kazuo Kawai
  • Publication number: 20040008096
    Abstract: An inductor equivalent circuit is disclosed. The circuit comprises a reference current source, a first current mirror, a second current mirror, two operational amplifiers OP1 and OP2, a capacitor, a first transistor, a second transistor, a mirror resistor set, and a bypass current source in parallel with the capacitor. An input signal is through OP1 and second transistor to control the reference current source. The first mirror current is then feed-back a signal to the first transistor through an OP2. The current signal makes the drain current of the first transistor lags the input voltage signal by 90° due to the capacitor coupled with the first mirror current source.
    Type: Application
    Filed: January 15, 2003
    Publication date: January 15, 2004
    Applicant: RichTek Technology Corp.
    Inventors: Jing-Meng Liu, Kent Hwang, Chao-Hsuan Chuang, Cheng-Hsuan Fan
  • Patent number: 6628181
    Abstract: A tuning circuit is constructed to set Q of the tuning circuit to a high desired value by using a negative resistance value. The tuning circuit is made to oscillate weakly by using a negative resistance circuit, a voltage-resistance converter and a digital-analog converter. A negative resistance of the negative resistance circuit is scanned by a counter so that two negative resistance values corresponding to an oscillation amplitude and another oscillation amplitude of one half are obtained by analog comparators COMP1 and COMP2. A negative resistance value to be set is operated by an adder/subtracter from a series resistance value corresponding to a desired Q and this value. Scanning is stopped when the negative resistance value is obtained. The tuning circuit can be formed by small size digital integrated circuits.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: September 30, 2003
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Publication number: 20030117232
    Abstract: The invention refers to a diplexer, particularly for use in microwave devices, comprising a low-pass filter and a high-pass filter, both having inductors and capacitors. It is suggested that at least one inductor of each of said filters is provided as an active inductor.
    Type: Application
    Filed: December 2, 2002
    Publication date: June 26, 2003
    Applicant: ALCATEL
    Inventors: Justine Vanoverschelde, Georges Coury, Lucien Loval
  • Patent number: 6552634
    Abstract: A method and a circuit for power amplification over a wide frequency range based upon the use of minimum-rating filters or matching networks, negative-component signal processing, and single or multiple amplifiers. The filters and matching networks are preferably designed to minimize the required ratings of the amplifier(s) driving them. The signal processor or generator preferably uses negative components to produces a driving signal that is compensated for the ripple in the filter, matching network, and load. The outputs of multiple amplifiers optimized for different frequency ranges can be combined into a single load with flat frequency response, resistive loads presented to the amplifiers, and no inherent power loss in the combining network.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: April 22, 2003
    Inventor: Frederick Herbert Raab
  • Patent number: 6515560
    Abstract: An active inductor includes an MOSFET having a gate, a drain serving as an output terminal and a grounded source, the MOSFET having a transconductance gm1, and a capacitor having opposite ends, one of which is grounded and the other of which is connected to the gate of the MOSFET and to a voltage-controlled constant current source having a transconductance gm, the capacitor having a capacitance C, the active inductor being operative with a small-signal output impedance Zo between the output terminal and the ground expressed as Zo=j&ohgr;{C/(gm1·gm)} (wherein &ohgr; is an angular frequency) and with an inductance Leq expressed as Leq={C/(gm1·gm)}.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: February 4, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Alberto O. Adan
  • Publication number: 20020163406
    Abstract: A tuning circuit is so constructed that it is possible to set Q of the tuning circuit to a high desired value by using a negative resistance value.
    Type: Application
    Filed: March 15, 2002
    Publication date: November 7, 2002
    Inventor: Kazuo Kawai
  • Patent number: 6437649
    Abstract: A resistor is inserted in series with an inductor feeding a bias current and that reactance of an input matching circuit or of an output matching circuit is varied depending on variations of input signal power. The input impedance of the amplifying element is restrained from lowering even when the input signal power has increased so that a constantly satisfactory impedance matching is achieved irrespective of the input signal powers variations. Furthermore, restriction on increase of the bias current enables a limitation to be imposed on increase of the power consumption of the microwave amplifier.
    Type: Grant
    Filed: April 2, 2001
    Date of Patent: August 20, 2002
    Assignee: Fujitsu Limited
    Inventors: Takumi Miyashita, Taisuke Iwai
  • Publication number: 20020079991
    Abstract: According to an embodiment of the present invention, a capacitor comprising field effect transistors and a bias transistor.
    Type: Application
    Filed: December 21, 2000
    Publication date: June 27, 2002
    Inventor: Andrew N. Karanicolas
  • Publication number: 20020047760
    Abstract: A transistor M1 has its drain connected to a source of a transistor M2 through a capacitor Cc3. A series connection of a resistor R and a capacitor Cc3 is provided between a source of the transistor M1 and a gate of the transistor M2. The transistor M1 has its gate connected to a drain of the transistor M2 through a capacitor Cc2. Appropriate dc bias potentials P1, P2 and P3 are provided for the drain of the transistor M2, the gate and the drain of the transistor M1, respectively, so that an active inductor is obtained between the gate and the source of the transistor M2.
    Type: Application
    Filed: March 15, 2001
    Publication date: April 25, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tatsuya Kunikiyo
  • Patent number: 6340916
    Abstract: An innovated transimpedance amplifier circuit consists of a buffer circuit, a simulation resistance circuit, and an amplifier circuit. The buffer circuit for inputting a signal circuit is constituted by two FETs and a resistor, and has a high current input efficiency and function of widening circuit frequency band. The simulation resistance circuit is constituted by a resistor, two buffer units, a coupling capacitor, and a biasing resistor. When operating at a low frequency, the simulating resistance circuit permits a large amount of background DC to flow through; on the other hand, when operating at a high frequency, this circuit can improve the signal coupling efficiency and reduce foreign signal output voltage. On the whole, by the circuit of the present invention, both the detecting sensitivity and the amplification factor of the signal current can be significantly improved.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: January 22, 2002
    Assignee: Telecommunications Laboratories, Chunghwa Telecom Co., Ltd.
    Inventors: Tsz-Lang Chen, Guang-Ching Leu, Chun-Yo Hsu
  • Publication number: 20010045867
    Abstract: The present invention is characterized in that a resistor is inserted in series with an inductor feeding a bias current and that reactance of an input matching circuit or of an output matching circuit is varied depending on variations of input signal power. According to the present invention, the input impedance of the amplifying element is restrained from lowering even when the input signal power has increased so that a constantly satisfactory impedance matching is achieved irrespective of the input signal power variations. Furthermore, restriction on increase of the bias current enables a limitation to be imposed on increase of the power consumption of the microwave amplifier.
    Type: Application
    Filed: April 2, 2001
    Publication date: November 29, 2001
    Applicant: Fujitsu Limited
    Inventors: Takumi Miyashita, Taisuke Iwai
  • Patent number: 6300824
    Abstract: An analog offset cancellation technique is based on the observation that the voltage developed across an inductor is proportional to the time derivative of the current passing through the inductor. An input voltage that may contain an undesired DC offset voltage is converted to a current that is representative of the input voltage. The resulting input current is passed through an inductor and the voltage generated across the inductor is used as the new input voltage. Because the voltage developed across the inductor is equal to the time derivative of the current passing through the inductor, the resulting voltage, the new input voltage, is independent of any DC components.
    Type: Grant
    Filed: March 9, 1999
    Date of Patent: October 9, 2001
    Assignee: Conexant Systems, Inc.
    Inventor: Raëd Moughabghab
  • Patent number: 6292064
    Abstract: A voltage controlled oscillator (VCO) having an amplifier including a field-effect transistor (FET). The VCO includes a voltage controlled capacitor having an inversion amplifier including an FET, an amp gain of the inversion amplifier being controlled by a voltage; and a capacitor connected between an input and an output of the inversion amplifier.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: September 18, 2001
    Assignee: Fujitsu Limited
    Inventor: Kimihiko Nagata
  • Patent number: 6211753
    Abstract: A 1.1 GHz fully integrated GaAs MESFET active inductor is presented. Both the inductance and loss resistance are tunable with the inductance independent of series loss tuning. The measured loss resistance is tunable over a −10 &OHgr; to +15 &OHgr; range with a corresponding change in inductance of less than 10% at 100 MHz and less than 4% for frequencies above 500 MHz for capacitive tuning. The inductance is tunable from 65 nH to 90 nH. The measured loss resistance is shown to be dc bias voltage tunable over a 0 to +10 &OHgr; range with an inductance tunable from 55 nH to 110 nH, with negligible interaction between loss resistance and inductance for frequencies from 100 MHz to 1.1 GHz. Several embodiments a using MESFETs and MOSFETs are described. A negative impedance converter is included to achieve increased bandwidth in all circuit realizations. Considerably larger bandwidths can be achieved depending on the fabrication technology employed and the intended application of the circuit.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: April 3, 2001
    Inventors: Curtis Leifso, James W. Haslett
  • Patent number: 6114930
    Abstract: An impedance device has a first conductor and a second conductor, the first and second conductors being positioned in relation to each other so as to provide magnetic coupling between them. The impedance of the impedance device is controlled by receiving, in the first conductor, a first electric signal having a first amplitude and a first phase angle, generating a second electric signal having a second amplitude and a second phase angle, delivering the second electric signal to the second conductor, and controlling the second phase angle.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: September 5, 2000
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventors: Jose-Maria Gobbi, Ted Johansson
  • Patent number: 6060961
    Abstract: An apparatus and associated method of manufacture for coupling a receiver and a transmitter to a single antenna feed horn so as to allow for the simultaneous transmission and reception of co-polarized signals, such as in a radio frequency communications system, are provided. To separate the two co-polarized signals of different frequencies, the apparatus comprises a waveguide junction, a first filter tuned to the transmit signal frequency, and a second filter tuned to the receive signal frequency. The apparatus may be manufactured using low-cost reusable-mandrel casting techniques.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: May 9, 2000
    Assignee: Prodelin Corporation
    Inventors: Hamid Moheb, Colin Michael Robinson
  • Patent number: 6037843
    Abstract: A controllable reactance implemented within an integrated circuit includes a first sub-circuit (20) comprising a reactive element, for example a capacitor 12, coupled in series with a transistor (14). A controllable current source (16) injects a controllable bias current through the transistor (14) to vary the effective resistance of the transistor (14) and hence the effective complex impedance of the capacitor combination. A second transistor (18) amplifies the current to increase the effective capacitance. Preferably, a second sub-circuit (24) includes corresponding components (26, 28, 30) to mirror the real component of the current flowing in the first sub-circuit (20), and transistors (32 and 34) to reflect an inverse current to the coupling node line (22) to cancel the real component of the current at the node, to thus simulate a purely capacitive circuit. An oscillator embodying this circuit is also disclosed.
    Type: Grant
    Filed: October 20, 1998
    Date of Patent: March 14, 2000
    Assignee: LSI Logic Corporation
    Inventor: Kenneth Stephen Hunt
  • Patent number: 6028496
    Abstract: An active inductor which consumes less direct current (DC) power and is stably biased, has a smaller number of bias pins, a higher quality factor (Q) and fewer controlling ports, than that of the prior art, is realized in metal semiconductor field effect transistor or bipolar transistor technology. The active inductor includes an inverting amplifier of a common source (common emitter) type, which inversely amplifies an input signal and outputs the amplified signal as an output signal, a non-inverting amplifier of a common gate (common base) cascode type, which non-inversely amplifies the output signal and the amplified signal as the input signal, a capacitor connected between the input signal and a reference signal, and a biasing portion for biasing the inverting amplifier and the non-inverting amplifier.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: February 22, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Su Ko, Kwyro Lee
  • Patent number: 5949295
    Abstract: A circuitry arrangement for a resonant circuit that may be completely monolithically integrated and electrically tuned has a differential amplifier stage with two transistors T.sub.1,T.sub.1 ' fed by a constant current source I.sub.0 that are differentially loaded at their collectors by a voltage-dependent capacity and inductively loaded in relation to the circuit ground by a pair of emitter followers T.sub.2,T.sub.2 ' with electrically adjustable impedance that act upon the base. To implement the electrically adjustable impedances, transistors with associated resistances are provided (for example a pair of emitter followers T.sub.3,T.sub.3 ' with base pre-resistances R.sub.1,R.sub.1 ') which may be adjusted by control currents (for example I.sub.1 I.sub.1 ') . The voltage-dependant capacity is implemented by transistors T.sub.4,T.sub.4 ' whose short-circuited emitters and collectors are connected so that the circuit node thus obtained is applied to the circuit ground through a voltage source U.sub.1.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: September 7, 1999
    Assignee: Sican, Gesellschaft Fur Silizium-Anwendungen Und Cad/Cat Niedersachsen MbH
    Inventor: Lothar Schmidt
  • Patent number: 5821825
    Abstract: An optically controlled oscillator utilizes a HEMT or a PIN diode as a photodetector and either a HEMT or HBT as an active inductor. The optically controlled HEMT active inductor provides a means for tuning the frequency of the oscillator. The optical receiver includes an optically tunable active inductor using a photodetector which includes a resonant tank circuit of an electronic oscillator to allow both optical/digital quench and unquench of an oscillator or digital AM detection with an improved signal to noise ratio, or optical FM modulation and analog AM detection by tuning/shifting the frequency of the oscillation through the detection of the optical light intensity.
    Type: Grant
    Filed: November 26, 1996
    Date of Patent: October 13, 1998
    Assignee: TRW Inc.
    Inventor: Kevin W. Kobayashi
  • Patent number: 5815044
    Abstract: A variable-reactance circuit comprising an amplifying section, a first differential section and a second differential section. The amplifying section has first to third bipolar transistors. These transistors are driven by three constant-current sources, respectively. The first differential section receives an output signal of the amplifying section. The first differential section has fourth and fifth bipolar transistors, which are driven by a first variable-current source. The second differential section receives the output signal of the amplifying section. The second differential section has sixth and seventh bipolar transistors, which are driven by a second variable-current source. The output currents of the first and second variable-current sources are controlled by two control signals, respectively.
    Type: Grant
    Filed: August 14, 1996
    Date of Patent: September 29, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsusi Ogawa, Tsuneyuki Murayama
  • Patent number: 5786726
    Abstract: Device of the phase-locked loop type for demodulating a frequency-modulated signal. Device for frequency demodulation, using a phase-locked loop. According to the invention, for linearizing the variation of the frequency of a local oscillator (11) as a function of its control signal (Vb), a variable capacitance (Cv) is formed by an electronic module (20) which supplies the equivalent of a capacitance whose variation as a function of the control voltage (Vb) has a linearity deviation which is established for compensating the linearity deviation of the frequency of the oscillator as a function of the value of the capacitance (Cv).
    Type: Grant
    Filed: October 29, 1996
    Date of Patent: July 28, 1998
    Assignee: U.S. Philips Corporation
    Inventor: Pascal Lemasson
  • Patent number: 5726613
    Abstract: An active inductor having a greater inductance, low loss, and which is small is provided by the present invention. The active inductor comprises a common source FET and a cascode-connected common gate FET connected thereto for providing unidirectional feedback. The drain electrode of the front FET and the source electrode of the rear FET, consisting of the common gate cascode FET, are connected together. A resistor is connected at one end to this connection. The two terminals of the active inductor correspond to the other end of the resistor and the source electrode of the common source FET. A frequency independent negative resistance is generated in series with the inductance by this configuration. By properly tuning the resistance of the resistor, it is possible to make the impedance viewed from the two terminals to have inductance component only, and therefore an active inductor having less resistance loss is obtained.
    Type: Grant
    Filed: January 31, 1996
    Date of Patent: March 10, 1998
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hitoshi Hayashi, Masashi Nakatsugawa, Masahiro Muraguchi
  • Patent number: 5600288
    Abstract: An equivalent circuit for a synthetic inductor is disclosed. The circuit in this invention utilizes a plurality of N-channel and P-channel FET devices, resistors and capacitors that can be easily fabricated using standard integrated circuit processing. The inductances that can be fabricated are on the order of 100 .mu.H to 100 mH with a frequency response achievable to greater than 10 Mhz.
    Type: Grant
    Filed: March 11, 1996
    Date of Patent: February 4, 1997
    Assignee: Tainan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jing-Meng Liu
  • Patent number: 5510755
    Abstract: A voltage-controlled capacitor includes a multiplier, having an output which serves as terminals of the controlled capacitor. The output voltage of the multiplier is applied to a reference capacitor. A signal in phase with the current in the reference capacitor is applied at one input of the multiplier, the other input of the multiplier receiving a signal determining the value of the controlled capacitor.
    Type: Grant
    Filed: December 28, 1994
    Date of Patent: April 23, 1996
    Assignee: SGS-Thomson Microelectronics, S.A.
    Inventors: Marc Kodrnja, Vincent Dufossez
  • Patent number: 5499392
    Abstract: A tunable filter (25) is described for use in loop control circuits. The filter (25) has a time constant which is determined by a resistor (40) and a capacitor. The capacitor is simulated by the series combination of an impedance converter (41) and a variable resistor, such as a field effect transistor (42). The resistance of the transistor (42) is determined by a control signal present on a control line (32) and the impedance converter (41) converts the resistance into an equivalent capacitive reactance. Therefore, the control signal on the control line (32) effectively controls the capacitance present at a node (43) and, in conjunction with the resistor (40), determines the time constant, and therefore the response time and bandwidth, of the filter (25). Multiple pole, lowpass, bandpass, highpass, and bandstop filters can be constructed. The impedance converter (41) uses a very small capacitor to simulate a large capacitance value at the node (43).
    Type: Grant
    Filed: July 19, 1994
    Date of Patent: March 12, 1996
    Assignee: Matsushita Communication Industrial Corporation of America
    Inventor: Randall L. Grunwell
  • Patent number: 5485115
    Abstract: An impedance synthesizer includes an amplifier with selectable gain and a reference capacitor, resistor, or inductor for providing a plurality of synthesized impedance values. The voltage gain of the amplifier is controlled by a programmable multiplying digital-to-analog converter which allows the selection of a myriad of desired synthesized impedances with high precision and accuracy.
    Type: Grant
    Filed: December 2, 1993
    Date of Patent: January 16, 1996
    Assignee: Fluke Corporation
    Inventor: Arnold E. Nordeng
  • Patent number: 5473276
    Abstract: In an MOS type power switching device, no leak current flows during an OFF-state, and a high current driveability is realized during a normal load condition. Furthermore, a drive current is reduced during a short-circuited load condition.
    Type: Grant
    Filed: March 16, 1995
    Date of Patent: December 5, 1995
    Assignee: Nissan Motor Co., Ltd.
    Inventor: Kraisorn Throngnumchai
  • Patent number: 5378947
    Abstract: A filter circuit comprises a glass delay line for giving a predetermined amount of delay to an input signal, and an active filter connected to the glass delay line for performing an impedance matching for the glass delay line. By changing the transconductance g.sub.m of differential amplifiers which constitute the active filter, the amount of delay of the glass delay line can be adjusted.
    Type: Grant
    Filed: April 5, 1993
    Date of Patent: January 3, 1995
    Assignee: NEC Corporation
    Inventor: Toshiya Matsui
  • Patent number: 5347238
    Abstract: A voltage controlled oscillator provides a fixed amplitude output at an adjustable frequency. The voltage controlled oscillator includes a first transistor including an emitter, a base, and a collector. A first capacitor is connected between the emitter and the base of the first transistor. An inductance simulating device generates a controllable impedance and includes second and third transistors each with a base, an emitter, and a collector. The second and third transistors are connected between the base and the collector of the first transistor. The controllable impedance includes an inductive reactance component related to a quiescent bias current flowing through the third transistor. A current source connected to the third transistor generates the quiescent bias current to vary the inductive reactance component. The inductive reactance component and the first capacitor vary the adjustable frequency of oscillation.
    Type: Grant
    Filed: July 6, 1993
    Date of Patent: September 13, 1994
    Assignee: TRW Inc.
    Inventor: Kevin W. Kobayashi
  • Patent number: 5343177
    Abstract: Apparatus and methods are disclosed for use in electronic circuits that contain Generalized Impedance Converters and shape frequency response. The combined effect of two Generalized Impedance Converters 30 and 34 with their outputs connected to a coupler 32 simulates coupled capacitors FIG. 2(B) or coupled inductors FIG. 2(A) through impedance scaling. The resistors used in the coupler 32 define the degree of coupling between the first and second Generalized Impedance Converter 30 and 34 respectively. In one embodiment, simulated coupled inductors 96, 98 and 100 are used in a bandpass circuit along with additional R-C devices to control upper and lower sideband attenuation and resonant frequency. Here, the resistors in the coupler device 86 simulate the mutual inductance 98 of coupled inductors.
    Type: Grant
    Filed: December 1, 1992
    Date of Patent: August 30, 1994
    Assignee: Hughes Aircraft Company
    Inventor: Austin M. Williams
  • Patent number: 5323277
    Abstract: A sound recording apparatus for use in video tape recorders, for equalizing a sound signal before the sound signal is recorded onto a recording medium includes an operational amplifier where the sound signal is inputted to its first input terminal, a feedback resistor connected to an output terminal and a second input terminal of the operational amplifier, and a simulated inductor circuit connected to the second input terminal of the operational amplifier. The simulated inductor circuit has a buffer where a predetermined bias is provided to its input. Between an output of the buffer and the second input terminal of the operational amplifier is connected an impedance network whose circuit constant is switched by a switch which operates according to a recording speed mode of the video tape recorder. This switching changes an equalizing characteristic of the amplifier.
    Type: Grant
    Filed: September 23, 1993
    Date of Patent: June 21, 1994
    Assignee: Rohm Co., Ltd.
    Inventor: Hideaki Sugibayashi
  • Patent number: 5250917
    Abstract: An equivalent inductance circuit includes a feedback type integration circuit and a differential amplifying circuit. An input signal applied to an input terminal is integrated by the feed-back type integration circuit and, a signal according to a difference component between an integrated output signal and the input signal is outputted by the differential amplifying circuit. By feeding the difference signal back to the input terminal, an input impedance equivalently represents an inductance characteristic. Such equivalent inductance can be changed by a current from a variable current source which supplies the current to the differential amplifying circuit and, a change of the equivalent inductance shows an inverse proportional manner.
    Type: Grant
    Filed: April 28, 1992
    Date of Patent: October 5, 1993
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Fumiaki Honda, Nobukazu Hosoya
  • Patent number: 5229665
    Abstract: An optically controlled active impedance element particularly suited to se as a tuneable inductive element for a microwave oscillator is disclosed. The optically controlled active inductive element is comprised of a circuit arrangement, preferably consisting of MESFET devices which exhibit a composite inductive characteristics, and whose inductance may be determined and controlled by direct illumination impinging on the MESFETs. The optically controlled active inductive element lends itself to being adapted to monolithic microwave integrated circuit (MMIC) applications and may find use in a wide variety of microwave circuits. Also disclosed, is an embodiment which uses the optical controlled active impedance element, in a prescribed manner, to serve as a tuneable capacitor for use in various microwave circuits.
    Type: Grant
    Filed: December 11, 1992
    Date of Patent: July 20, 1993
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: William D. Jemison, Peter R. Herczfeld
  • Patent number: 5175513
    Abstract: A cascode amplifier having a 180.degree. phase characteristic is connected with in-phase feedback circuits having a 0.degree. phase characteristics. When viewed from an output side of the cascode amplifier, these circuits operate as inductive circuits having negative resistance. Thus, connecting a capacitor to the output of the cascode amplifier causes formation of a parallel resonance circuit, so that an oscillating operation is carried out. Since an inductor, i.e., inductive circuit can be structured without use of a transmission line, an occupied region necessary for formation of a microwave oscillation circuit is reduced.
    Type: Grant
    Filed: March 11, 1992
    Date of Patent: December 29, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Shinji Hara
  • Patent number: 5117205
    Abstract: An electrically controllable oscillator circuit (30) comprises two balanced transconductance circuits (G1, G2), each including transistor pairs arranged as inverters (Inv14) and as resistors (Inv5-6). The oscillation frequency (f) and the quality factor (Q) of the oscillator circuit (30) are controlled by means of a single control signal provided by a combined control circuit (Inv7, Dif, IM1, IM2). The current mirror circuit (IM1, IM2) and a differential pair (Dif) derived the control signal for adjusting the quality factor (Q) from a resistor-connected further transistor pair (Inv7) connected to the control signal for adjusting the frequency (f). The quality factor of an electrically controllable filter arangement including similar transconductance circuits (G-3-9) is adjusted by means of the control signal generated by the control circuit via a buffer circuit (B) and a low-pass circuit (C3).
    Type: Grant
    Filed: April 12, 1991
    Date of Patent: May 26, 1992
    Assignee: U.S. Philips Corporation
    Inventor: Bram Nauta
  • Patent number: 5030927
    Abstract: A reactance control circuit comprising a variable reactance circuit whose reactance is determined by the currents flowing to first and second differential transistor circuits, a differential amplifier for producing first and second currents in accordance with an input voltage, and a DC amplifier circuit for amplifying the first and second currents and supplying the amplified currents to the variable reactance circuit in order to control the currents flowing to the first and second differential transistor circuits. The DC amplifier circuit includes first and second transistors for supplying output currents to the variable reactance circuit, and a base potential control circuit for, when the first and second currents are equal to each other, supplying a predetermined low potential to the bases of the first and second transistors so that the currents flowing to the first and second transistors are both reduced.
    Type: Grant
    Filed: March 12, 1990
    Date of Patent: July 9, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masashi Itoh
  • Patent number: 5012201
    Abstract: A variable impedance circuit includes a first differential amplifier circuit having an input terminal pair, an output terminal pair and a capacitive element connected between the emitters of a transistor pair. The variable impedance circuit further inclludes a second differential amplifier circuit having an input terminal pair and an output terminal pair. The output terminal pair of the first differential amplifier circuit is connected to the input terminal pair of the second differential amplifier circuit. Furthermore, the output terminal pair of the second differential amplifier circuit is connected to the input terminal pair of the first differential amplifier circuit.
    Type: Grant
    Filed: October 25, 1989
    Date of Patent: April 30, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoichi Morita, Hiroshi Komori, Akio Yokoyama
  • Patent number: 4990872
    Abstract: A reactance circuit comprises a differential amplification circuit formed by differentially connecting the first and second transistors to each other, a load connected to a collector of the first transistor, a reactance element interposed between a base of the first transistor and a reference potential point, and a capacitor and a resistor connected in series between the collector and the base of the first transistor. A negative feedback loop to the first transistor is formed by the capacitor and the resistor. Accordingly, when the collector of the first transistor is used as an output terminal, a negative equivalent reactance is produced in the output terminal.
    Type: Grant
    Filed: June 13, 1988
    Date of Patent: February 5, 1991
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kazuhisa Ishiguro, Mikio Yamagishi
  • Patent number: 4963845
    Abstract: A monodirectional, current-reducing impedance magnifier (MCRIM) provides continuously variable magnification of any general impedance Z.sub.0 without affecting its phase charateristics. The monodirectional, current-reducing impedance magnifier circuit realizes floating resistors, inductors and capacitors, suitable for use over any range of frequencies, and the simulated impedance is continuously user-variable over wide ranges. In another embodiment, a monodirectional, generalized impedance synthesizer (MGIS) permits simulation of user-variable floating impedances whose phase and frequency characteristics are widely subject to design objectives. In addition to realizing all conventional circuit elements R, L and C, including positive and negative values thereof, the MGIS produces an infinite set of alternatives for the simulation of user-variable resistance and reactance functions of frequency. The MGIS is also usable over any bandwidth.
    Type: Grant
    Filed: March 29, 1989
    Date of Patent: October 16, 1990
    Inventor: Robert L. Collier
  • Patent number: 4788461
    Abstract: An active choke circuit. The circuit can be used in place of a conventional discrete coil to permit a precise marriage of logic functions to analog functions in a telephone powered by the current in a telephone line.
    Type: Grant
    Filed: January 8, 1987
    Date of Patent: November 29, 1988
    Inventor: Gary K. Snyder
  • Patent number: 4644306
    Abstract: A predetermined and variable synthesized capacitance which may be incorporated into the resonant portion of an electronic oscillator for the purpose of tuning the oscillator comprises a programmable operational amplifier circuit. The operational amplifier circuit has its output connected to its inverting input, in a "follower" configuration, by a network which is low impedance at the operational frequency of the circuit. The output of the operational amplifier is also connected to the non-inverting input by a capacitor. The non-inverting input appears as a synthesized capacitance which may be varied with a variation in gain-bandwidth product of the operational amplifier circuit. The gain-bandwidth product may, in turn, be varied with a variation in input set current with a digital to analog converter whose output is varied with a command word. The output impedance of the circuit may also be varied by varying the output set current.
    Type: Grant
    Filed: July 15, 1985
    Date of Patent: February 17, 1987
    Assignee: The United States of America as represented by the administrator of the National Aeronautics and Space Administration
    Inventor: Leonard L. Kleinberg
  • Patent number: 4638265
    Abstract: A variable reactance, the value of which is controllable, is produced between a pair of terminals of a variable reactance circuit comprising a pair of current steering circuits. First and second reactive components are coupled respectively between the pair of terminals and the first and second current steering circuits to produce first and second antiphase reactive currents'. The first reactive current is split by the first current steering circuit into first and second antiphased proportional currents. Likewise, the second reactive current is split by the second current steering circuit into third and fourth antiphased proportional currents with said first and third currents being antiphased with respect to each other. The first reactive current is summed at a first one of the pair of terminals with said first and third currents while the second reactive current is summed at the second one of the pair of terminals with said second and fourth currents to produce the variable reactance across the terminals.
    Type: Grant
    Filed: June 3, 1985
    Date of Patent: January 20, 1987
    Assignee: Motorola, Inc.
    Inventors: Gerald K. Lunn, W. Eric Main, Michael McGinn
  • Patent number: 4607140
    Abstract: This disclosure depicts a build out capacitor for use with a voice frequency loaded pair having tip and ring terminals. The circuit comprises means for providing a virtual impedance between the tip terminal and ground and between the ring terminal and ground. The means has a first input connected to the tip terminal and a second input connected to the ring terminal. The means for providing also has first and second outputs. A first fixed capacitor is connected between the first output and the tip terminal and a second fixed capacitor connected between the second output and the ring terminal. The first capacitor is equal in value to the second capacitor.
    Type: Grant
    Filed: March 5, 1984
    Date of Patent: August 19, 1986
    Assignee: Rockwell International Corp.
    Inventor: Ian A. Schorr
  • Patent number: 4607243
    Abstract: A complex capacitive impedance (Z) whose capacitance value is considerably larger than the total capacitance of the components used in it is implemented by connecting a capacitive impedance (Z3) in series with a first resistor (R1) to form a voltage divider, and bypassing the first resistor (R1) with a voltage follower circuit (SFS).
    Type: Grant
    Filed: September 21, 1984
    Date of Patent: August 19, 1986
    Assignee: International Standard Electric Corporation
    Inventor: Benno Dreier