Planar Type Patents (Class 336/232)
  • Patent number: 7365628
    Abstract: A semiconductor apparatus having a semiconductor chip, a first coil electrically connected to the semiconductor chip and a first electrode electrically connected to the first coil is comprised of a second electrode which can be electrically connected to the first electrode as well as which can be electrically connected to a second coil on the outside of the semiconductor apparatus, and is characterized by that inductance composed of the first coil and the second coil is obtained by electrically connecting the second electrode to the first electrode and the second coil.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: April 29, 2008
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventors: Akihiro Sato, Satoru Sekiguchi, Kiyokazu Kamado, Makoto Tsubonoya, Kiyoshi Mita, Yoichi Nabeta
  • Patent number: 7362205
    Abstract: A common-mode filter comprises a first conductor layer, a second conductor layer, and an insulating layer placed between the first and second conductor layers. The first conductor layer has a first spiral part formed such as to draw a convolution and a first lead electrode extending from one end of the first spiral part. The second conductor layer has a second spiral part formed such as to draw a convolution and a second lead electrode extending from one end of the second spiral part. The first conductor layer is formed with third and fourth lead electrodes. The second conductor layer is formed with a connecting conductor connecting the third lead electrode to the other end of the first spiral part. The fourth lead electrode is connected to the other end of the second spiral part through a contact hole formed in the insulating layer. The third lead electrode is connected to one end of the connecting conductor through a contact hole formed in the insulating layer.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: April 22, 2008
    Assignee: TDK Corporation
    Inventors: Tomokazu Ito, Takeshi Okumura
  • Patent number: 7362204
    Abstract: An inductance with a midpoint formed in a monolithic circuit, comprising a first conductive spiral integrally formed in a first conductive level, a second conductive spiral integrally formed in a second conductive level, and a via of spiral interconnection at the position of the inductance midpoint.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: April 22, 2008
    Assignee: STMicroelectronics S.A.
    Inventors: Joël Concord, Olivier Trocherie
  • Patent number: 7339452
    Abstract: An embedded inductor suitable for a wiring board is provided. The wiring board having a plurality of patterned conductive layers and a plurality of insulating layers, and one of the insulating layers is disposed between any two adjacent of the patterned conductive layers. The embedded inductor at least includes a first conductive trace, a second conductive trace, a third conductive trace, a first conductive structure, and a second conductive structure. These conductive traces are respectively formed of different patterned conductive layers of the wiring board. The first conductive structure and the second conductive structure passing through the insulating layers connect the conductive traces in a spiral pattern. The embedded inductor with such spiral pattern is arranged on a plane that is perpendicular to the patterned conductive layers of the wiring board.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: March 4, 2008
    Assignee: Via Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7327207
    Abstract: A lamination type electronic component includes spiral conductor patterns which are substantially quadrilateral and are electrically connected to each other through a via hole formed in a ceramic insulating layer so as to constitute a coil. The conductor patterns are arranged so that the center in the width direction of the sides extending in the Y-axis direction of the one conductor pattern may be positioned at the inside edges of the sides extending in the Y-axis direction of the other conductor pattern.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: February 5, 2008
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Keiji Asakawa
  • Patent number: 7321284
    Abstract: A bandpass filter includes at least two thin-film layers, a first resonant circuit including a first inductor, and a second resonant circuit including a second inductor. In one embodiment, the first inductor comprises a coil having a counter-clockwise rotation positioned in two or more of the at least two thin-film layers and the second inductor comprises a coil having a clockwise rotation positioned in two or more of the at least two thin-film layer. In this case, the first inductor is coupled to the second inductor in at least one of the at least two thin-film layers when the bandpass filter is energized. In another embodiment, the first inductor has a clockwise rotation and the second has a counter-clockwise rotation positioned. In this case, the first inductor is coupled to the second inductor in at least two of the at least two thin-film layers when the bandpass filter is energized.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: January 22, 2008
    Assignee: TDK Corporation
    Inventors: Qiang Richard Chen, Hajime Kuwajima
  • Patent number: 7317373
    Abstract: An inductor is made of a flat conducting wire with a constant thickness. The inductor includes a coiled portion and two leg portions. The leg portions are end parts of the flat conducting wire that are processed with a specific process. In addition, each leg portion has a thickness smaller than that of the coiled portion.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: January 8, 2008
    Assignee: Delta Electronics, Inc.
    Inventors: Han-Cheng Hsu, Chih-Tse Chen, Ching-Man Kao
  • Patent number: 7317354
    Abstract: An inductor for a substrate of a circuit board includes a first electrical conductive layer and a second electrical conductive layer. The second electrical conductive layer is disposed over the first electrical conductive layer and is electrically connected to the first electrical conductive layer. The width or projecting area of the first electrical conductive layer is less than the width or projecting area of the second electrical conductive layer respectively.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: January 8, 2008
    Assignee: VIA Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Publication number: 20070294880
    Abstract: A method may first mold a casing and a core of a surface mount inductor, a metal layer is then attached to the lower portion of each of two side panels of the core, conductor contacts are then electroplated onto the side panels of the core, and a wire may then be easily and quickly attached onto or wound around an opened horizontal part of the core with a winding machine for allowing the surface mount inductor to be easily and quickly manufactured. The wire includes a terminal secured to one of the conductor contact before the wire is wound around the horizontal part of the core, and another terminal secured to the other conductor contact after the wire has been wound around the horizontal part of the core.
    Type: Application
    Filed: June 21, 2006
    Publication date: December 27, 2007
    Inventor: Ming Yen Hsieh
  • Patent number: 7312685
    Abstract: An inductor comprises first and second winding portions symmetrically arranged in an insulating layer on a substrate. Each winding portion comprises first, second and third semicircular conductive traces arranged in concentricity from the inside to the outside. Each semicircular conductive trace has first and second ends, in which the first ends of the first semicircular conductive traces of the first and second winding portions are coupled to each other. A coupling portion comprises a first pair of connection layers cross-connecting the first ends of the second and third semicircular conductive traces of both winding portions and a second pair of connection layers cross-connecting the second ends of the first and second semicircular conductive traces of both winding portions. The adjacent semicircular conductive traces of each winding portion have a trace line space therebetween and the relatively outer trace line space is wider than the relatively inner trace line space.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: December 25, 2007
    Assignee: VIA Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7312682
    Abstract: A coil component comprises a core element having a mounting portion, a coil conductor placed on the core element, and at least two terminal electrodes which are placed in the mounting portion. The mounting portion has at least two terminal placement areas for placing the terminal electrodes respectively. A hollow portion opening to the mounting side face of the mounting portion is formed in an area between the at least two terminal placement areas in the mounting portion. When mounting the coil component on a circuit board, conductive paste is intervened between an area from the terminal electrodes placed in the mounting portion of the core element to the base exposed area of the mounting portion, and the electrode patterns on the circuit board.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: December 25, 2007
    Assignee: TDK Corporation
    Inventors: Masatoshi Yasuda, Shin Kudo, Hiroshi Suzuki, Katsumi Kobayashi
  • Patent number: 7312684
    Abstract: A semiconductor device includes a semiconductor substrate, an insulating film formed on the semiconductor substrate, and a thin-film inductor element which is formed on the insulating film, and which includes first and second terminals and a conductive layer formed into a spiral shape between the first and second terminals so as to have a plurality of turns and at least one intersection. The conductive layer includes (i) a first conductor layer formed on the semiconductor substrate, and (ii) a second conductor layer which is formed on the insulating film, intersects the first conductor layer via the insulating film at the intersection. The thin-film inductor element has an arrangement in which the first and second conductor layers are symmetrically arranged in directions from an intermediate point between the first and second terminals along the longitudinal direction of the conductive layer to the first and second terminals.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: December 25, 2007
    Assignee: Casio Computer Co., Ltd.
    Inventor: Yutaka Aoki
  • Patent number: 7307503
    Abstract: The present invention provides a coil structure capable of improving a differential transmission characteristic by reducing capacitance as much as possible. A common mode choke coil is constructed so that a section of each of two coil patterns constructing a thin film coil has an inverted trapezoid shape which is bilaterally asymmetrical. Because of the structural characteristic that the section of each of the two coil patterns has an inverted trapezoid shape which is bilaterally asymmetrical, the facing area of the two coil patterns contributing to capacitance is minimized. Thus, the capacitance of the thin film coil can be reduced as much as possible.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: December 11, 2007
    Assignee: TDK Corporation
    Inventors: Rina Kaji, Akifumi Kamijima, Susumu Aoki, Kenji Takeo, Yoshikazu Sato
  • Patent number: 7304557
    Abstract: A laminated coil includes a non-magnetic body section (5) inside a laminated body. On the non-magnetic body section (5), a coil conductor (4c) is provided. The coil number of the coil conductor (4c) is greater than the coil number of a coil conductor (4d) that is a coil conductor other the coil conductor (4c) on the non-magnetic body section (5).
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: December 4, 2007
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Keiichi Tsuzuki, Tatsuya Mizuno
  • Patent number: 7304558
    Abstract: A toroidal inductor (100) and method of forming same. The invention is intended to decrease the direct current resistance (DCR) of the toroidal inductor circuit. Thus, an increase in the quality factor (Q) of the circuit is produced. The toroidal inductor includes a coil formed from an elongated conductor extending around a core material and defining a plurality of turns. The elongated conductor is comprised of one or more coil segments. The coil segments are arranged in an alternating pattern of a first type segment (101) and a second type segment (102). Each of the coil segments of the first type includes a plurality of elongated parallel conductors (104, 105) spaced apart and electrically connected by conductive links (108) at predetermined intervals along their respective lengths. The coil segments of the second type are formed of a single conductor defined by a conductive via (302, 304) formed in the substrate.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: December 4, 2007
    Assignee: Harris Corporation
    Inventors: Michael D. Pleskach, Bayardo A. Payan, Terry Provo
  • Patent number: 7295096
    Abstract: An inductor of the present invention includes a plurality of insulating layers being stacked and coil patterns respectively provided on predetermined layers of the insulating layers. The coil patterns are provided on at least two of the insulating layers, and electrically connected to each other. With this arrangement, it is possible to improve Q of the inductor without increasing the size of the inductor.
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: November 13, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mitsuru Tamata, Mutsumi Hamaguchi
  • Patent number: 7295094
    Abstract: A low profile magnetic element used in cooperation with a multilayer printed circuit board has two or more core arms penetrating the board from one outer surface to the other and a series of magnetic core elements, at least one on each side of the board, bridging pairs of the core arms to form a closed, unbranched flux path. Series-connected windings form a transformer primary and are wound on the core arms that penetrate the board. Parallel-connected windings form a transformer secondary and are also wound on the core arms. The series-connected windings and the parallel-connected windings may be buried windings printed on internal surfaces of the multilayer board. The connected in series primary windings all have the same number of turns and the parallel-connected secondary windings all have the same number of turns. The parallel secondary windings are connected in current additive fashion to afford a high current transformer output.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: November 13, 2007
    Assignee: DET International Holding Limited
    Inventors: Ionel D. Jitaru, Marco A. Davila
  • Patent number: 7292126
    Abstract: An apparatus and method for reducing common mode noise capacitive coupling from a primary winding to a secondary winding in a transformer. In an embodiment, the primary winding has two terminals and a plurality of coil turns therebetween formed by a plurality of PCB layers sandwiched together, each having at least one of the coil turns formed thereon. The coils turns are connected in a predetermined way to form the primary winding. One terminal of the primary winding is connected to a coil turn on a first one of the PCB layers, and the other terminal is connected to a coil turn on a second one of the PCB layers. The PCB layers are stacked to form the primary winding. The secondary winding or windings are positioned adjacent to a selected one of the stacked PCB layers that is in a position between the first and second PCB layers.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: November 6, 2007
    Assignee: Astec International Limited
    Inventor: Kelvin Wing Chi So
  • Patent number: 7283029
    Abstract: A stressed metal technology may fabricate high-Q, three-dimensional microelectronic inductors and transformers. The fabrication method may allow the production of inductors and transformers on high-resistivity silicon substrate and with metal deposition of Au and Cr that is fully compatible with semiconductor fabrication technologies. The produced inductors and transformers exhibit Q factors>60 at frequencies of 3 to 7 GHz. High efficiency, high-Q transformers with coupling factors 0.6<k<0.9 may be created with very high self-resonance frequencies.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: October 16, 2007
    Assignee: Purdue Research Foundation
    Inventors: Dae-Hee Weon, Saeed Mohammadi, Jong-Hyeok Jeon, Linda P. B. Katehi
  • Patent number: 7283028
    Abstract: Each of first and second coil conductors has a spiral form and is disposed between first and second magnetic substrates. The first and second coil conductors include first parts arranged so as to extend along each other with a predetermined gap therebetween on a first insulating layer, and second parts intersecting each other three-dimensionally. The first and second coil conductors intersect each other in their middle part as seen from a direction orthogonal to the principal face of the first magnetic substrate (second magnetic substrate).
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: October 16, 2007
    Assignee: TDK Corporation
    Inventors: Makoto Yoshida, Tomokazu Ito, Tadashige Konno, Nobuyuki Okuzawa
  • Patent number: 7280025
    Abstract: The magnetic element includes a core (20) provided with a through hole (21) passing through a tubular portion, a linear conductor (30) having a plated surface, which is to be inserted through the through hole (21), and a mounting terminal with its one end side is electrically connected to the conductor and another end side positioning on a bottom surface (22a) of the core (20), the mounting terminal being mounted to an external mounting substrate facing the bottom surface (22a). Further, the conductor (30) is provided integrally with the mounting terminal composed of a downward extension (31) extending from the one end side of the conductor (30) to the bottom surface (22a) side and formed by bending itself and a mounting portion (32) positioning on the bottom surface (22a) and formed by bending itself.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: October 9, 2007
    Assignee: Sumida Corporation
    Inventor: Kan Sano
  • Patent number: 7277002
    Abstract: The present invention relates to transformer inductor devices and to the methods of construction for inductive components such as inductors, chokes, and transformers. Plural via holes 12 are formed through a ferromagnetic substrate 10. Primary 32 and secondary 34 conductors are placed through common vias to form a plurality of cell transformers have a 1:1 turns ratio. Circuits connect these primary and secondary winding in parallel and serial combustion to provide a transformer having the desired turns ratio.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: October 2, 2007
    Assignee: Multi-Fineline Electronix, inc.
    Inventor: Philip A. Harding
  • Patent number: 7262681
    Abstract: In one embodiment, a multi-layer inductor is formed overlying a semiconductor substrate.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: August 28, 2007
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventor: Ryan J. Hurley
  • Patent number: 7257882
    Abstract: Embodiments of the present invention provide a thin-film coil assembly. The coil assembly includes a substrate, at least two layers of conductive material on top of the substrate, and one layer of insulating material between the two layers of conductive material, wherein the two layers of conductive material are in contact with two interconnects, respectively, which extends substantially vertical to the substrate.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: August 21, 2007
    Assignee: International Business Machines Corporation
    Inventors: Alexandra Welzel, Marcus Breuer, Guenther Crolly, Michael Haag, Manfred Jung, Rolf Schaefer
  • Patent number: 7256676
    Abstract: A multi-layer printed circuit board. The multi-layer printed circuit board includes a first winding, and a first via connected to the first winding. The first winding includes a first edge. The first edge defines a first footprint. The first footprint surrounds and is proximate an opening defined by the printed circuit board. At least a portion of the first via is between the first footprint and the opening.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: August 14, 2007
    Assignee: Artesyn Technologies, Inc.
    Inventor: Ian Poynton
  • Patent number: 7253711
    Abstract: A method for making an embedded toroidal inductor (118) includes forming in a ceramic substrate (100) a first plurality of conductive vias (102) radially spaced a first distance from a central axis (101) so as to define an inner circumference. A second plurality of conductive vias (104) is formed radially spaced a second distance about the central axis so as to define an outer circumference. A first plurality of conductive traces (110) forming an electrical connection between substantially adjacent ones of the first and second plurality of conductive vias is formed on a first surface (106) of the ceramic substrate. Further, a second plurality of conductive traces (110) forming an electrical connection between circumferentially offset ones of the first and second plurality of conductive vias is formed on a second surface of the ceramic substrate opposed from the first surface to define a three dimensional toroidal coil.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: August 7, 2007
    Assignee: Harris Corporation
    Inventors: Michael D. Pleskach, Andrew J. Thomson
  • Patent number: 7253713
    Abstract: A common-mode choke coil has first and second coil parts, a first inductance part, and a second inductance part. The first coil part and the second coil part are magnetically coupled to each other. The first inductance part is electrically connected in series to the first coil part and is not substantially magnetically coupled to the first coil part. The second inductance part is electrically connected in series to the second coil part and is not substantially magnetically coupled to the second coil part. The first inductance part and the second inductance part are not substantially magnetically coupled to each other.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: August 7, 2007
    Assignee: TDK Corporation
    Inventors: Toshio Tomonari, Tomokazu Ito, Toshihiro Kuroshima
  • Patent number: 7250704
    Abstract: Certain exemplary embodiments can provide an electrical coil for an electromagnetic machine, said coil comprising: a first electrically conductive winding wound about a central axis in a first spiral, said first winding defining a first winding width and a first winding thickness; a first electrically insulating tape wound about the central axis in a second spiral, said first tape defining a first tape width and a first tape thickness, said first tape located width-wise adjacent said first winding; and a corrosion-resistant shell encasing said first spiral and said second spiral.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: July 31, 2007
    Assignee: Synchrony, Inc.
    Inventors: Christopher K. Sortore, Victor Iannello, Robert Jett Field
  • Patent number: 7248139
    Abstract: A high-current electrical coil includes a plurality of flat, electrically-conductive strips bent to define together a coil in which the electrically-conductive strips are disposed coaxially and extend longitudinally with respect to the longitudinal axis of the coil. Each of the electrically-conductive strips is bent to define at least a part of a turn of the coil. One electrically-conductive strip has an outer end carrying a first connector terminal for the coil and projecting outwardly of the coil; and another electrically-conductive strip has an outer end carrying a second connector terminal for the coil and projecting outwardly of the coil. Each of the electrically-conductive strips includes inner ends in electrical continuity with each other, and intermediate portions electrically-insulated from each other such that the plurality of electrically-conductive strips together define a coil exceeding one turn between the first and second connector terminals.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: July 24, 2007
    Assignee: Nemic-Lambda Ltd.
    Inventors: Ilia Podlisk, George Rucareanu
  • Patent number: 7236080
    Abstract: A high-Q on-chip inductor includes a primary winding and an auxiliary winding. The primary winding includes a first node and a second node. The auxiliary winding is operably coupled to increase a quality factor of the primary winding.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: June 26, 2007
    Assignee: Broadcom Corporation
    Inventors: Sissy Kyriazidou, Harry Contopanagos, Reza Rofougaran
  • Patent number: 7231707
    Abstract: Method of forming a ferromagnetic layer on at least one surface of a dielectric material that may be serve as an inductive core on a printed circuit board or a multichip module. Conductive leads can form two separate coils around the core to form a transformer, and a planar conducing sheet can be placed on or between one or more of the dielectric layers as magnetic shielding. The core can be formed at least in part by electroless plating, and electroplating can be used to add a thicker layer of less conductive ferromagnetic material. Ferromagnetic layers are formed by dipping the dielectric surface in a solution containing catalytic metal particles having a slight dipole, and placing the surface in a metal salt to cause a layer containing metal to be electrolessly plated upon the dielectric. Surface roughening techniques can be used before the dipping to help attract the catalytic particles.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: June 19, 2007
    Assignee: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Ilya E. Popeko, Joseph M. Kulinets
  • Patent number: 7227441
    Abstract: An improved Rogowski coil is formed on a toroidal core made of a thermoplastic or other moldable material, the core having a preferably continuous groove or grooves extending around the core. The grooves correspond in size to magnet wire which registers within the grooves, thus controlling the specific location of the wires. The grooving may be helical. A return loop can be provided for return path cancellation, or a reverse winding can be added in a direction opposite to the direction of advancement of the main coil. In using the return loop, a resistive network can be added to improve the cancellation of the return path due to the effect of geometries. In addition, it can compensate for thermal and other variations.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: June 5, 2007
    Assignee: Schweitzer Engineering Laboratories, Inc.
    Inventors: Veselin Skendzic, James R. Kesler
  • Patent number: 7221251
    Abstract: A low cost, low EMI air core inductor fabricated on printed circuit board for power conversion circuits is described. The inductive element combines the advantages of high efficiency and minimum board height requirements. It allows high frequency switching without adding undesired magnetic losses and minimizing the electro-magnetic interferences in form of radiated energy. The absence of any magnetic layer adds to the simplicity of the manufacturing process resulting in lower cost. This inductive element allows operation for the conventional and higher frequency step-up and step-down switching voltage converters minimizing the size and cost of output capacitors and reducing the output voltage ripple.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: May 22, 2007
    Assignee: Acutechnology Semiconductor
    Inventors: Paolo Menegoli, Carl K. Sawtell
  • Patent number: 7221250
    Abstract: The invention relates to a coil component used as a major component of a common mode choke coil or transformer and a method of manufacturing the same, and the invention is aimed at providing a compact and low-profile coil component having a high common mode filtering property and a method of manufacturing the same. A common mode choke coil has a configuration in which a first insulation film, a first coil conductor, a second insulation film, a second coil conductor and a third insulation film are stacked in the order listed between magnetic substrates provided opposite to each other. A top portion of the first coil conductor is formed in a convex shape. The second insulation film is formed so as to follow the shape of the top portion of the first coil conductor. A bottom portion of the second coil conductor is formed in a concave shape such that it follows the shape of a top portion of the second insulation film.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: May 22, 2007
    Assignee: TDK Corporation
    Inventors: Makoto Yoshida, Nobuyuki Okuzawa, Tomokazu Ito, Yukari Hishimura, Yoshikazu Sato
  • Patent number: 7209022
    Abstract: A surface-mounting choke coil has a resin coating material with magnetic powder which is filled a space between the upper flange and the lower flange of a drum-type ferrite core, while covering the circumferential of the winding. The resin coating material with magnetic powder has a glass transition temperature Tg of about ?20° C. or lower, more preferably about ?50° C. or lower in a course of transferring from a glass state to a rubber state during changing of shear modulus with respect to temperature as a physical property when hardening, and the thickness of the upper flange of the drum-type ferrite core is about 0.35 mm or less, and a value of a ratio L2/L1 of an outer diameter L2 of the upper flange to a diameter L1 of the winding core of the drum-type ferrite core is about 1.9 or more.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: April 24, 2007
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Katsutoshi Kuroiwa, Koichi Iguchi, Tomoo Kashiwa, Masaki Okamoto, Takahiro Samata
  • Patent number: 7205650
    Abstract: In a composite device of the laminate type having a laminate structure of a composite ceramic layer and a dielectric ceramic layer, the composite ceramic layer including a layer portion having the same composition as the dielectric ceramic layer and a plurality of particle portions formed on the surface of the layer portion. The particle portions are made from magnetic ceramic material. This prevents the ceramic layers of the device from cracking and separating when fired.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: April 17, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hideki Yoshikawa, Takashi Umemoto, Hitoshi Hirano
  • Patent number: 7202768
    Abstract: In general, the invention is directed to a tunable inductor that makes use of eddy current effect to tune the inductance of an inductor. The tunable inductor may include a spiral or helical inductor in proximity to one or more sets of eddy current coils. Each eddy current coil may be coupled to a corresponding switch that controls whether the eddy current coil is grounded or floating. In operation, a first time-varying current through the inductor induces a first magnetic field that, in turn, induces a time-varying voltage in an eddy current coil. If the eddy current coil is not grounded, an eddy current flows through the eddy current coil. The eddy current, which flows in the opposite direction of the first time-varying current, induces a second magnetic field. The second magnetic field, which opposes the first magnetic field, reduces the inductance of the tunable inductor.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: April 10, 2007
    Assignee: DSP Group Inc.
    Inventors: Jackson Harvey, Prashant Rawat
  • Patent number: 7199693
    Abstract: The choke coil disclosed comprises: coils incorporated with terminals and intermediate taps manufactured of die cut metal plates; and a magnetic powder in which the coils are embedded.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: April 3, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuya Matsutani, Tsunetsugu Imanishi, Hidenori Uematsu
  • Patent number: 7194799
    Abstract: A high density multi-layer microcoil includes a substrate, a multi-layer coil winding, a magnetic core and a dry film photoresist structure. The multi-layer coil winding and the magnetic core are supported by the dry film photoresist structure. The fabrication process is using photolithography process to form a dry film photoresist structure with a coil tunnel having coil elements perpendicular to the substrate and two outlets at ends of the tunnel; and injecting a conductive material with a low melting point into the tunnel and forming the coil winding.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: March 27, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Morris P. F. Liang, Sway Chuang, Frank K. C. Fan, Chen Chung Kao
  • Patent number: 7176773
    Abstract: A method for producing a high density inductor includes the steps of forming a coil having a spiral shape, sealing the coil in the interior of a core member, and forming a terminal electrode for allowing electric conduction to said coil on the outside of said core member. In this method, the coil is formed by repeating a process of forming a wire layer by means of a thin film forming process and a process of forming an additional wire layer on top of the wire layer by means of the thin film forming process to pile up the wire layers. With this production method, it is possible to form a coil with a high aspect ratio. In addition, the inductor is designed in such a way that the core member envelopes only the coil. With that design, it is possible to make the inductor compact.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: February 13, 2007
    Assignee: TDK Corporation
    Inventor: Shigeru Shoji
  • Patent number: 7171739
    Abstract: A method of manufacturing an on-chip transformer balun includes creating, on a semiconductor substrate, a primary winding having at least one substantially symmetrical primary turn on a first dielectric layer and at least one metal bridge on a second layer. A secondary winding is created on the semiconductor substrate, the secondary winding having at least one substantially symmetrical secondary turn on a third dielectric layer and at least one metal bridge on a fourth dielectric layer. In an alternative embodiment, the primary winding has at least one first primary turn on a first dielectric layer and at least one second primary turn on a second dielectric layer and at least one via that operably connects the first primary turn to the second primary turn. The secondary winding has at least one first secondary turn on a third dielectric layer and at least one second secondary turn on a fourth dielectric layer.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: February 6, 2007
    Assignee: Broadcom Corporation
    Inventors: Hung Yu (David) Yang, Jesse A. Castaneda, Reza Rofougaran
  • Patent number: 7167071
    Abstract: A core material-including organic core board or inorganic sintered board 1 having a plurality of band-shaped conductor patterns 2 formed on its front and rear surfaces is sliced in a direction crossing the band-shaped conductor patterns 2. End portions of the band-shaped conductor patterns 2 exposed on each of cut surfaces of the core board 1 are connected to one another by bridging conductor patterns formed on the cut surfaces. In this manner, at least one helical coil is provided. The inner diameter of the helical coil can be kept constant while coil pitch accuracy can be kept good.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: January 23, 2007
    Assignee: TDK Corporation
    Inventors: Minoru Takaya, Takashi Kajino, Hisashi Kobuke, Masami Sasaki, Kazuhiko Itoh, Toshikazu Endo
  • Patent number: 7167072
    Abstract: An inductor formed on a substrate having a dielectric layer thereon is disclosed. The inductor includes a first inductor pattern, a second inductor pattern a third inductor pattern. The first inductor pattern is formed within the dielectric layer, the second inductor pattern is formed on the first inductor pattern and electrically connected thereto, and the third inductor pattern is formed on the second inductor pattern and electrically connected thereto, wherein the first inductor pattern, the second inductor pattern, and the third inductor pattern have similar pattern. Because the thickness of the inductor can be increased by forming a multi-layer inductor structure, the resistance of the inductor, therefore, is reduced.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: January 23, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Chou Hung, Hua-Chou Tseng, Tsun-Lai Hsu, Cheng-Wen Fan, Chia-Hung Chin, Ellis Lin
  • Patent number: 7167070
    Abstract: A laminated coil is constructed such that an inner space of each via hole can be increased while the spacing between adjacent via holes in the axial direction of a coil is prevented from being narrowed. In the via holes of the laminated coil, through-holes formed in ceramic layers and filled with a conductor are arranged in a row in the lamination direction X, and, in each of the through-holes, the difference between the diameter in the axial direction of the coil on the opening surface of one opening of a ceramic layer and the diameter in the axial direction of the coil on the opening surface of the other opening is smaller than the difference between the diameter in the direction Z that is substantially perpendicular to the axial direction Y of the coil on the opening surface of one opening of the ceramic layer and the diameter in the direction Z that is substantially perpendicular to the axial direction Y of the coil on the opening surface of the other opening.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: January 23, 2007
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hiroshi Tanaka, Takahiro Yamamoto, Hajime Arakawa
  • Patent number: 7164339
    Abstract: An integrated transformer with a stack structure comprises a middle dielectric layer, a bottom dielectric layer, a first winding and a second winding. A portion of the first winding is disposed over a surface of the middle dielectric layer and the remaining portion of the first winding is disposed over a surface of the bottom dielectric layer. A portion of the second winding is disposed over the surface of the middle dielectric layer and the remaining portion of the second winding is disposed over the surface of the bottom dielectric layer. The second winding doesn't intersect with the first winding. The portions of the first and second windings over the surface of the middle dielectric layer connect with the remaining portions of the first and second windings over the surface of the bottom dielectric through via plugs.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: January 16, 2007
    Assignee: Winbond Electronics Corp.
    Inventor: Kai-Yi Huang
  • Patent number: 7158005
    Abstract: A toroidal inductor, including a substrate (100), a toroidal core region (434) defined within the substrate, and a toroidal coil including a first plurality of turns formed about the toroidal core region and a second plurality of turns formed about the toroidal core region. The second plurality of turns can define a cross sectional area (440) greater than a cross sectional area (442) defined by the first plurality of turns. The substrate and the toroidal coil can be formed in a co-firing process to form an integral substrate structure with the toroidal coil at least partially embedded therein. The first and second plurality of turns can be disposed in alternating succession. The toroidal core region can be formed of a substrate material having a permeability greater than at least one other portion of the substrate.
    Type: Grant
    Filed: February 10, 2005
    Date of Patent: January 2, 2007
    Assignee: Harris Corporation
    Inventors: Michael D. Pleskach, Andrew J. Thomson, Bayardo A. Payan, Terry Provo
  • Patent number: 7158004
    Abstract: The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: January 2, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7151430
    Abstract: Method and system are disclosed for reducing mutual EM coupling between VCO resonators and for implementing the same on a single semiconductor chip. The method and system involve using inductors that are substantially symmetrical about their horizontal and/or their vertical axes and providing current to the inductors in a way so that the resulting magnetic field components tend to cancel each other by virtue of the symmetry. In addition, two such inductors may be placed near each other and oriented in a way so that the induced current in the second inductor due to the magnetic field originating from first inductor is significantly reduced. The inductors may be 8-shaped, four-leaf clover-shaped, single-turn, multi-turn, rotated relative to one another, and/or vertically offset relative to one another. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: December 19, 2006
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Thomas Mattsson
  • Patent number: 7145428
    Abstract: A circuit substrate includes an inductor element and a reference plane. The inductor element includes a first conductive column, a second conductive column, a first trace, and a second trace. The first and second conductive columns penetrate the circuit substrate from a first surface to a corresponding second surface. The first conductive includes a left conductive column and a right conductive column. The second conductive column is adjacent to one side of the first conductive column. The first trace electrically connects a first lower portion of the left conductive column and a second lower portion of the second conductive column. The second trace electrically connects a first upper portion of the right conductive column and a second upper portion of the second conductive column. The reference plane is disposed on the second surface. Accordingly, the magnetic line of force produced by the inductor element is parallel to the reference plane.
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: December 5, 2006
    Assignee: Advanced Semiconductor Engineering Inc.
    Inventor: Chi-Tsung Chiu
  • Patent number: 7135951
    Abstract: Integrated circuit inductors may be formed using a spiral layout on the surface of an interconnect dielectric stack. Conductive lines from two or more metal layers in the interconnect stack may be electrically connected using one or more via trenches. The via trench interconnection arrangement reduces the resistance of the inductor and increases the inductor's Q-factor. The Q-factor of the inductor may also be increased by placing a region of n-type and p-type wells or a metal plate region beneath the inductor to reduce power losses during operation. Shallow trench isolation may be used to reduce eddy currents and increase Q. The effects of copper dishing and trench blow-out may be used during inductor fabrication. A dual damascene fabrication process may be used.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: November 14, 2006
    Assignee: Altera Corporation
    Inventors: Lakhbeer S. Sidhu, Irfan Rahim