Using Weighted Impedances Patents (Class 341/153)
  • Patent number: 4843393
    Abstract: A D/A converter includes a first stage capacitor ladder, a second stage capacitor ladder, a coupling capacitor, (l+m) switches, and a short-circuiting switch. The first stage capacitor ladder includes l capacitors having one side electrodes commonly connected to a first point and capacitances binary-increased from 2.sup.0.C to 2.sup.l-1.C (l is a natural number and C is a unit capacitance). The second stage capacitor ladder includes m capacitors having one side electrodes commonly connected to a second point and capacitances binary-increased from 2.sup.0.C to 2.sup.m-1.C (m is a natural number). The coupling capacitor has a capacitance of 1.C and is connected between the first and second points. The (l+m) switches selectively connects another side electrodes of the (l+m) capacitors to a first or second reference voltage in response to an (l+m)-bit digital input signal. The short-circuiting switch is connected between the first reference voltage and the first point of the first stage capacitor ladder.
    Type: Grant
    Filed: August 24, 1988
    Date of Patent: June 27, 1989
    Assignee: NEC Corporation
    Inventor: Yoshiaki Kuraishi
  • Patent number: 4816830
    Abstract: An apparatus and method for generating or shaping the waveform of electronic signals thereby controlling the high frequency energy content of transitions thereof and in particular for imparting a sine squared shape to synchronizing pulses utilized in television systems is shown.
    Type: Grant
    Filed: September 14, 1987
    Date of Patent: March 28, 1989
    Inventor: James C. Cooper