Substituting Specified Bit Combinations For Other Prescribed Bit Combinations Patents (Class 341/55)
  • Patent number: 10289600
    Abstract: A method for error detection in transmissions on a multi-wire interface includes providing a plurality of launch clock signals, including launch clock signals having a different phase shifts, determining a type of transition in signaling state that will occur on each wire of the 3-wire interface at a boundary between two consecutively transmitted symbols, and selecting one of the plurality of launch clock signals to initiate the transition of signaling state on each wire of the 3-phase interface. Selecting one of the plurality of launch clock signals may include selecting a first launch clock signal when the transition in signaling state terminates at an undriven state, and selecting a second launch clock signal when the transition in signaling state begins at an undriven state. An edge in the first launch clock signal may occur before a corresponding edge in the second launch clock signal.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: May 14, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Dhaval Sejpal, Shih-Wei Chou, Chulkyu Lee, Ohjoon Kwon, George Alan Wiley
  • Patent number: 10270464
    Abstract: An apparatus and method for performing efficient lossless compression.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: April 23, 2019
    Assignee: Intel Corporation
    Inventors: James Guilford, Kirk Yap, Vinodh Gopal, Daniel Cutter, Wajdi Feghali
  • Patent number: 10242203
    Abstract: A computer implement format preservation based masking system and method is provided. The system obtains a first set of letters and a private key, and encrypts the first set of letters to obtain an encrypted letters list using the first set and private key. The encrypted letters list comprises a set of encrypted letters. A dynamic map is generated based on the encrypted letters, which includes one or more keys, each key being specific to a letter in the first set letters. A position of each of maskable letters in a second set of letters is calculated using the dynamic map, and performs masking of the maskable letters based on the position of each of the maskable letters to obtain masked data using the dynamic map.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: March 26, 2019
    Assignee: Tata Consultancy Services Limited
    Inventors: Nisha Ravindra Shetty, Ashim Roy, Rahul Krushna Ghodeswar, Ashvini Sakharam Mandpe
  • Patent number: 10229688
    Abstract: A data compression/decompression apparatus, for example, acquires sampling data obtained by sampling an audio signal with a predetermined period, and converts the sampling data into frequency domain data. The data compression/decompression apparatus divides a data sequence of the converted frequency domain data into a plurality of blocks such that the number of pieces of data included in each block is variable, and compresses each block.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: March 12, 2019
    Assignee: NINTENDO CO., LTD.
    Inventor: Tomokazu Abe
  • Patent number: 10187264
    Abstract: The present disclosure relates to gateway path variable detection for metric collection. In some embodiments, a gateway receives a plurality of requests from one or more clients, wherein each request of the plurality of requests is directed to a service and comprises a path. In some embodiments, the gateway separates the path of each request into one or more sub-paths and inserts nodes representing each sub-path into a tree hierarchically based on the path, excluding redundant nodes. If a node has a parent node in the tree, in some embodiments, the gateway determines whether a number of child nodes of the parent node exceeds a variance threshold and, if so, identifies the sub-path as a variable and collapses all nodes at the same level into one node representing the variable, inserting child nodes of collapsed nodes as child nodes of the one node, and removing redundant child nodes.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: January 22, 2019
    Assignee: Intuit Inc.
    Inventors: Jason Webb, Shashi Shilarnav
  • Patent number: 10181885
    Abstract: The present invention relates to a method for transmitting, by a base station, a downlink signal using a plurality of transmission antennas comprises the steps of: applying a precoding matrix indicated by the PMI, received from a terminal, in a codebook to a plurality of layers, and transmitting the precoded signal to the terminal through a plurality of transmission antennas. Among precoding matrices included in the codebook, a precoding matrix for even number transmission layers can be a 2×2 matrix containing four matrices (W1s), the matrix (W1) having rows of a number of transmission antennas and columns of half the number of transmission layers, the first and second columns of the first row in the 2×2 matrix being multiplied by 1, the first column of the second row being multiplied by coefficient “a” of a phase, and the first column of the second row being multiplied by “?a”.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: January 15, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Hyun Soo Ko, Jae Hoon Chung, Seung Hee Han, Moon Il Lee
  • Patent number: 10177827
    Abstract: The embodiment of the disclosure discloses a base station, a mobile station and a method thereof. The base station includes a processor and a transceiver. The processor determines a first subgroup to which a first mobile station belongs, wherein the first mobile station is one of a plurality of mobile stations, the plurality of mobile stations are grouped into G groups based on spatial correlation, the mobile stations in each of the G groups are further grouped into S subgroups based on polarization, the mobile stations in a same subgroup have a same polarization and the mobile stations in different subgroups have different polarizations. The transceiver communicates with the first mobile station according to the polarization of the first subgroup. The embodiments of the disclosure utilize polarization jointly with the spatial correlation in dual structured procoding so that feedback overhead can be reduced.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: January 8, 2019
    Assignee: Huawei Technologies Co., Ltd
    Inventors: JaeHyun Park, Bruno Clerckx, Kunpeng Liu
  • Patent number: 10120362
    Abstract: An output adjustment device of an analog output module may include: a microprocessor unit (MPU) performing an arithmetic operation on a digital signal, an analog output module including an analog signal output unit receiving a signal output from the MPU to output an analog signal, and an output signal adjustment unit outputting a control signal for controlling a magnitude or amplitude of the output analog signal to the MPU.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: November 6, 2018
    Assignee: LSIS CO., LTD.
    Inventor: Jae-il Kwon
  • Patent number: 10069512
    Abstract: Detailed herein are embodiments of systems, methods, and apparatuses for decompression using hardware and software. For example, in embodiment a hardware apparatus comprises an input buffer to store incoming data from a compressed stream, a selector to select at least one byte stored in the input buffer, a decoder to decode the selected at least one byte and determine if the decoded at least one byte is a literal or a symbol, an overlap condition, a size of a record from the decoded stream, a length value of the data to be retrieved from the decoded stream, and an offset value for the decoded data, and a token format converter to convert the decoded data and data from source and destination offset base registers into a fixed-length token.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: September 4, 2018
    Assignee: Intel Corporation
    Inventors: Vinodh Gopal, James D. Guilford, Kirk S. Yap, Sean M. Gulley, Gilbert M. Wolrich
  • Patent number: 10001948
    Abstract: A buffer circuit (403) includes a primary interface (404), a secondary interface (405), and an encoder/decoder circuit (407A, 407B). The primary interface is configured to communicate on an n-bit channel, wherein n parallel bits on the n-bit channel are coded using data bit inversion (DBI). The secondary interface is configured to communicate with a plurality of integrated circuit devices on a plurality of m-bit channels, each m-bit channel transmitting m parallel bits without using DBI. And the encoder/decoder circuit is configured to translate data words between the n-bit channel of the primary interface and the plurality of m-bit channels of the secondary interface.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: June 19, 2018
    Assignee: Rambus Inc.
    Inventor: Scott C. Best
  • Patent number: 9887754
    Abstract: A method, an apparatus, and a computer program product for wireless communication are provided in which a first pre-coding matrix for use on a portion of a set of resource blocks (RBs) is determined. At least one beamforming vector of the set of beamforming vectors is modified by applying a phase rotation to generate a modified pre-coding matrix. The modified pre-coding matrix is applied to one or more demodulation reference signals and data associated with the portion of the set of RBs for transmission using at least one antenna.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: February 6, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Kapil Bhattad, Peter Gaal
  • Patent number: 9806779
    Abstract: The present invention relates to a method for transmitting, by a base station, a downlink signal using a plurality of transmission antennas comprises the steps of: applying a precoding matrix indicated by the PMI, received from a terminal, in a codebook to a plurality of layers, and transmitting the precoded signal to the terminal through a plurality of transmission antennas. Among precoding matrices included in the codebook, a precoding matrix for even number transmission layers can be a 2×2 matrix containing four matrices (W1s), the matrix (W1) having rows of a number of transmission antennas and columns of half the number of transmission layers, the first and second columns of the first row in the 2×2 matrix being multiplied by 1, the first column of the second row being multiplied by coefficient “a” of a phase, and the first column of the second row being multiplied by “?a”.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: October 31, 2017
    Assignee: LG ELECTRONICS INC.
    Inventors: Hyun Soo Ko, Jae Hoon Chung, Seung Hee Han, Moon Il Lee
  • Patent number: 9727255
    Abstract: A storage apparatus includes a semiconductor storage device, and a storage controller coupled to the semiconductor storage device, and which stores data to a logical storage area provided by the semiconductor storage device. The semiconductor storage device includes one or more non-volatile semiconductor storage media, and a medium controller coupled to the semiconductor storage media. The medium controller compresses data stored in the logical storage area, and stores the compressed data in the semiconductor storage medium. The size of a logical address space of the logical storage area is larger than a total of the sizes of physical address spaces of the semiconductor storage media.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: August 8, 2017
    Assignee: Hitachi, Ltd.
    Inventor: Takaki Matsushita
  • Patent number: 9727309
    Abstract: An encoding apparatus detects a bit repeating portion in a mantissa part bit string. The mantissa part bit string is a part of a bit string of a floating point number and corresponds to a mantissa of the floating point number. The floating point number has a sign, an exponent, and the mantissa. The bit repeating portion includes repetitions of a particular bit pattern up to a tail of the mantissa part bit string. The encoding apparatus encodes the bit string of the floating point number into a converted bit string with a first part bit string and a second part bit string. The first part bit string includes a sign part bit string, an exponent part bit string, and a part of the mantissa part bit string that exclude a bit string portion after a secondary repetition of the particular bit pattern. The second part bit string specifies the particular bit pattern in the first part bit string.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: August 8, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Takaki Ozawa, Masahiro Kataoka
  • Patent number: 9720666
    Abstract: The disclosed embodiments provide a system for densely storing strings within the memory of a software program. During operation, the system receives a set of characters to be stored in a string, wherein each character is encoded using a multi-byte public encoding. The system then stores the set of characters in the string at least in part by performing the following steps. The system determines whether every character of the set can be encoded using a first private encoding that consumes less space per character than the multi-byte public encoding. Responsive to determining that every character of the set can be encoded using the first private encoding, the system stores a particular value associated with the first private encoding in a particular field of the string. The system then stores the set of characters in the string in the first private encoding.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: August 1, 2017
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Charles J. Hunt, Aleksey Shipilev, Brent A. Christian, Xueming Shen, Roger Stephen Riggs, Vladimir Kozlov
  • Patent number: 9633093
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a fixed field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: April 25, 2017
    Assignee: IP Reservoir, LLC
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Patent number: 9614544
    Abstract: Detailed herein are embodiments of systems, methods, and apparatuses for decompression using hardware and software. For example, in embodiment a hardware apparatus comprises an input buffer to store incoming data from a compressed stream, a selector to select at least one byte stored in the input buffer, a decoder to decode the selected at least one byte and determine if the decoded at least one byte is a literal or a symbol, an overlap condition, a size of a record from the decoded stream, a length value of the data to be retrieved from the decoded stream, and an offset value for the decoded data, and a token format converter to convert the decoded data and data from source and destination offset base registers into a fixed-length token.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: April 4, 2017
    Assignee: Intel Corporation
    Inventors: Vinodh Gopal, James D. Guilford, Kirk S. Yap, Sean M. Gulley, Gilbert M. Wolrich
  • Patent number: 9563635
    Abstract: Embodiments of the present invention disclose a method, computer program product, and system for recognizing patterns in log files with unknown grammar. A computer replaces one or more alphanumeric strings with a first alphanumeric character to generate a first resulting string. The computer then replaces one or more identical pairs of characters of the first resulting string with a second alphanumeric character to generate a second resulting string. The computer then replaces one or more consecutive instances of the second alphanumeric character, in the second resulting string, with one instance of the second alphanumeric character to generate a compressed string.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: February 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Fiona M. Crowther, Geza Geleji, Martin A. Ross
  • Patent number: 9455742
    Abstract: An output sequence of data elements is processed. The output sequence of data elements represents a sequence of input data elements in a compressed format. An output data element includes a backward reference for each string in the input data elements that occurs again in an input data element that is used to produce the output data element. A backward reference identified in a selected output data element is used for selecting the string to which it refers in the stored input data elements. The selected string is combined with strings of one or more subsequent output data elements. A matching sequence in the stored input data elements matching at least part of one or more combined strings is found. A combined string of the one or more combined strings having the longest matching sequence is selected. The backward reference is redefined to indicate the longest matching sequence.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: September 27, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Fuchs, Christian Jacobi, Anthony T. Sofia, Joerg-Stephan Vogt
  • Patent number: 9419646
    Abstract: Concurrently writing an uncompressed data element, if the uncompressed data element comprises an indication that it is valid, in a main hash table using a first address generated by a first hash function, and reading a first data element from the main hash table using the first address. Introducing a first pipeline delay for maintaining the uncompressed data element in a first data path until the first data element is read. Concurrently writing the first data element to a victim hash table, if the first data element comprises an indication that it is valid, using a second address generated by a second hash function, and reading a second data element from the victim hash table using a third address generated by the second hash function. Introducing a second pipeline delay for maintaining the uncompressed data element in the first data path until the second data element is read.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: August 16, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Fuchs, Christian Jacobi, Reiner Rieke, Joerg-Stephan Vogt
  • Patent number: 9348690
    Abstract: An apparatus has a shared fuse array and a plurality of x86-compatible microprocessors disposed on a die. The shared fuse array has a plurality of semiconductor fuses programmed with compressed configuration data and error checking and correction (ECC) codes accessible by a plurality of x86-compatible microprocessors and another plurality of semiconductor fuses programmed with uncompressed system hardware configuration data that is employed to initialize control circuit elements within the plurality of x86-compatible microprocessors. The plurality of microprocessor cores is disposed on the die, where each of the plurality of microprocessors is coupled to the shared fuse array and is configured to access all of the compressed configuration data during power-up/reset, for initialization of elements within the each of the plurality of microprocessors.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: May 24, 2016
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: G. Glenn Henry, Dinesh K. Jain
  • Patent number: 9298850
    Abstract: A computer-implemented process, computer program product, and apparatus for computing excluded data. A web page of interest is identified to form an identified page. The identified page is loaded a first time to form a first load, and responsive to a determination that a delta has not been computed for the identified web page, the identified page is loaded a second time to form a second load. Whether portions of the first load differ from portions of the second load is determined. Responsive to a determination portions of the first load differ from portions of the second load, the portions that differ to form a delta are identified. The delta is stored to form stored delta and the stored delta is excluded from a document object model associated with the identified page to form a modified document object model.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: March 29, 2016
    Assignee: International Business Machines Corporation
    Inventors: Kamara Akili Benjamin, Guy-Vincent Jourdan, Iosif Viorel Onut, Gregor von Bochmann
  • Patent number: 9262988
    Abstract: A device for communications over a multimedia communication interface. The device can be a source device including a scrambling circuit that receives control data associated with multimedia data to be transmitted over the multimedia channel of the multimedia communication interface, and generates scrambled control codes based on the control data. An encoding circuit generates transition minimized control codes based on the scrambled control codes. The device transmits the transition minimized control codes to a sink device via the multimedia channel. The sink device may also decode and de-scramble the transition minimized control codes received from the source device via the multimedia channel.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: February 16, 2016
    Assignee: Lattice Semiconductor Corporation
    Inventors: Hoon Choi, Laurence A. Thompson
  • Patent number: 9262426
    Abstract: It is an objective of the present invention to provide a solution to automatically remove the redundancy among the user's files, and to efficiently use the memory area of the server without placing an unreasonable cost on a service provider and on a user. In order to attain the above objective, a file storage apparatus, which replaces a bit sequence, which matches a bit sequence correlated with a code and managed, with said code, thereby performing compression and storage of a file correlated with the user identification information and inputted, comprising a distribution unit for management cost, which performs distribution of management cost with respect to each user identification information, is provided. Here, the management cost for code and/or bit sequence corresponds to cost necessary for storage or maintenance of the code and/or bit sequence. Examples of the cost include cost for size of required storage area, and cost for required operation of CPU.
    Type: Grant
    Filed: February 14, 2007
    Date of Patent: February 16, 2016
    Inventor: Makoto Goto
  • Patent number: 9246713
    Abstract: Methods and apparatuses are described to determine subsets of vector signaling codes capable of detection by smaller sets of comparators than required to detect the full code. The resulting lower receiver complexity allows systems utilizing such subset codes to be less complex and require less power.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: January 26, 2016
    Assignee: KANDOU LABS, S.A.
    Inventor: Amin Shokrollahi
  • Patent number: 9218355
    Abstract: Systems and methods for transforming a logical data object for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimization and restoring thereof. Transforming the logical data object comprises creating in the storage device a transformed logical data object comprising and one or more allocated storage sections with a predefined size; processing one or more sequentially obtained chunks corresponding to the transforming logical data object, wherein at least one of said processed data chunks comprises transformed data resulting from said processing; sequentially storing the processed data chunks into said storage sections in accordance with an order the chunks received. The method further includes reading a data range from the transformed logical object in response to a read request specifying desired point in time to be read.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: December 22, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chaim Koifman, Nadav Kedem, Avi Zohar
  • Patent number: 9176975
    Abstract: A method and system for transforming a logical data object for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimization and restoring thereof.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: November 3, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chaim Koifman, Nadav Kedem, Avi Zohar
  • Patent number: 9176976
    Abstract: Systems and methods for compressing a raw logical data object (201) for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimizatic in and restoring thereof. Compressing the raw logical data object (201) comprises creating in the storage device a compressed logical data object (203) comprising a header (204) and one or more allocated compressed sections with predefined size (205-1-205-2); compressing one or more sequentially obtained chunks of raw data (202-1-202-6) corresponding to the raw logical data object (201) thus giving rise to the compressed data chunks (207-1-207-6); and sequentially accommodating the processed data chunks into: said compressed sections (205-1-205-2) in accordance with an order said chunks received, wherein said compressed sections serve as atomic elements of compression/decompression operations during input/output transactions on the logical data object.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: November 3, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chaim Koifman, Nadav Kedem, Avi Zohar, Jonathan Amit
  • Patent number: 9135428
    Abstract: A cross system secure logon in a target system by using a first authentication system and a second authentication system. A correct password may be valid on the first authentication system and the second authentication system. An aspect includes receiving an input password, generating a first hash key by using the first authentication system, and/or generating a second hash key by using the second authentication system, wherein each authentication system uses a system unique non-collision free hash algorithm. Further, in one aspect, comparing the first hash key with a first predefined hash key of the correct password stored in the first authentication system, and/or comparing the second hash key with a second predefined hash key of the correct password stored in the second authentication system. Furthermore, granting access to the target system based on at least one of the comparisons.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: September 15, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joachim Rese, Jochen Roehrig
  • Patent number: 9110913
    Abstract: Systems and methods for transforming a logical data object for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimization and restoring thereof. Transforming the logical data object comprises creating in the storage device a transformed logical data object comprising one or more allocated storage sections with a predefined size; transforming one or more sequentially obtained chunks of obtained data corresponding to the transforming logical data object; and sequentially storing the processed data chunks into said storage sections in accordance with a receive order of said chunks, wherein said storage sections serve as atomic elements of transformation/de-transformation operations during input/output transactions on the logical data object.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: August 18, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chaim Koifman, Nadav Kedem, Avi Zohar
  • Patent number: 9104688
    Abstract: Systems and methods for compressing a raw logical data object (201) for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimizatic in and restoring thereof. Compressing the raw logical data object (201) comprises creating in the storage device a compressed logical data object (203) comprising a header (204) and one or more allocated compressed sections with predefined size (205-1-205-2); compressing one or more sequentially obtained chunks of raw data (202-1-202-6) corresponding to the raw logical data object (201) thus giving rise to the compressed data chunks (207-1-207-6); and sequentially accommodating the processed data chunks into: said compressed sections (205-1-205-2) in accordance with an order said chunks received, wherein said compressed sections serve as atomic elements of compression/decompression operations during input/output transactions on the logical data object.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: August 11, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chaim Koifman, Nadav Kedem, Avi Zohar, Jonathan Amit
  • Patent number: 9100031
    Abstract: Disclosed are systems, apparatus, and methods for encoding data transmitted in a data line. In various embodiments, a device may include a first input port operative to receive a first data value. In some embodiments, the device may further include a first memory device operative to look up a second data value based on the first data value, where the second data value is a representation of the first data value encoded according to an encoding scheme that allows clock recovery, and where the memory device is operative to be configured according to a plurality of line encoding schemes. In various embodiments, the device may further include a first output port operative to provide an output signal, where the output signal comprises one or more data values including the second data value.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: August 4, 2015
    Assignee: Altera Corporation
    Inventors: Gregg William Baeckler, David W. Mendel
  • Patent number: 9035807
    Abstract: A particular implementation receives geometry data of a 3D mesh, and represents the geometry data with an octree. The particular implementation partitions the octree into three parts, wherein the symbols corresponding to the middle part of the octree are hierarchical entropy encoded. To partition the octree into three parts, different thresholds are used. Depending on whether a symbol associated with a node is an S1 symbol, the child node of the node is included in the middle part or the upper part of the octree. In hierarchical entropy encoding, a non-S1 symbol is first encoded as a pre-determined symbol ‘X’ using symbol set S2={S1, ‘X’} and the non-S1 symbol itself is then encoded using symbol set S0 (S2?S0), and an S1 symbol is encoded using symbol set S2. Another implementation defines corresponding hierarchical entropy decoding. A further implementation reconstructs the octree and restores the geometry data of a 3D mesh from the octree representation.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: May 19, 2015
    Assignee: Thomson Licensing
    Inventors: Wenfei Jiang, Kangying Cai, Ping Hu
  • Publication number: 20150116136
    Abstract: One embodiment of the present invention is a method for increasing the speed of a computer in identifying occurrences of strings in a character stream that match a string pattern involving repetitions of characters of a particular character class. The method uses a parallel bit stream processing module of the computer, which processing module includes a processor equipped with parallel processing instructions, to form a plurality of parallel property bit streams Pj.
    Type: Application
    Filed: January 7, 2015
    Publication date: April 30, 2015
    Inventor: Robert D. Cameron
  • Patent number: 8988256
    Abstract: A coding method, a decoding method, a coder, and a decoder are disclosed herein. A coding method includes: obtaining the pulse distribution, on a track, of the pulses to be encoded on the track; determining a distribution identifier for identifying the pulse distribution according to the pulse distribution; and generating a coding index that includes the distribution identifier. A decoding method includes: receiving a coding index; obtaining a distribution identifier from the coding index, wherein the distribution identifier is configured to identify the pulse distribution, on a track, of the pulses to be encoded on the track; determining the pulse distribution, on a track, of all the pulses to be encoded on the track according to the distribution identifier; and reconstructing the pulse order on the track according to the pulse distribution.
    Type: Grant
    Filed: September 18, 2012
    Date of Patent: March 24, 2015
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Fuwei Ma, Dejun Zhang
  • Patent number: 8981970
    Abstract: A binary allocation in a hierarchical coding/decoding comprising a coding/decoding of a digital signal enhancement layer. The signal comprises a succession of L samples, each sample being represented by a mantissa and an exponent. The method comprises the allocation of a predetermined number Nb of enhancement bits to a part at least of the L samples of highest exponent values. In particular, the method comprises the steps: a) enumerating the exponents of the L samples each having a given value, b) calculating at least one aggregate of enumerations of exponents by decreasing values of exponent until the predetermined number Nb is approximated from above, for c) determining a threshold value of largest exponent iexp0 of sample for which no more enhancement bit is available, and allocating the Nb enhancement bits, according to chosen rules, to the samples whose exponent is greater than the aforesaid threshold value iexpo.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: March 17, 2015
    Assignee: Orange
    Inventor: Claude Lamblin
  • Patent number: 8952834
    Abstract: Methods and circuits are described for creating low-weight codes, encoding of data as low-weight codes for communication or storage, and efficient decoding of low-weight codes to recover the original data. Low-weight code words are larger than the data values they encode, and contain a significant preponderance of a single value, such as zero bits. The resulting encoded data may be transmitted with significantly lower power and/or interference.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: February 10, 2015
    Assignee: Kandou Labs, S.A.
    Inventor: Harm Cronie
  • Patent number: 8933827
    Abstract: A data processing apparatus that is capable of reducing the garbling of characters caused by the difference among the character codes when setting data are transferred to another apparatus by the import-export function. A storage unit stores setting data for the data processing apparatus. A receiving unit receives an instruction for exporting the setting data stored in the storage unit. A converting unit converts Unicode data included in the setting data into character code data of language, which is set to the data processing apparatus. An export unit exports the character code data converted by the converting unit and the Unicode data.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: January 13, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Noritsugu Okayama
  • Patent number: 8922414
    Abstract: A method and apparatus for symbol-space based compression of patterns are provided. The method comprises receiving an input sequence, the input sequence being of a first length and comprising a plurality of symbols; extracting all common patterns within the input sequence, wherein a common pattern includes at least two symbols; generating an output sequence responsive of the extraction of all common patterns, wherein the output sequence has a second length that is shorter than the first length; and storing in a memory the output sequence as a data layer, wherein the output sequence is provided as a new input sequence for a subsequent generation of a data layer.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: December 30, 2014
    Assignee: Cortica, Ltd.
    Inventors: Igal Raichelgauz, Karina Ordinaev, Yehoshua Y. Zeevi
  • Patent number: 8918597
    Abstract: An integrated circuit includes an array of memory cells and a digital flag generator circuit configured to generate a data inversion flag based on whether a number of logical zero bits contained in a data word to be transmitted from the memory cells is greater than a threshold number. The digital flag generator circuit includes a first digital stage including a first plurality of binary logic circuits. Each of the binary logic circuits is configured to receive a subset of the data word.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: December 23, 2014
    Assignee: Infineon Technologies AG
    Inventors: Martin Brox, Ronny Schneider
  • Patent number: 8867753
    Abstract: An apparatus for upmixing a downmix audio signal describing one or more downmix audio channels into an upmixed audio signal describing a plurality of upmixed audio channels includes an upmixer configured to apply temporally variable upmixing parameters to upmix the downmix audio signal in order to obtain the upmixed audio signal. The apparatus also includes a parameter interpolator, wherein the parameter interpolator is configured to obtain one or more temporally interpolated upmix parameters to be used by the upmixer on the basis of a first complex-valued upmix parameter and a subsequent second complex-valued upmix parameter.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: October 21, 2014
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V..
    Inventors: Matthias Neusinger, Julien Robilliard, Johannes Hilpert
  • Patent number: 8854239
    Abstract: A data processing apparatus and a data processing method thereof are provided. The data processing apparatus includes a register and a processor electrically connected to the register. The register is stored with a plurality of data. The plurality of data each includes a first sub-datum and a second sub-datum. The plurality of first sub-data corresponds to a first column and the plurality of second sub-data corresponds to a second column. The processor compresses the first sub-data by a first compression algorithm according to a first characteristic of the plurality of first sub-data and compresses the second sub-data by a second compression algorithm according to a second characteristic of the plurality of second sub-data.
    Type: Grant
    Filed: February 17, 2013
    Date of Patent: October 7, 2014
    Assignee: Institute For Information Industry
    Inventors: Che-Rung Lee, Hao-Ping Kang, Zhi-Hung Chen, Chi-Cheng Chuang, Yu-Sheng Chiu
  • Patent number: 8847797
    Abstract: A system reads a metadata byte in a compressed data fragment. The metadata byte includes information pertaining to a sequence of instruction sets to decode data in the compressed data fragment. The sequence of instruction sets follows the metadata byte and one or more literal data sets corresponding to the sequence of instruction sets follows the sequence of instruction sets. The system determines a location of the one or more literal data sets in the compressed data fragment using the metadata byte prior to reading the sequence of instruction sets. The system determines the lengths of the one or more literal data sets based on the sequence of instruction sets and copies the one or more literal data sets, as a batch job for the sequence of instruction sets, to an in-memory data store based on the location and using the lengths.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: September 30, 2014
    Assignee: Google Inc.
    Inventor: David Michael Barr
  • Patent number: 8843456
    Abstract: Embodiments relate to table compression in a database. The database is organized in tables including rows and columns An aspect includes defining a range partition of a table of the database according to a first attribute of the table. Internal ranges of the table of the database are defined according to a second attribute of the table. A target internal range of the internal ranges is determined to insert a row as a new entry into the table. A determination is made as to whether an internal range compression directory exists for the target internal range. Based on determining that no internal range compression directory exists for the target internal range and a predefined threshold value of a number of rows is exceeded in the target internal range, the internal range compression directory for the target internal range is created.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: September 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Andreas Christian, Joern Klauke, Sergiy Malikov, Jens Seifert
  • Patent number: 8831959
    Abstract: Methods and devices for efficient encoding/decoding of a time segment of an audio signal. Methods comprise deriving an indicator, z, of the position in a frequency scale of a residual vector associated with the time segment of the audio signal, and deriving a measure, ?, related to the amount of structure of the residual vector. The methods further comprise determining whether a predefined criterion involving the measure ?, the indicator z and a predefined threshold ?, is fulfilled, which corresponds to estimating whether a change of sign of at least some of the non-zero coefficients of the residual vector would be audible after reconstruction of the audio signal time segment. The amplitude of the coefficients of the residual vector is encoded, and the signs of the coefficients of the residual vector are encoded only when it is determined that the criterion is fulfilled, and thus that a change of sign would be audible.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: September 9, 2014
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventors: Volodya Grancharov, Sigurdur Sverrisson
  • Patent number: 8774263
    Abstract: A transmitter (TX) for transmitting a pulse density modulated signal comprises means (SDM) for generating a pulse density modulated input signal (SI) and an encoder (ENC). The encoder (ENC) comprises a first input for receiving the pulse density modulated input signal (SI) and a second input for receiving additional information (AI) comprising at least one data bit. The encoder (ENC) is configured to generate a multi-bit telegram (TG) on the basis of the additional information (AI), the telegram (TG) comprising a predefined bit-sequence, and to replace an appropriate number of consecutive bits of the input signal (SI) with the telegram (TG) in order to generate an output signal (SO).
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: July 8, 2014
    Assignee: ams AGe
    Inventors: Richard Forsyth, Thomas Fröhlich, Matthias Steiner
  • Publication number: 20140184430
    Abstract: A particular implementation receives geometry data of a 3D mesh, and represents the geometry data with an octree. The particular implementation partitions the octree into three parts, wherein the symbols corresponding to the middle part of the octree are hierarchical entropy encoded. To partition the octree into three parts, different thresholds are used. Depending on whether a symbol associated with a node is an S1 symbol, the child node of the node is included in the middle part or the upper part of the octree. In hierarchical entropy encoding, a non-S1 symbol is first encoded as a pre-determined symbol ‘X’ using symbol set S2={S1, ‘X’} and the non-S1 symbol itself is then encoded using symbol set S0 (S2?S0), and an S1 symbol is encoded using symbol set S2. Another implementation defines corresponding hierarchical entropy decoding. A further implementation reconstructs the octree and restores the geometry data of a 3D mesh from the octree representation.
    Type: Application
    Filed: August 25, 2011
    Publication date: July 3, 2014
    Applicant: THOMSON LICENSING
    Inventors: Wenfei Jiang, Kangying Cai, Ping Hu
  • Patent number: 8751244
    Abstract: A method and apparatus for low complexity combinatorial coding and decoding of signals is described herein. During operation, an encoder and a decoder will utilize a first function in determining a codeword or vector when the size of the function is small. The encoder and the decoder will also utilize a second function in determining the codeword or vector when the size of the function is large.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: June 10, 2014
    Assignee: Motorola Mobility LLC
    Inventors: Udar Mittal, James P. Ashley
  • Patent number: 8723702
    Abstract: A data transfer method multiplexes a data character having a bit width M (M is a natural number greater than or equal to 3) and a control character having a bit width N (N is a natural number greater than or equal to 1), and adds a control character valid signal indicating whether the control character is valid, in order to generate a symbol code having a bit width M+1 or N+3, whichever is greater, and converts the symbol code from parallel data into serial data to be output to a transmission line.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: May 13, 2014
    Assignee: Fujitsu Limited
    Inventor: Seishi Okada
  • Patent number: RE44923
    Abstract: Methods and apparatus for entropy decoding are disclosed. Compressed input data representing one or more signals is loaded into one or more registers. A first candidate value for a most probable signal case is prepared from the input data. A second candidate value for a least probable signal case is prepared from the input data. A final signal value for the one or more signals is selected from the first and second candidate values and an output bin value is generated based on the final signal value. A processor readable medium having embodied therein processor readable instructions for implementing the method for entropy decoding is also disclosed. In addition, a method of avoiding a branch instruction in an electronic processing algorithm is disclosed.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: June 3, 2014
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Xun Xu