Abstract: A lossless data compression system and method compresses a set of M data words stored in a computer memory. A first table stores data representing last occurrence positions among those of the M data words already processed for all distinct word values. A second table stores for each data word an entry indicating the position, if any, of a most recent prior occurrence of another data word with the same word value. A dictionary index indicates how many distinct data word values have been encountered during processing of M data words.

Abstract: A method and apparatus that allows very fast string searches, wherein a new type of data structure called a Comparing and Prioritizing (CAP) Memory is utilized. The CAP memory allows data stored therein to be string searched at high speeds. That is, the CAP memory provides the ability to sequentially determine one or more locations of strings that exist in its data memory that are identical to a string in an incoming data stream. In a preferred embodiment, the output of the CAP memory is used for data compression.

Abstract: A high-speed out-of-band signalling technique for transferring information such as station status information between stations in a communication network, typically a local-area network, involves sequentially generating a plurality of n-bit sequence segments, where n is at least 3. Each bit is either a first binary value or a second binary value. Each sequence segment is coded with one of a plurality of different n-bit code groups divided into a first code group and a set of second code groups. The n bits in the first code group are all the first binary value--e.g., all "1s". None of the second code groups contain a pair of non-contiguous bits of the second binary value--e.g., none of the second code groups contains two "0s" separated by at least one other bit. The sequence segments are outputted in the order that they were generated to produce a special bit sequence which carries the desired information.

Abstract: A method for compressing and subsequently decompressing digital data communicated in an interactive computer network, the network designed to provide informational and transactional services to a very large population of users. The method features steps for compressing bytes of network data before transmission by substituting variable-length code words obtained from a fixed, look-up table, and, reconstituting the bytes using a fixed, decompression look-up table when the code words are received at the data reception site.

Abstract: A composite dictionary data compression process for use with a computer system comprising the steps of: receiving into the computer system an uncompressed input data string; searching a composite dictionary to detect for a dictionary data string matching the uncompressed input data string, the composite dictionary comprising a fixed dictionary and an adaptive dictionary; and modifying the adaptive dictionary in response to whether a matching dictionary data string is detected.

Abstract: A sensor voltage reading circuit for reading an analog sensor value is provided which can remove electromagnetic wave noise inputted to an input terminal of an A/D conversion circuit. The sensor voltage reading circuit includes a first voltage division circuit and a second voltage division circuit for dividing the output voltage of a potentiometer. An A/D conversion circuit has input terminals connected to the output terminals of the voltage division circuits and a processing unit for reading digital voltages obtained by conversion of the A/D conversion circuit. The processing unit removes from the converted voltages a noise voltage caused by radio waves which mix into the input terminals of the A/D conversion circuit. Accordingly, the reading accuracy of the output voltage of the sensor can be enhanced. In a further embodiment, the sensor voltage reading circuit can suppress power dissipation by the analog sensor to achieve miniaturization of the power source circuit.

Abstract: Data storage space and data access time are significantly decreased by utilizing a tree structure to store data in memory. Only one copy of each data element common to different data units is stored. Each data element is stored in a node that has a next pointer and an alternate pointer. The next pointer points to a list of alternatives for the next sequential element of the data unit. The alternate pointer defines that list of alternatives. Thus, a progression of next pointers and alternate pointers corresponds to a unique data unit. Associated with each data unit is one or more identifiers, which tie the data unit to data units in another trees or to external objects. The last alternate pointer in an alternative list points back to the preceding element of the data unit in order to reconstruct a data unit from the identifier. Nodes in memory that are not currently being used in the tree are linked together to form a list of free nodes.

Abstract: A transmission method for transmitting data containing inhibition code data that cannot be recorded in a digital recording and/or reproducing apparatus. The method includes a step of converting the inhibition code data into special code data and ID code data having redundancy and not containing the inhibition code data, a step of converting the special code data into two special code data and one special code data and a step of directly outputting data other than the inhibition code data and the special code data. The method enables transmission of the totality of coded data inclusive of the inhibition code data that cannot be recorded.

Abstract: In a string of characters on a storage medium in which a normally reserved character can appear in an inappropriate position, the field of characters is examined for a character which is not used in the field. The inappropriate reserved character is replaced by the permissible character. A field in the character string is reserved to permit the permissible character to be translated into the reserved character after the decoding of the character string.

Abstract: A system for compressing bilevel data includes a first cache memory having a plurality of assigned levels of usage, a first usage level assigned to a most recently used data segments and a second level assigned to a plurality of less recently used data segments. A processor determines if a received data segment is found in the cache memory and, if not, it assigns the received data segment to the cache memory's first level in place of a previous data segment stored therein. The previous data segment is assigned to a position in the second level in place of a less recently used data segment. The less recently used data segment that is displaced is chosen by a pseudo-random method. A not-found indication is then transmitted to a receiving station along with the identity of the received data segment. The receiving station contains identical cache structures and updates its caches in response to received code words and data segments.

Abstract: An apparatus and method are disclosed for finding a target string in a history buffer, where the found target string matches a given current string to a maximum practical length. A presorted array of array entries (SP) is defined where each entry uniquely identifies a value and a location of a respective string-start byte pair in the history buffer. The array entries are sorted primarily upon their string-start byte-pair values and secondarily upon their pointed-to locations. A direct lookup table (DLT) is further provided, indexable by each possible string-start byte pair that may appear in the history buffer. The DLT is used to locate a first array entry for a given string-start byte pair. To find a longest matching target string, the first two bytes of the current string are used as an index into the direct lookup table, and the given table entry is then used as an index into the pre-sorted SP array. The corresponding array entry is used as an index to a first target string in the buffer.

Abstract: A method for convening an input data character stream into an encoded data stream in a dictionary-based data compression system, which includes determining possible parsing options of the input data character stream; defining a directed labelled graph having vertices and edges, the graph being related to the possible parsing options; finding the elements of an optimal parsing by determining the shortest path between two given vertices of the graph, the finding of the elements of the optimal parsing including eliminating from the graph edges and vertices which cannot form a part of the shortest path; and encoding the elements of the optimal parsing.

Abstract: In a computer system provided with a plurality of computers handling different types of character code sets, a multiple character code set input/output conversion system according to the present invention converts character code strings based on a character code set used in a text file into internal character code strings based on the internal character code set commonly used by the plurality of computers and in turn converts the internal character code strings into character code strings based on a specific character code set.

Abstract: In a method for recording and/or reproducing digital data, such as digital audio signals recorded simultaneously with video signals, dividing sampling data composed of a plurality of bits into higher order bits and lower order bits, constituting error correction coding blocks by only the higher and lower order bits of the sampling data of a plurality of samples respectively, thereby making it possible to easily realize adaptive error checking in the course of the block-by-block error checking in association with, for example, data criticality.A sync word and a block address are affixed to the error correction coding block constituted in that manner. Since one block address is formed using the address data of two or more blocks, a broader address space can be obtained even when the bit number of the address area of each block is few.

Abstract: The disclosed invention is a digitally configurable sequential logic circuit which produces serial binary data patterns. The circuit is configured by specifying two non-negative integers A and B. For given values of A and B, the circuit produces a serial binary data pattern with the following properties: 1) in every consecutive (A+B) bits of the pattern, there are A ones and B zeros, 2) the ones in the pattern are maximally spread apart from one another, and 3) the zeros in the pattern are maximally spread apart from one another. The patterns so produced are useful in a variety of applications.

Abstract: This invention encodes information (such as the field values of a database record, or the words of a text document) so that the original information may be efficiently searched by a computer. An information object is encoded into a small "signature" or codeword using a method. A base or "leaf" signature S1 34 is computed by a known technique such as hashing. The logical intersection (AND) of each possible combination of pairs of bits of the base signature is computed, and the result is stored as one bit of a longer combinatorial signature CS1 42. The bit-wise logical union (bit-OR) of the combinatorial signatures of a group of records produces a second-level combinatorial signature CS2 52 representing particular field values present among those records. Higher-level combinatorial signatures CS3 60, CS4, etc. are computed similarly.

Abstract: The invention relates to a C block generator for generating the C bits for a plurality of devices using the AES/EBU format. The C block generator preferably comprises an eight switch dip switch for selecting a desired one out of 256 possible C block sequences. The dip switch is connected to the upper eight bits of an EPROM's address input for indicating to the EPROM which sequence has been selected. The lower eight bits of the EPROM's address input are connected to an eight bit binary counter which is reset at the initiation of the transmission of each block. The EPROM uses the count from the counter to indicate which bit will be generated out of the selected sequence. Thus, as the count progresses, the generation of the sequence of C bits progresses in synchronism. The invention allows an operator to easily change the C block by simply opening or closing the appropriate switches on the dip switch.

Abstract: A coding apparatus for coding symbolized information signals includes a coding unit for assigning fixed-length code words to a plurality of information symbol strings consisting of at least one type of a given number of information symbols and coding the information signals on the basis of this assignment, a control information adding unit for adding control information containing information for performing predetermined processing to the code words, and a transmitting/recording unit including at least one of a unit for transmitting and a unit for recording the code words added with the control information.

Abstract: Storage and access of compressed data via separately compressed and stored variable size logical blocks. Portions of an uncompressed data file are compressed until they reach a logical block size which matches a given sector size or block of storage space. Then that compressed logical block (portion of compressed data) is stored into a sector allocated to it and a table is built correlating the range of original compressed data to the sector storing the compressed data. In this way, data is compressed into a block size which matches the characteristics of the particular storage medium used. Thus the present invention efficiently stores compressed data by filling allocated sectors. When it is desired to read a given portion of data within a stored compressed data file, it is first determined where within the original data file the desired portion resided. Then, the table created as part of the compression and storage sequence is used to determine which sector contains the desired data.

Abstract: The present invention provides a method and apparatus for compressing user data and for storing the user data on magnetic tape. The user data is accepted and organized into a plurality of records. The user data is then compressed according to a compression algorithm involving converting at least some of the user data to codewords using a dictionary which is derived from the data. The compressed data is flushed from memory before a new dictionary is created. The user data may be written to magnetic tape after being organized into groups, the groups being independent of the record organization. A codeword indicating the start of a new dictionary is inserted at the beginning of a group and preferably at the beginning of the first record within a group. Records may be further organized into entities. A codeword indicating a flush operation is inserted following each entity and a codeword indicating the start of a new dictionary is inserted at the beginning of the first entity within a group.

Abstract: A method and apparatus for compressing digital data uses data which has been previously compressed as a dictionary of substrings which may be replaced in an input data stream. The method and apparatus uses a hash table to take advantage of principles of locality and probability to solve the maximal matching substring problem inherent in this type of compressing apparatus, most of the time. The hash table consists of first-in, first-out (FIFO) collision chains of fixed, uniform numbers of pointers to substrings of data already compressed which potentially match an input substring. A link list is maintained for linking pointers to corresponding potentially matching strings. A companion decompressing method and apparatus receives compressed data from the compressing apparatus and expand that data back to its original form.

Abstract: In a decode circuit comprising a decoding section for decoding an input signal in response to a controlled clock signal into an intermediate signal having a variable pattern, the decode circuit comprises a clock generator section for generating first through N-th clock signals having first through N-th phases different from one another, respectively, where N represents a positive integer which is not less than two. The first through the N-th clock signals are selectively used as the controlled signal. When the variable pattern of the intermediate signal is identical with a predetermined pattern, a coincidence detecting section supplies the detecting section with a selected one of the first through the N-th clock signals as the controlled clock signal. When the variable pattern of the intermediate signal is identical with the predetermined pattern in the coincidence detecting section, an output section allows the intermediate signal as an output signal to pass therethrough.

Abstract: A differential receiver incorporated into a MAU which receives both Manchester packets and linkpulses according to the IEEE 802.3 10Base-T standard has polarity detection and correction circuit for automatically detecting a reversed polarity for RD input lines. The differential receiver samples incoming pulses for time, amplitude and pulse width qualification and makes a preliminary polarity determination based upon polarity of such qualified pulses. This preliminary polarity allows a linktest state machine to transition to a link.sub.-- pass state, enabling output drivers of the MAU. Additionally, the linkpulse polarity information initially makes a polarity determination for the entire differential receiver which asserts a FIX POLARITY signal. The FIX POLARITY signal controls a correction circuit which internally remedies reversed input lines. Preferably, the correction circuit internally reroutes the signals.

Abstract: A system for data compression and decompression is disclosed. A series of fixed length overlapping segments, called hash strings, are formed from an input data sequence. A retrieved character is the next character in the input data sequence after a particular hash string. A hash function relates a particular hash string to a unique address in a look-up table (LUT). An associated character for the particular hash string is stored in the LUT at the address. When a particular hash string is considered, the content of the LUT address associated with the hash string is checked to determine whether the associated character matches the retrieved character following the hash string. If there is a match, a Boolean TRUE is output; if there is no match, a Boolean FALSE along with the retrieved character is output. Furthermore, if there is no match, then the LUT is updated by replacing the associated character in the LUT with the retrieved character.

Abstract: Being operable as a presentation layer defined by the International Standard ISO 7498, each data communication system comprises (A) a syntax transforming unit and (B) an abstract syntax storing unit besides (a) an application program unit for producing and receiving abstract syntaxes descriptive of data according to the International Standard ISO 8824 and (b) a sending and receiving unit for sending and receiving trasfer syntaxes to and from at least one counterpart system. Before carrying out data transfer, negotiation is had in the known manner to decide a set of abstract syntaxes, which can be used in the data transfer and are herein called negotiated syntaxes and encoded by the transforming unit into primary transfer syntaxes as herein called with these transfer syntaxes accompanied by first information. The application program unit may produce different syntaxes which are the abstract syntaxes other than the negotiated syntaxes.

Abstract: A cooperating data compressor, compressed data format, and data decompressor. The compressor compresses an input data block (HB) to a compressed data block having the format. The decompressor decompresses the compressed data block to restore the original data block. The compressor has a direct lookup table (DLT) of 2.sup.8.times.N entries, each indexable by N bytes at a current HB location and identifying a target HB location. The compressor determines whether a target string at the target HB location matches a current string at the current HB location. If they do not match, the compressor outputs a literal representing a datum at the current location. If they match, the compressor outputs a vector from the current location to the target string. Compression speed is maximized by the direct addressing of the DLT by the current N bytes in the HB.

Abstract: A logic circuit in an integrated circuit implementation of an adaptive data compression algorithm which uses a RAM to store dictionary entries. The logic circuit generates predetermined codewords for single-character strings without accessing the dictionary. The logic circuit also generates single-character strings for corresponding codewords without accessing the dictionary.

Abstract: A method and apparatus for compressing digital data uses data which has been previously compressed as a dictionary of substrings which may be replaced in an input data stream. The method and apparatus uses a hash table to take advantage of principles of locality and probability to solve the maximal matching substring problem inherent in this type of compressing apparatus, most of the time. The hash table consists of first-in, first-out (FIFO) collision chains of fixed, uniform numbers of pointers to substrings of data already compressed which potentially match an input substring. A companion decompressing method and apparatus receives compressed data from the compressing apparatus and expand that data back to its original form.

Abstract: Improved means and methods are provided for transmitting binary data on a communication system, such as E-mail, which restricts the number of acceptable characters that can be transmitted. In a preferred embodiment, the binary data to be transmitted is first subjected to a Welch compression and then converted into base-85 digits for transmission. At the receiving end, the received base-85 digits are converted back into compressed binary and then subjected to Welch decompression to obtain the original binary data.

Abstract: This method is characterized in that the data is encoded in the form of blocks of four bits in five-bit words, three bits (7) of each block being encoded according to the NRZ encoding method and one bit (8), according to the Manchester encoding method.

Abstract: A method and apparatus for encoding data to be transmitted through a RS-422 standard serial interface such that the encoded data approximates one of the Control-L, Control-S wired or Control-S infrared protocols used in some audio and video equipment. Each bit of a data byte to be transmitted to the audio/video equipment is converted into one or more expansion bytes and transmitted at a baud rate such that the encoded bits approximate the shape and size of a bit in the data format of the selected protocol. In the case of Control-L protocol, the receiving port of the RS-422 is coupled directly to the serial interface port of the controlled device while the transmitting port is coupled through a diode to the serial interface port of the controlled device. For Control-S wired protocol, the transmit port of the RS-422 is coupled by an uninterrupted wire to the serial interface port of the controlled device.

Abstract: A method and apparatus for storing an instruction word in a compacted form on a storage media, the instruction word having a plurality of instruction fields, features associating with each instruction word, a mask word having a length in bits at least equal to the number of instruction fields in the instruction word. Each instruction field is associated with a bit of the mask word and accordingly, using the mask word, only non-zero instruction fields need to be stored in memory. The instruction compaction method is advantageously used in a high speed cache miss engine for refilling portions of instruction cache after a cache miss occurs.

Abstract: A method and apparatus for compressing digital data that is represented as a sequence of characters drawn from an alphabet. An input data block is processed into an output data block composed of sections of variable length. Unlike most prior art methods which emphasize the creation of a dictionary comprised of a tree with nodes or a set of strings, the present invention creates its own pointers from the sequence characters previously processed and emphasizes the highest priority on maximizing the data rate-compression factor product. The use of previously input data acting as the dictionary combined with the use of a hashing algorithm to find candidates for string matches and the absence of a traditional string matching table and associated search time allows the compressor to very quickly process the input data block. Therefore, the result is a high data rate-compression factor product achieved due to the absence of any string storage table and matches being tested only against one string.

Abstract: A code conversion system including a table (EIT) for converting an ISO code and an EIA code into an internal code. Characters and numerals which make common use of the ISO code and EIA code are converted into the same internal code, and characters and numerals which do not make common use of the ISO code and EIA code are converted into respective separate internal codes and stored. The code conversion system also includes a first internal code into the EIA code and a second internal code conversion table (ICT) for converting the internal code into the ISO code. At the time of output, one of the ISO code and EIA code is designated as an output code system, the internal code is output upon being the internal code conversion table corresponding to the designated output code system, and undefined codes are not output in the designated output code system.

Abstract: In order that a microprocessor can respond properly to both instruction words and data words that are organized in off-chip memory in accordance with either of two byte order conventions, on-chip circuitry is added which controllably changes the byte order of both the instructions and the data to that of the microprocessor.

Abstract: A digital modulation method for modulating 8-bit digital data into 14-bit digital modulation codes. The number of consecutive identical bits in a series of 14-bit digital modulation codes is restricted to 2-7. The absolute value of DSV at the end of each 14-bit digital modulation code is restricted to 2 or less, and the absolute value of DSV at each bit of any 14-bit digital modulation codes is limited to 7 or less. The direct current component of the 14-bit modulation codes can be effectively reduced.

Abstract: The improved data compression system concurrently processes both strings of repeated characters and textual substitution of input character strings. In this system, the performance of data compression techniques based on textual substitution are improved by the use of a compact representation for identifying instances in which a character in the input data stream is repeated. This is accomplished by nesting a run length encoding system in the textual substitution system. This structure adds the recognition of runs of a repeated character before the processor performs the textual substituted data compression operation. A further performance improvement is obtained by expanding the alphabet of symbols stored in the compressor's dictionary to include both the characters of the input data stream and repeat counts which indicate the repetition of a character.

Abstract: In a method for converting n data input bits to n data output bits, groups of m data input bits from an input data buffer (10) are used as address input for a plurality of identical substitution look-up tables (20 to 27). Each look-up table (20 to 27) has a plurality of groups of m data output bits stored at a plurality of locations in the table. The output bits held at each location within the look-up tables (20 to 27) are dependent on a control word taken from a control word register (11).

Abstract: Apparatus and method for encoding data in an AC coupled bi-polar data transmission system. A stream of binary data is encoded to produce first and second binary code signals for transmission on a pair of transmission lines. Except as provided by the encoding technique, both binary code signals undergo a change of state for each data bit time. The signal on one line undergoes a transition for each bit time except when the data signal is changing from zero to one. The other transmission line undergoes a change of state for each bit time except when the data signal changes from one to zero. Decoding of the transmitted signals is achieved by applying both signals to an exclusive OR gate.

Abstract: Data transmission system for transmitting data on a cable and in two directions between two terminal stations (LTE1/2) and via repeater stations (REP1/2). Each terminal station has a sender/receiver (CODEC) and each repeater station has a receiver/sender (CODEC1/2) for each direction. Each station is able to convert predetermined 5-bit data words and auxiliary information into predetermined 6-bit data words and to extract auxiliary information from these 6-bit words. In the case of cable rupture the receiver for one direction in a repeater station is connected to the receiver for the other direction.

Abstract: An information-transmission system including an encoder for converting n-bit information words (D7, . . . , D0) into transmitted m-bit code words (C10, . . . , C0), and a decoder which reconverts the received code words (C'10, . . . , C'0) into information words (D*7, . . . , D*0) corresponding to the original information words. For a first group the encoder converts a first portion (D7, . . . , D3) into a first portion of a code word, such portion comprising q bits (C10, . . . , C5) thereof; and converts a second portion (D2, . . . , D0) of the information word into a second portion of the code word, such portion comprising s bits (C4, . . . , C0) thereof. For a second group the encoder converts a first portion (D7, . . . , D3) into a second portion comprising q bits (C'5, . . . , C'0) of a code word, and converts a second portion (D2, . . . , D0) of the information word into a first portion comprising s-bits of (C'10, . . . , C'6) such code word.

Abstract: A method of processing digital information prior to recording comprises converting input digital words into code words, each of the same period as the input digital word but containing a greater number of time slots than the number of bit locations in the digital word, providing a plurality of groups of code words and selecting the group from which a code word will be taken in any instance on the basis of the immediately preceding code word. The code words are defined such that there is a minimum spacing of three time slots between transitions and no transition is permitted in the last time slot. Two main groups of code words are provided which each have a transformed version. Apparatus for carrying out the method as described as is apparatus for decoding the encode words in replay.

Abstract: A bit pattern conversion system for converting a sequence of a bit pattern between a central processing unit and a peripheral circuit, including a data bus line connected between the central processing unit and the peripheral circuit, and a conversion circuit provided in the peripheral circuit for converting the sequence of the bit pattern from a most significant bit to a least significant bit, and vice versa, in accordance with a conversion signal.

Abstract: The described circuit arrangement for converting a data signal having a constant bit rate and code words of different length into an output signal consisting of code words of constant length but with a variable bit rate while using a buffer memory comprises a first encoder which recognizes code words of the data signal and converts them into code words of equal length, said code words being written in the buffer memory, read out from this memory by a second encoder and being converted into code words of the output signal. The construction of the first encoder is characterized in that a first EPROM and a comparator are connected to the parallel outputs of a shift register through which the data signal with its bit clock is shifted. The output data of the first EPROM and of the comparator are transferred to an intermediate memory and simultaneously applied to the address inputs of a second EPROM.

Abstract: There is provided a data processing apparatus for encoding or decoding binary data such as a magnetic disk or an optical disk in which a binary data sequence is converted to a binary code sequence which is suitable for a data processes. This data processing apparatus comprises: a code converter for converting the m-bit data in the binary data sequence to the n-bit code corresponding thereto; output means for outputting the n-bit code sequence corresponding to the binary data sequence; and DC-freeing means for restricting the DC component of the code sequence which is outputted from the output means. The code converter has a ROM table to store the data for code conversion and a register for converting the m-bit serial data to the parallel data and can be easily constituted by a programmable array logic.

Abstract: For reducing the redundancy ratio of an entity key set, from very high ratios when encoded into conventional I/O code-words, down to a ratio close to zero, a non-redundant number code representation is employed in an encoder/decoder in lieu of a conventional multiple code-word representation, each member of the number code representing a member of the entity key set. Such a number code encoder/decoder may hold in store and provide access to an entity key set representing a set of 65535 different textual or lexical words, thereby using a 16 bit fixed length number code. Code-words representing such code numbers would require 16 bits of storage each if being held in store, however, such code numbers are produced using two alternative methods, (i) as relative address values of individual storage locations within a string of storage locations, e.g., a string of 8 bit byte locations, or (ii) as marked bit counts within a bit map representing the stored set.

Abstract: An apparatus converting three bits of binary data (B.sub.1, B.sub.2, B.sub.3) into two ternary symbols (T.sub.1, T.sub.2), in which even numbered pars of the ternary symbols (T.sub.1, T.sub.2), where (T1=T2), are replaced by a pair of ternary symbols (T'.sub.1, T'.sub.2) which do not correspond to any of the three bits of binary data (B.sub.1, B.sub.2, B.sub.3). The replacement occurs when the respective symbols in a respective pair of ternary symbols (T.sub.1, T.sub.2) are in the same ternary level; hence, a run-length of the same symbol can be restricted to four or less. Furthermore, the digital sum variation (DSV) is controlled in every synchronous block which is composed by the above-mentioned replaced output, thereby allowing a 3B-2T code which does not contain a DC component to be obtained. Moreover, inversion or noninversion of the synchronous pattern can be easily determined by distinguishing whether control of the DSV is applied or not to the synchronous block.