Abstract: A detection method of a pixel circuit, a driving method of a display panel, a display device and a pixel circuit are provided. The pixel circuit includes a driving transistor, and the detection method includes a writing phase and a reading phase. The writing phase includes: writing a reference data voltage to a gate electrode of the driving transistor, and writing a first detection writing voltage to a first electrode of the driving transistor to turn on the driving transistor; and the reading phase includes: upon the driving transistor being turned off after a first predetermined time after writing the first detection writing voltage, reading a voltage of the first electrode of the driving transistor to obtain a first detection reading voltage for obtaining a threshold voltage of the driving transistor.

Abstract: The present invention provides a protection circuit and related operation control method to enable the PFM circuit when the operating duration of the PFM circuit is not greater than a first threshold, and disables the PFM circuit when a rest duration of the PFM circuit is not greater than a second threshold. The present invention further provides a protection circuit and related operation control method to avoid starting excessive vertical scanning operations within one frame scanning period by masking one of the gate scanning start signal STV, the gate clock signal CKV and the gate discharge signal OEV. The present invention further provides a protection circuit and related operation control method to disable the gate scanning start signal STV when the number of clock cycles is not equal to a target number of clock cycles, which protects the gate driver from overload.

Abstract: A DC-DC converter and method are provided for converting a low voltage DC input to a higher voltage DC output. The DC-DC converter has an oscillator with a first relatively voltage sensitive and relatively low power transistor and a second relatively voltage insensitive and relatively high power transistor, the oscillator producing an AC signal from the low voltage DC input. The inclusion of the voltage sensitive transistor allows the oscillator to turn on at a relatively low voltage. The inclusion of the higher power transistor allows the oscillator to operate at a higher power once it turns on. The DC-DC converter can be used for converting energy harvested from low voltage sources.

Abstract: The present disclosure provides a pixel substrate, a liquid crystal display panel and liquid crystal display device, the pixel substrate includes liquid crystal pixels, TFT, source lines, grid lines, common electrodes, and corresponding storage capacitances, the liquid crystal pixels include a plurality of pixel units, each of the source lines is connected to the source/drain electrode of at least two columns of the pixel units, and the storage capacitance corresponding to one column of the pixel units is larger than the storage capacitance corresponding to any other column of the pixel units. The present disclosure reduces the effect of the feed-through voltage on the display effect while reducing the power consumption.

Abstract: Certain exemplary embodiments relate to entertainment systems that interact with users to provide access to media appropriate to and/or customized for a particular user using the entertainment system, the location at which the entertainment system is being accessed, and/or a predefined event. For example, in certain exemplary embodiments, an entertainment system in a location is configured to provide jukebox-related and entertainment system mediated services that are accessible from within and from the outside of the location, and provide (1) attract or flight media operations, (2) browsing services, and/or (3) search screens appropriate to and/or customized for a particular user using the entertainment system, the location at which the entertainment system is being accessed, and/or a predefined event. Such screens may be provided with a three-dimensional look-and-feel in certain exemplary embodiments.

Abstract: A semiconductor substrate including a data line, a scan line, a capacitance control line, a first transistor, a pixel electrode, a second transistor, a storage capacitor and a third transistor is provided. A first terminal of the first transistor is electrically connected to the data line. A control terminal of the first transistor is electrically connected to the scan line. The pixel electrode is electrically connected to a second terminal of the first transistor. A first terminal of the second transistor is electrically connected to the second terminal of the first transistor. A first terminal of the third transistor is electrically connected to the capacitance control line. A control terminal of the third transistor is electrically connected to the scan line, and a second terminal of the third transistor is electrically connected to a control terminal of the second transistor.

Abstract: An organic light emitting display comprises pixels connected to gate lines, and a gate driving circuit to supply a gate signal to at least one gate line, and having stages connected to each other in a cascading way. A nth (n is a positive integer) stage of the gate driving circuit includes a Q1 node charging unit to charge a Q1 node to a turn-on voltage using first and second clock signals in reverse-phase, and a pull-up transistor to apply the turn-on voltage to an output terminal in response to a Q1 node voltage. The Q1 node charging unit includes a first charging unit to charge the Q1 node voltage to the turn-on voltage using the second clock signal; and a second charging unit to charge a Q2 node, coupled to the Q1 node, using the first clock signal in a section where the Q1 node has the turn-on voltage.

Abstract: Embodiments of the present disclosure provide a pixel circuit, a driving method thereof and a display apparatus. The pixel sub-circuit comprises a resetting sub-circuit is configured to control potentials of a first node and a second node according to inputting signals of a first signal terminal and a second signal terminal; a charging sub-circuit is configured to control a potential of the second node according to an inputting signal of a third signal terminal; a compensating sub-circuit configured to control the potentials of the first node and a third node according to inputting signals of a fourth and a fifth signal terminals and a potential of the second node; an outputting sub-circuit configured to control outputting signals of the first terminal of the light emitting device and a reading terminal according to the inputting signal of a sixth and a seventh signal terminals and a potential of the third node.

Abstract: A discharge circuit, a discharge method, and a display device are disclosed. The discharge circuit includes a switch sub-circuit and a discharge control sub-circuit. The switch sub-circuit is configured to: receive a control signal, in which the control signal is determined by a working state of a display device, output a first voltage signal as a discharge input signal when the control signal has a first polarity, and output a second voltage signal as the discharge input signal when the control signal has a second polarity; and the discharge control sub-circuit is configured to: receive the discharge input signal from the switch sub-circuit; and generate and output a discharge control signal according to the discharge input signal.

Abstract: A display panel includes a pixel structure corresponding to a display area, and a receiver antenna structure disposed on the pixel structure. The receiver antenna structure includes multiple antenna blocks. Each antenna block includes an antenna, and two diodes are connected in parallel to the antenna and disposed in opposite directions. The diodes are connected to two switches provided with two clock pulse signals phase-inversed from each other. For each pixels, the switches alternately turns on and off in consecutive frames, allowing the pixels to be driven in a driving dot inversion driving mode. Further, the scan lines extending and crossing over the antennas may have crossover portions the common electrode, and a width of the crossover portion of each scan line may be adjusted to compensate the loading of the scan line due to crossover areas with the antennas.

Abstract: An AMOLED display device based ELVDD power supply method and power supply apparatus, and a display device are provided. The method includes: acquiring a data signal of each pixel in one frame of image; comparing a gray scale value corresponding to the data signal of each pixel with at least two threshold gray scale values; taking a minimum threshold gray scale value in the threshold gray scale values greater than the gray scale value corresponding to the data signal of each pixel as a target gray scale value of the pixel; and taking a maximum target gray scale value in the target gray scale values of all pixels as a maximum gray scale value of the one frame of image, and driving the one frame of image by an ELVDD corresponding to the maximum gray scale value.

Abstract: An organic light-emitting display device can include an organic light-emitting element; a driving transistor connected in series with the organic light-emitting element, the driving transistor and the organic light-emitting element being between a first driving power supply line for supplying a first driving voltage and a second driving power supply line for supplying a second driving voltage lower than first driving voltage; a first transistor configured to turn on based on an i-th scan signal and supply a data voltage to a first node, where i is a natural number greater than or equal to 2 and less than or equal to N, and N is a number of scan-lines; a capacitor between the first node and a gate electrode of the driving transistor, the capacitor is configured to supply a turn-on signal of the driving transistor to the gate electrode of the driving transistor based on the data voltage; and a second transistor configured to turn on based on a (i?1)-th scan signal and supply a first reference voltage to a secon

Abstract: This application relates to a display panel. The display panel includes: a substrate, active switches are formed on the substrate; pixel units arranged in a matrix manner, where three of the pixel units form a pixel group, coupled to any data line and three scanning lines arranged in order, and the pixel group includes: a first pixel unit, coupled between a first scanning line and the data line; a second pixel unit, coupled between a second scanning line and the data line; and a third pixel unit, coupled between a third scanning line and the data line; and a charge sharing switch, where a control end of the charge sharing switch is connected to the first scanning line, a first end of the charge sharing switch is connected to the second pixel unit, and a second end of the charge sharing switch is connected to the third pixel unit.

Abstract: Provided are a gate driver on array (GOA) circuit, an array substrate, and a display device. The GOA circuit provides a scanning pulse signal to a pixel matrix and includes cascaded GOA units. The GOA unit includes first and second enable input terminals, first and second output terminals, and a first node. The first output terminal of an N?2-level GOA unit is connected to the first enable input terminal of an N-level GOA unit, and the second output terminal of the N?2-level GOA unit is connected to the second enable input terminal of an N?1-level GOA unit, N being greater than 2. The second output terminal outputs a scanning pulse signal to the pixel matrix. The GOA unit further includes a pull-up unit connected to the second enable input terminal and the first node to charge the first node to a first given voltage.

Abstract: A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.

Abstract: An electronic device is provided. The electronic device includes a housing including a front surface and a rear surface, a display, a communication circuit, at least one processor, and a memory. The memory stores instructions which, when executed, cause the at least one processor to receive a signal from outside of the electronic device using the communication circuit, in response to receiving the signal, display a user interface on an elongated region that extends along at least one edge region of the display, and display at least one content corresponding to the signal, while displaying the user interface or after displaying the user interface.

Abstract: A backlight driving circuit includes a backlight driving sub-circuit. The backlight driving sub-circuit includes at least one voltage receiving end; at least two switch sub-circuits and at least two driving ends. The voltage receiving end is connected to first electrodes of at least two light emitting elements. Second electrodes of the at least two light emitting elements are connected to first ends of the at least two switch sub-circuits, respectively. The control end of each switch sub-circuit receives a switch control signal. The second end of each switch sub-circuit is connected to a corresponding driving end. The first end and the second end of the switch sub-circuit are connected or disconnected under the control of the switch control signal.

Abstract: Provided are a compound represented by Formula 1, and an organic electric element comprising a first electrode, a second electrode, and an organic material layer formed between the first electrode and the second electrode, wherein the organic material layer comprised the compound represented by Formula 1, and the driving voltage of an organic electronic device can be lowered, and the luminous efficiency, color purity, and life span can be improved by comprising the compound represented by Formula 1 in the organic material layer.

Abstract: A display device, includes a substrate; first to fourth subpixels sequentially arranged on the substrate; a first power line on a left side of the first subpixel and shared by the first and second subpixels; a sensing line between the second subpixel and the third subpixel and shared by the first to fourth subpixels; a second power line on a right side of the fourth subpixel and shared by the third and fourth subpixels; and a first data line on the left side of the first subpixel, a second data line on a right side of the second subpixel, a third data line on a left side of the third subpixel, and a fourth data line on the right side of the fourth subpixel. The first and second power lines and the sensing line are disposed on a layer different from the first to fourth data lines.

Abstract: An electronic device includes a display and a processor. The processor controls the display to operate in a full display mode to display a full color user interface, detects whether a first predetermined trigger event occurs, controls the display, when the first predetermined trigger event occurs, to switch from the full display mode to a partial display mode, generates a partial interface and displays the partial interface on the display, and switches from an operating mode to a sleep mode after the partial interface is displayed on the display.

Abstract: A liquid crystal display includes a display panel, a data driver, and a scan driver. The display panel includes first and second pixel groups, each of having two pixels. The data driver is connected to the display panel via a plurality of data lines. The scan driver is connected to the display panel via a plurality of scan lines. The first pixel group is connected to one of the data lines. The second pixel group is connected to both the data line to which the first pixel group is connected and a data line adjacent to the data line to which the first pixel group is connected.

Abstract: A display driving device is provided. The display device includes a first data line, a first switch, a first storage unit, and a data output unit. The first switch is electrically connected between the first data line and the data output unit, and the data output unit is further electrically connected to the first storage unit. In a first closing period of the first switch, the data output unit outputs a first data signal to the first data line through the first switch, and the first storage unit stores the first data signal received from the data output unit. After the first closing period and before a second closing period of the first switch, the first storage unit charges the data output unit with the first data signal so that the data output unit and the first data line are at the voltage level.

Abstract: Systems and methods are disclosed for managing power use of a camera and/or camera system. In response to a wakeup trigger, contents of a scene are captured by the camera. Based on a received energy budget for the camera, a scene analysis is performed on the scene, where the contents of the scene are analyzed according to one or more analytics models. Based on the output of the one or more analytics models and the received energy budget for the camera, it is determined whether the camera should continue capturing the contents of the scene or enter a power state lower than a previous power state (e.g., go to sleep).

Abstract: Disclosed herein is a gate driver including a plurality of stages. The nth stage of the plurality of stages includes a first scan signal output unit configured to output the kth clock as a first scan signal through a first scan signal output node when a voltage of a Q-node is at a high state, and an emission control signal output unit configured to output a gate high voltage through an emission control signal output node when a voltage of the first scan signal output node and a voltage of an EQ-node are at the high state by an emission control clock. The emission control signal output unit is electrically connected to the Q-node. The gate driver includes a scan signal output and an emission control signal output, so that GIPs having the same configuration can be disposed on the left and right sides of a display panel.

Abstract: A driving method for an electrowetting panel is provided. The electrowetting panel includes M driving electrodes sequentially arranged along a first direction. The driving method includes providing electrical signals to the M driving electrodes, such that a droplet is acquired from a solution reservoir by the 1st driving electrode, and is driven to move by the M driving electrodes. During a droplet moving period, a pulse width of a driving signal of an mth driving electrode is Wm = ? i = 1 m ? ? W i , a pulse width of a non-driving signal between an ath driving signal and an (a+1)th driving signal of the mth driving electrode is Zma = ? i = m + 1 m + a ? ? W i . M, m, and a are positive integers, 1?m?M, and M?3. The end time of the 1st driving signal of the mth driving electrode and the end time of the mth driving signal of the 1st driving electrode are the same.

Abstract: A pixel includes: an organic light emitting diode; a first transistor for controlling an amount of driving current flowing from a first voltage line connected to a second node to a second voltage line via the organic light emitting diode, corresponding to a voltage of a first node; a second transistor connected between a data line and the second node, the second transistor having a gate electrode connected to a first scan line; a third transistor connected between the first voltage line and a third node, the third transistor having a turn-on period that does not overlap with that of the second transistor; a fourth transistor connected to the third node, the fourth transistor having a gate electrode connected to the first scan line; a first capacitor connected between the first voltage line and the first node; and a second capacitor connected between the data line and the third node.

Abstract: Provided are a pixel circuit and driving method thereof, array substrate and display device. The pixel circuit includes a light-emitting element, a driving sub-circuit, a scanning sub-circuit, and a carrier releasing sub-circuit. The driving sub-circuit is connected to a first electrode of light-emitting element, and the driving sub-circuit is configured to store a driving voltage and control the magnitude of a current passing through light-emitting element according to the driving voltage; the scanning sub-circuit is connected to driving sub-circuit.

Abstract: A method of driving an organic light-emitting diode (OLED) display device can include, during an initialization period, supplying a reference voltage (Vref), via a first amplifier, to a gate electrode of a driving thin film transistor (TFT) connected to an OLED element and charging an initialization voltage in a source electrode of the driving TFT; during a sensing period, supplying the reference voltage (Vref), via the first amplifier, to the gate electrode of the driving TFT, and charging the source electrode of the driving TFT from the initialization voltage to a reference sensing voltage based on the reference voltage (Vref) minus a threshold voltage (Vth) of the driving TFT; and during a sampling period, supplying a data voltage (Vdata), via the first amplifier, to the gate electrode of the driving TFT, sensing the reference sensing voltage, via a third amplifier, and supplying the reference sensing voltage, via a second amplifier, to the source electrode of the driving TFT.

Abstract: In a scan driver including a plurality of stages configured to supply scan signals to scan lines, the scan driver includes: an i?1th stage configured to supply an i?1th scan signal to an i?1th scan line while controlling a node Qi?1 (i is a natural number) in response to a first clock signal, a third clock signal, and a control voltage; an ith stage configured to supply an ith scan signal to an ith scan line while controlling a node Qi in response to a second clock signal, a fourth clock signal, and the control voltage; and a controller connected to the i?1th stage and the ith stage, and configured to supply the control voltage.

Abstract: A display device includes an auto current limiter (ACL) circuit and a luminance control circuit. The ACL circuit acquires a first parameter on the basis of luminance-related data of input image data, and then acquires a second parameter by applying a luminance control parameter from the luminance control circuit to the first parameter. The ACL circuit corrects the input image data by a second correction function acquired from the second parameter.

Abstract: The embodiments of the present disclosure relate to a display device, a test circuit, and a test method thereof. More specifically, a display device may include a silicon substrate having a plurality of gate lines, a plurality of data lines, a plurality of sensing lines, and a pixel array on which a plurality of subpixels are arranged; a test circuit arranged on the silicon substrate, the test circuit configured to select at least one line of the plurality of data lines or the plurality of sensing lines, to convert a signal transmitted through the selected line into a digital signal, and to output test data; and a test pad unit configured to output the test data to a circuit outside the silicon substrate.

Abstract: The present disclosure provides an OLED pixel driving circuit and an OLED display apparatus utilizing the circuit scheme of 3T1C. The normal displaying mode and detecting mode of the pixel driving circuit both include two phases by controlling the conductions of different transistors. And, the pixel driving circuit is capable of implementing corresponding data compensation under the displaying mode according to the detected voltage threshold Vth of the driving TFT and the intrinsic conductivity factor value k of the aged OLED. This is capable of improving the uniformity of display and the illuminating efficiency.

Abstract: A circuit includes a first thin film transistor configured to supply electric current to an organic light-emitting film, and a storage capacitor. The first thin film transistor includes a bottom gate electrode, a channel provided on a layer upper than the bottom gate electrode to overlap with the bottom gate electrode, and a top gate electrode. The storage capacitor includes a storage capacitor electrode made of an impurity semiconductor, the storage capacitor electrode being provided outside an overlap area with the top gate electrode on the same layer as the channel to overlap with the bottom gate electrode with the first gate insulating layer interposed.

Abstract: An organic light emitting display device includes a display panel including pixel groups, each including a plurality of sub-pixels for each of pixel rows. A gate driver is configured to sequentially provide an initialization signal to the pixel rows, to provide a first group gate signal to first pixel groups of the pixel groups, to provide a second group gate signal overlapping at least a part of the first group gate signal to second pixel groups of the pixel groups, to sequentially provide the first group gate signal to the pixel rows, and to sequentially provide the second group gate signal to the pixel rows. An emission control driver is configured to sequentially provide an emission control signal to the pixel rows. A data driver is configured to output a data voltage. A data divider is configured to selectively provide the data voltage to data lines connected to the sub-pixels.

Abstract: An electroluminescence display includes a plurality of pixels; a first power line and a second power line, coupled to each of the plurality of pixels respectively to provide a first voltage and a second voltage; and a switching circuit, configured to switch the first voltage and the second voltage between a high level voltage and a low level voltage, respectively.

Abstract: A stage of a gate driving circuit includes: a first control transistor diode-connected between a first input end of the stage and a first node, biased by a first input signal, and back-biased by a second input signal; a second control transistor including a control end which receives a third input signal, a first end connected to the first node, and a second end connected to a first voltage, and back-biased by a fourth input signal; a first output transistor including a control end connected to the first node, a first end connected to a clock input end of the stage, and a second end connected to a first output end of the stage; and a capacitor connected between the control and second ends of the first output transistor. The second input signal and the fourth input signal have enable levels during different periods.

Abstract: A method of driving a display device includes receiving a reference clock signal and frequency determination data to determine a pixel driving clock frequency and generate a pixel driving clock signal, generating and outputting a gate driving clock signal according to the pixel driving clock frequency, and outputting a driving voltage according to the pixel driving clock frequency. The driving voltage increases as the pixel driving clock frequency increases.

Abstract: Provided are a drive circuit and a display apparatus capable of suppressing the delay of a drive signal. Each of multiple shift registers comprises: an output switching element to which a predetermined clock signal to be input, the output switching element comprising a second controlled terminal is connected to an output node from which a drive signal is output; a first input switching element comprising a first controlled terminal to which a set signal to be input and a second controlled terminal connected to the output switching element; and a control unit for applying a predetermined electric potential to the second controlled terminal of the output switching element, wherein a low-level electric potential of the predetermined clock signal is lower than a low-level electric potential of the drive signal, and the predetermined electric potential is applied to the output switching element when the predetermined clock signal falls.

Abstract: A shift register and driving method therefore, and a display device are provided. The shift register includes: an input circuit; an output circuit; a reset circuit; a pull-down circuit; a pull-down control circuit; and a first noise reduction circuit. The first noise reduction circuit is coupled to a second input terminal of the shift register, a first input terminal, an output terminal and a first supply voltage terminal. The shift register can effectively reduce noise at the output terminal.

Abstract: A thin film transistor and a preparation method thereof are provided. The thin film transistor includes an upper gate electrode, a lower gate electrode, an upper insulating layer, a lower insulating layer, a semiconductor layer, a source electrode and a drain electrode. The lower insulating layer is arranged on the lower gate electrode, the semiconductor layer is arranged on the lower insulating layer, the semiconductor layer is respectively lapped with the source electrode and the drain electrode, the upper insulating layer covers the semiconductor layer, and the upper gate electrode is arranged on the upper insulating layer. In a plane parallel to a conducting channel, there is a first gap between an orthographic projection of the upper gate electrode and an orthographic projection of the source electrode, and there is a second gap between the orthographic projection of the upper gate electrode and an orthographic projection of the drain electrode.

Abstract: The present disclosure provides a shift register unit and a driving method thereof, a gate driving device and a display device. The shift register unit includes an input circuit, an output circuit, a pull-down circuit, a first pull-down control circuit, and a second pull-down control circuit, wherein the second pull-down control circuit is provided with a first pull-down compensation transistor and a second pull-down compensation transistor and connected to a second power supply voltage, to compensate a threshold voltage drift of a second pull-down control transistor in the second pull-down control circuit so as to avoid abnormality of the shift register unit which would be caused by the threshold voltage drift of the second pull-down control transistor driven by a long-time high voltage, thereby ensuring the stability of the shift register unit.

Abstract: Embodiments of the present disclosure disclose a gate driving circuit, a method for driving the same, and a display apparatus. The gate driving circuit includes N stages of cascaded shift registers, N being an integer greater than or equal to 4. In the N stages of shift registers, an output signal terminal of an nth stage of shift register is connected to an input signal terminal of an (n+I/2)th stage of shift register, and a reset signal terminal of the nth stage of shift register is connected to an output signal terminal of an (n+K)th stage of shift register, wherein n is an integer greater than or equal to 1 and less than (N?I/2), K is an integer greater than I/2 and less than I, and I is a number of clock signal lines connected to the gate driving circuit, which is an even number greater than or equal to 4.

Abstract: A liquid crystal display panel (100) includes a plurality of pixels, each of the pixels including a first subpixel and a second subpixel arranged so as to adjoin each other in a column direction. In any given frame period, the plurality of pixels include a plurality of pixel row pairs each associated with two selected pixel rows. In each pixel column, one pixel of each of the plurality of pixel row pairs is connected with a first source bus line (14a) associated with the pixel column, and the other pixel is connected with a second source bus line (14b) associated with the pixel column, and the plurality of pixel row pairs are each simultaneously selected. A plurality of frame periods include a first type frame period and a second type frame period differing in terms of combinations of two pixel rows to be associated with each of the plurality of pixel row pairs.

Abstract: An image display apparatus are disclosed. The image display apparatus includes a display including a first electrode and a second electrode, for wireless power reception, a signal processor disposed apart from the display, and including a third electrode and a fourth electrode, for wireless power transmission, and a first bridge electrode and a second bridge electrode, including one ends apart from the first electrode and the second electrode, facing the first electrode and the second electrode, and the other ends apart from the first bridge electrode and the second bridge electrode, facing the first bridge electrode and the second bridge electrode.

Abstract: Disclosed are a gate driving circuit and a driving method thereof, and a display device using the driving circuit. In the gate driving circuit, a Qn node in a nth-stage circuit is precharged when a Qn?1 node output signal in a previous-stage driving circuit and a Qn+1 node output signal in a next-stage driving circuit are both at high levels, and thus stability of a Gn output end in the nth-stage circuit can be greatly improved. Meanwhile, a first transistor and a second transistor are connected in series, and a third transistor and a fourth transistor are connected in series.

Abstract: A display driving device including: a gate driver configured to provide a first gate selection signal to a first gate line of a display panel to select the first gate line; a source driver configured to provide an image signal corresponding to the first gate line to a source line; an Electrostatic Discharge (ESD) detection circuit configured to receive a power supply voltage, determine whether there is an ESD in the power supply voltage and, when the ESD is detected, generate a first detection signal; and a controller configured to receive the first detection signal to generate a masking signal, wherein the gate driver is configured to receive the masking signal and not provide a second gate selection signal to select a second gate line.

Abstract: Embodiments of the invention are directed to systems, methods, and computer program products for real-time processing of data and dynamic delivery via and interactive interface. In some embodiments, the system is configured to facilitate a communication session between an entity system associated with an entity user and a user device associated with a first user. The system is further configured to perform one or more user activities, in an integrated manner, within a single integrated interface, without requiring the entity user to operate disparate applications and navigate multiple interfaces. Moreover, the system is configured to identify, in real-time, session inputs associated with the communication session to be provided to the first user. The system may also transmit a trigger communication to the entity user via a first peripheral device associated with the entity system, such as an audio head set and a display device.

Abstract: A switched capacitor DC-DC converter, which includes a pulse frequency modulation circuit, a multiplexing pulse-width modulation circuit, and a switched capacitive element, is disclosed. The switched capacitive element is coupled between the pulse frequency modulation circuit and the multiplexing pulse-width modulation circuit. The pulse frequency modulation circuit uses a DC source signal to charge the switched capacitive element. The pulse frequency modulation circuit provides a group of output signals by multiplexing the switched capacitive element and reduces reverse current to the switched capacitive element when updating each of the group of output signals.

Abstract: A pixel driving circuit and a driving method thereof, and a display device. The pixel driving circuit includes a light-emitting driving circuit, a light-emitting component and a gate-source voltage adjustment circuit. A control end, a first end and a second end of the light-emitting driving circuit are electrically connected with a first node, a second node and the light-emitting component respectively; the gate-source voltage adjustment circuit is electrically connected with at least one of the first node and the second node, the gate-source voltage adjustment circuit is also electrically connected with an adjustment voltage terminal, and the gate-source voltage adjustment circuit is configured to adjust at least one of a voltage of the first node and a voltage of the second node, so as to increase a modulus value of a voltage difference between the control end and the first end of the light-emitting driving circuit.

Abstract: An organic light emitting display device includes a plurality of pixels. Each of the pixels includes an organic light emitting diode, first to third transistors, a storage capacitor, and a first capacitor. The second transistor includes a gate electrode receiving a first scan signal, a first electrode receiving a data signal, and a second electrode connected to a first electrode of the first transistor. The third transistor includes a gate electrode receiving a second scan signal, a first electrode connected to a second electrode of the first transistor, and a second electrode connected to a gate electrode of the first transistor. The storage capacitor includes a first electrode receiving a power voltage and a second electrode connected to the gate electrode of the first transistor. The first capacitor includes a first electrode connected to the gate electrode of the third transistor and a second electrode receiving the power voltage.