Graphic Command Processing Patents (Class 345/522)
  • Patent number: 10324748
    Abstract: Apparatuses, methods and storage medium associated with live migration of virtual machines (VMs) from/to host computers with graphics virtualization are disclosed herein. In embodiments, an apparatus may include a virtual machine monitor (VMM) having a memory manager to manage accesses of system memory of the apparatus, including tracking of modified memory pages of the system memory. Additionally, the VMM may include a graphics command parser to analyze graphics commands issued to a graphics processor (GPU) of the apparatus to detect writes to the system memory caused by the graphics commands, and augment the tracking of modified memory pages. Further, the VMM may include a live migration function to live migrate a VM to another apparatus, including provision of current memory content of the VM, utilizing modified memory pages tracked by the memory manager, as augmented by the graphics command parser.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: June 18, 2019
    Assignee: Intel Corporation
    Inventors: Yao Zu Dong, Zhiyuan Lv
  • Patent number: 10324726
    Abstract: Techniques are disclosed relating to scheduling graphics instructions for execution on different types of execution units based on characteristics of decoded and cached graphics instruction. In some embodiments, a graphics unit includes multiple different types of execution units that are configured to execute different types of instructions (e.g., different units for datapath, sample, load/store, etc.). In some embodiments, the graphics unit stores decoded instructions in an instruction cache in at least one cache level, along with information specifying characteristics of the instructions. The characteristics may be stored at clause granularity and may indicate the type of instructions in each clause (e.g., corresponding to which type of execution unit is configured to execute the instructions).
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: June 18, 2019
    Assignee: Apple Inc.
    Inventors: Michael A. Geary, Brian K. Reynolds, Terence M. Potter
  • Patent number: 10319138
    Abstract: An embodiment of graphics apparatus may include a coarse depth tester to perform a coarse depth test on a block of pixels, and a stencil tester to perform a stencil test on the block of pixels. The stencil tester may be further configured to perform the stencil test in parallel with the coarse depth test. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: June 11, 2019
    Assignee: Intel Corporation
    Inventors: Vasanth Ranganathan, Saikat Mandal, Prasoonkumar Surti, Abhishek R. Appu, Andrew S. Downsworth, Vamsee Vardhan Chivukula, Akshay Chada, Karol A. Szerszen, Joydeep Ray, Bryon T. Rogers
  • Patent number: 10310895
    Abstract: A mechanism is described for facilitating memory-based software barriers to emulate hardware barriers at graphics processors in computing devices. A method of embodiments, as described herein, includes facilitating converting thread scheduling at a processor from hardware barriers to software barriers, where the software barriers emulate the hardware barriers.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: June 4, 2019
    Assignee: INTEL CORPORATION
    Inventors: Altug Koker, Joydeep Ray, Balaji Vembu, James A. Valerio, Abhishek R. Appu
  • Patent number: 10296592
    Abstract: Implementations disclose methods and systems for rendering, by a browser, a content item projected on a mesh. A method includes providing, by a browser executing on a user device, an application programming interface (API) to communicate with a web application that includes a user interface to present a content item on the user device; receiving, by the browser from the web application via the API, an instruction to project the content item on a mesh, where the instruction identifies the content item and the mesh; rendering, by the browser and without involvement of the web application, a first frame of the content item projected on the mesh in a first orientation; and causing, by the browser, the rendered first frame to be displayed on the user device.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: May 21, 2019
    Assignee: GOOGLE LLC
    Inventors: Andrew Top, Anjali Wheeler
  • Patent number: 10289393
    Abstract: According to one embodiment of the present disclosure, a computing system is provided, including a graphical processing unit (GPU) and a processor. The processor may be configured to execute a run-time executable cross-compiler to receive a GPU-executed program of a plurality of GPU-executed programs. The processor may be further configured to receive summary data associated with the GPU-executed program. The summary data may include a sequence in which the plurality of GPU-executed programs are configured to be executed. Based at least in part on the GPU-executed program and the summary data, the processor may be further configured to generate a translated GPU-executed program.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: May 14, 2019
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Matthew Gordon, Aaron Blake Stover
  • Patent number: 10282804
    Abstract: A mechanism is described for facilitating configuration of computing engines based on runtime workload measurements at computing devices. A method of embodiments, as described herein, includes detecting a work unit corresponding to a workload, and collecting metrics relating to the work unit, where the metrics to indicate one or more characteristics of the work unit. The method may further include evaluating the one or more characteristics based on one or more configuration parameters relating to computing resources, and generating, based on evaluating of the one or more characteristics, a configuration plan specific to the work unit and applicable to one or more subsequent work units that are similar to the work unit. The method may further include applying and executing the configuration plan at a computing device upon execution of the one or more subsequent work units.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: May 7, 2019
    Assignee: INTEL CORPORATION
    Inventors: Travis T. Schluessler, John G. Gierach
  • Patent number: 10275853
    Abstract: The present disclosure describes techniques related to media caching. A media hub device may include a media hub device configured to execute an operation on a current frame of media having a frame period. The media hub device may include a cache configured to provide, to a media accelerator of the media hub device, data associated with the frame period of the current frame.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: April 30, 2019
    Assignee: Intel Corporation
    Inventors: Ramanathan Sethuraman, Arojit Roychowdhury, Ajaya V. Durg, Rajeev D. Muralidhar
  • Patent number: 10255106
    Abstract: A device for processing data includes a processing unit configured to predict an execution time of a compute kernel on a secondary processing unit and, based on the predicted execution time, make a power management decision for the secondary processing unit.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: April 9, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Navid Farazmand, Eduardus Antonius Metz, David Rigel Garcia Garcia
  • Patent number: 10248751
    Abstract: Methods and apparatuses are described for creating, editing, and viewing a floorplan of a circuit design. Specifically, some embodiments enable a user to perform a graphical operation at an inference point in a circuit design layout, wherein the location of the inference point is determined based on existing graphical objects in the circuit design layout. Some embodiments substantially instantaneously update a congestion indicator in a circuit design layout in response to modifying the circuit design layout. Some embodiments substantially instantaneously update pin locations of a block or partition in response to changing the size or shape of the block or partition. Some embodiments enable a user to view a circuit design layout based on the logical hierarchy, and also based on at least one additional attribute type such as voltage, power, or clock domain.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: April 2, 2019
    Assignee: Synopsys, Inc.
    Inventors: Glenn B. Graham, Ajay Guleria, Jeffrey J. Loescher
  • Patent number: 10242115
    Abstract: The present invention relates to a computer-implemented method for handling a set of data containers of a file structure, which method is performed by one or more processors of a computing device. The method comprises determining a first set of coordinates on a digital boundary for each data container, and storing the first set of coordinates associated with each data container in a memory. Furthermore, each data container is arranged in a parent data container, and each first set of coordinates associated with a data container is representative of a default position of that data container on the digital boundary. The present invention also relates to a computing device and to a computer-readable medium.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: March 26, 2019
    Assignee: ContentMap Aktiebolag
    Inventor: Tomas Hultgren
  • Patent number: 10241766
    Abstract: A computing device for just-in-time cross-compiling compiled binaries of application programs that utilize graphics processing unit (GPU) executed programs configured to be executed on a first GPU having a first application binary interface (ABI) including a second GPU having a second ABI different from the first ABI of the first GPU, and a processor configured to execute an application program that utilizes a plurality of GPU-executed programs configured to be executed for the first ABI of the first GPU, execute a run-time executable cross-compiler configured to, while the application program is being executed, emulate the first ABI using hardware resources of the second GPU by translating between the first ABI and the second ABI, and execute the plurality of GPU-executed programs on the second GPU with the emulated first ABI, and pass output of the plurality of GPU-executed programs for the emulated first ABI through the second ABI.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: March 26, 2019
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Matthew Gordon, Roger John Perkins
  • Patent number: 10226700
    Abstract: A video server is configured to provide streaming video to players of computer games over a computing network. The video server can provided video of different games to different players simultaneously. This is accomplished by rendering several video streams in parallel using a single GPU (Graphics Processing Unit). The output of the GPU is provided to graphics processing pipelines that are each associated with a specific client/player and are dynamically allocated as needed. A client qualifier may be used to assure that only clients capable of presenting the streaming video to a player at a minimum level of quality receive the video stream. Video frames provided by the video server optionally include overlays added to the output of the GPU. These overlays can include voice data received from another game player. These overlays may be used to prevent presentation of non-allowed input controls.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: March 12, 2019
    Assignee: Sony Interactive Entertainment America LLC
    Inventors: Andrew Buchanan Gault, Rui Filipe Andrade Pereira, David Perry, Brian K. F. Lau, Kelvin Michael Yong, Claes Christian Rickeby, Ryan Hamilton Breed, Eleazar T. Galano, III, Austin English
  • Patent number: 10229471
    Abstract: Power management techniques include a graphics processing unit (GPU) in which the GPU determines whether it is operating outside an operational limit and, when the GPU is operating outside the operational limit, the GPU alters performance of an operation to be performed texture processor within the GPU to reduce complexity of the operation. Otherwise, the GPU may perform the texture processing operation at its default complexity. These techniques provide a degree of power control not available in other techniques.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: March 12, 2019
    Assignee: Apple Inc.
    Inventors: Gokhan Avkarogullari, Jason P. Jane, Alex Kan
  • Patent number: 10228750
    Abstract: Systems and methods for reducing the power consumption of an Information Handling System (IHS). In some embodiments, an IHS may be configured to: in response to a request to operate in static display mode: (a) render static content on a display, (b) allow the processor to enter standby by notifying an OS that the display is off while keeping the display on, and (c) maintain the display refreshed with the static content; while in static mode and in response to a command that requires updating the static content, wake up the processor and generate updated static content using the processor; and after generating the updated static content: render the updated static content on the display while the processor is awake, allow the processor to re-enter standby by notifying the OS that the display is off while keeping the display on, and maintain the display refreshed with the updated static content.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: March 12, 2019
    Assignee: Dell Products, L.P.
    Inventors: Isaac Hsu, Adolfo S. Montero
  • Patent number: 10210593
    Abstract: A graphics processing unit (GPU) may dispatch a first set of commands for execution on one or more processing units of the GPU. The GPU may receive notification from a host device indicating that a second set of commands are ready to execute on the GPU. In response, the GPU may issue a first preemption command at a first preemption granularity to the one or more processing units. In response to the GPU failing to preempt execution of the first set of commands within an elapsed time period after issuing the first preemption command, the GPU may issue a second preemption command at a second preemption granularity to the one or more processing units, where the second preemption granularity is finer-grained than the first preemption granularity.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: February 19, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Anirudh Rajendra Acharya, Alexei Vladimirovich Bourd, David Rigel Garcia Garcia, Milind Nilkanth Nemlekar, Vineet Goel
  • Patent number: 10207190
    Abstract: Technologies for web-based game execution include a computing device with a web rendering engine and a native game engine library. The web rendering engine establishes a scripting environment that issues calls to a game engine interface established by the web rendering engine. The scripting environment may be a JavaScript engine. In response to calls to the game engine interface, the game engine interface issues calls to the native game engine library. The native game engine library issues native graphics commands to a graphics bridge of the computing device. The native graphics commands may be OpenGL calls. The graphics bridge translates the native graphics commands to a web graphics context, which renders graphical game content to a web content element of the web rendering engine. The web graphics context may be a WebGL context, and the web content element may be a canvas element. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: February 19, 2019
    Assignee: Intel Corporation
    Inventors: Guangzhen Li, Zhongsong Lin, Chun Gao, Ningxin Hu
  • Patent number: 10210651
    Abstract: A graphics processing system processes primitive fragments using a rendering space which is sub-divided into tiles. The graphics processing system comprises processing engines configured to apply texturing and/or shading to primitive fragments. The graphics processing system also comprises a cache system for storing graphics data for primitive fragments, the cache system including multiple cache subsystems. Each of the cache subsystems is coupled to a respective set of one or more processing engines. The graphics processing system also comprises a tile allocation unit which operates in one or more allocation modes to allocate tiles to processing engines. The allocation mode(s) include a spatial allocation mode in which groups of spatially adjacent tiles are allocated to the processing engines according to a spatial allocation scheme, which ensures that each of the groups of spatially adjacent tiles is allocated to a set of processing engines which are coupled to the same cache subsystem.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: February 19, 2019
    Assignee: Imagination Technologies Limited
    Inventors: Jonathan Redshaw, Yoong Chert Foo
  • Patent number: 10198837
    Abstract: A method of displaying a network graph with a computing system includes accessing data defining a network and including a plurality of vertices and a plurality of edges. If a number of vertices included in the network graph is below a first threshold, the network graph is locally rendering with a scalable vector graphics rendering engine of the computing system. If a number of vertices included in the network graph is between the first threshold and a second, higher, threshold, the network graph is locally rendered with a raster rendering engine of the computing system. If a number of vertices included in the network graph is above the second threshold, a remotely-rendered network graph rendered by a remote rendering engine is received at the computing system. The method further includes displaying the rendered network graph via a web browser of the computing system.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: February 5, 2019
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Moses Yap, Keith Robert Kinnan, Sean Richard Smith, Derrick Yeqiang Quan, Jason Thomas McNamee, Saliha Azzam
  • Patent number: 10176548
    Abstract: A processor includes a scheduler that governs which of a plurality of pending graphics contexts is selected for execution at a graphics pipeline of the processor. The processor also includes a plurality of flip queues storing data ready to be rendered at a display device. The executing graphics context can issue a flip request to change data at stored at one of the flip queues. In response to determining that the flip request targets a flip queue that is being used for rendering at the display device, the scheduler executes a context switch to schedule a different graphics context for execution at the graphics pipeline.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: January 8, 2019
    Assignee: ATI TECHNOLOGIES ULC
    Inventor: Gongxian Jeffrey Cheng
  • Patent number: 10176584
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for reducing latency in transmitting and presenting map user interfaces. In one aspect, a method includes receiving, from a client device, a request for presentation of an interactive map user interface that depicts (i) a region and (ii) data related to an account for sub-regions of the region. One or more servers render a map of the region. The server(s) generate an image file representing an image of the rendered map. A different visual characteristic is assigned to each different sub-region. The server(s) configure a user interface of the client device to present (i) the image with each of the different sub-regions being presented according to the different visual characteristics and (ii) account data related to a sub-region when the client device detects a user interaction with the sub-region.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: January 8, 2019
    Assignee: Google LLC
    Inventors: Nikhil Bakshi, Oliver Michael King, Zev Nettleton Youra
  • Patent number: 10163179
    Abstract: An apparatus and method are described for cloud-based graphics updates. For example, one embodiment of an apparatus comprises a system optimization agent to detect a graphics application installed on the apparatus, the system optimization agent to responsively transmit, over a network, information related to the graphics application including a new graphics application or a new version of an existing graphics application. The apparatus may further comprise the system optimization agent to receive, over the network, optimized program code comprising one or more optimizations to specified portions of a graphics driver, where the one or more optimizations relate to the graphics application.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: December 25, 2018
    Assignee: Intel Corporation
    Inventors: Travis T. Schluesser, Robert B. Taylor, Abhishek Venkatesh, Daniel H. Walsh
  • Patent number: 10157593
    Abstract: A cross-platform rendering engine. The cross-platform rendering engine serves as an intermediary between the application and the operating system for displaying application content on the screen allowing software developers to write platform-agnostic application code. The application sends content to the cross-platform rendering engine in the form of resource-efficient content descriptions describing the content to be displayed. In turn, cross-platform rendering engine stores the content descriptions and provides rasterized images generated from the content descriptions to the compositor as needed. In the event that a content description corresponding to the texture needed by the compositor is not available, the cross-platform rendering engine pulls the content description from the application.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: December 18, 2018
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Ben Witman, Dave McDonald, Michael Y. Joe, Faaez Ul Haq
  • Patent number: 10157440
    Abstract: A processing apparatus is described. The apparatus includes a central processing unit (CPU), a graphics processing unit (GPU) and data sharing logic to perform static physical data sharing between the CPU and the GPU by changing code written for the GPU to operate with CPU variables.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: December 18, 2018
    Assignee: INTEL CORPORATION
    Inventors: Konstantin S. Bobrovsky, Serguei N. Dmitriev, Knud J. Kirkegaard
  • Patent number: 10146578
    Abstract: A method for the quasi-parallel execution of threads, including: within a time slice, time-limited resources, particularly a computing time, are allotted to the threads by a preemptive first scheduler on the basis of a priority of the threads, and the first scheduler is combined with further schedulers.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: December 4, 2018
    Assignee: ROBERT BOSCH GMBH
    Inventors: Gunnar Piel, Arnaud Riess, Florian Kraemer, Steffen Klinger
  • Patent number: 10140558
    Abstract: A non-transitory recording medium storing a computer readable program causes a computer to execute: a) analyzing unconverted first page description language data to determine whether a repetitive pattern image portion is included in the first page description language data; b) separating the repetitive pattern image portion from the first page description language data when it is determined that the repetitive pattern image portion is included in the first page description language data; c) generating first partial data in a second page description language; d) generating second partial data in the second page description language based on a portion other than the repetitive pattern image portion of the first page description language data; and e) generating converted data that relates to the first page description language data and is second page description language data based on the first partial data and the second partial data.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: November 27, 2018
    Assignee: KONICA MINOLTA, INC.
    Inventors: Hirotsugu Hiramoto, Yoshiyuki Harada
  • Patent number: 10133953
    Abstract: A system and method for enabling graphic-based interoperability with a run-time application is configured to, during a design-time (DT) mode: receive a DT application image; identify DT visual objects within the DT application image; generate DT bounding shape objects in which each DT bounding shape object bounds one or more DT visual objects identified within the DT application image; define bounding shape properties for the DT bounding shape objects; and store as a scene, data relating to the DT application image, the DT visual objects, the DT bounding shape objects, and the bounding shape properties, for later recall; and during a run-time (RT) mode: recall the scene stored during the DT mode; capture a RT application image; identify RT visual objects within the RT application image based on the scene; generate RT bounding shape objects, and apply the bounding shape properties to the generated RT bounding shape objects.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: November 20, 2018
    Assignee: NICE LTD.
    Inventors: Alexander Vaindiner, Vitaly Shelest, Yuri Staloverov
  • Patent number: 10127925
    Abstract: A system and method for processing a plurality of channels, for example audio channels, in parallel is provided. For example, a plurality of telephony channels are processed in order to detect and respond to call progress tones. The channels may be processed according to a common transform algorithm. Advantageously, a massively parallel architecture is employed, in which operations on many channels are synchronized, to achieve a high efficiency parallel processing environment. The parallel processor may be situated on a data bus, separate from a main general purpose processor, or integrated with the processor in a common board or integrated device. All, or a portion of a speech processing algorithm may also be performed in a massively parallel manner.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: November 13, 2018
    Assignee: Calltrol Corporation
    Inventor: Wai Wu
  • Patent number: 10115175
    Abstract: A method for processing data in a graphics processing unit including receiving an indication that all threads of a warp in a graphics processing unit (GPU) are to execute a same branch in a first set of instructions, storing one or more predicate bits in a memory as a single set of predicate bits, wherein the single set of predicate bits applies to all of the threads in the warp, and executing a portion of the first set of instructions in accordance with the single set of predicate bits. Executing the first set of instructions may include executing the first set of instruction in accordance with the single set of predicate bits using a single instruction, multiple data (SIMD) processing core and/or executing the first set of instruction in accordance with the single set of predicate bits using a scalar processing unit.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: October 30, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Andrew Evan Gruber, Pramod Vasant Argade, Jing Wu
  • Patent number: 10115224
    Abstract: A method of generating a ray tracing acceleration structure includes transformatively mapping locations of object primitives in a three dimensional first space into Morton codes indicating respective locations of the primitives along a meandering linear path through the first space; determining a Morton distance indicating a difference between a first Morton code corresponding with a first primitive and a second Morton code corresponding with a second primitive; generating an acceleration structure to include nodes representing portions of the first space and adaptively adjusting a reference level of the acceleration structure, based on the Morton distance between primitives; and dividing the first space using a first division method when a level of a first node of the acceleration structure which corresponds to the first space is lower than the reference level, and dividing the first space using a second division method when the level of the first node exceeds the reference level.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: October 30, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youngsam Shin, Wonjong Lee, Seokjoong Hwang
  • Patent number: 10108737
    Abstract: Concepts and technologies are described herein for presenting data driven forms. In accordance with the concepts and technologies disclosed herein, a user device obtains a resource referencing or presenting data driven forms and obtains data displayed or used by the resource. The user device stores the data in a cache accessible by the user device. The user device can render multiple views containing data from the cache. The user device can display one of the views and hide the other views from display. If the user device detects input for viewing other views, the user device can present one of the previously hidden views. The user device also can manage the cache and download additional data, if the cache empties or is not full.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: October 23, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Javier Arturo Porras Luraschi, Alisa Yujin So
  • Patent number: 10102022
    Abstract: Methods, systems, and computer program products are included for providing a virtual machine guest with access to a host device. A method includes providing a hypervisor with access to an enhanced allocation capability entry of a host device. The host device performs input and output operations via a range of addresses that are provided by the enhanced allocation capability entry. The hypervisor runs a virtual machine and configures the virtual machine to include a virtual device corresponding to the host device. The virtual device includes the range of addresses in an enhanced allocation capability entry. The hypervisor modifies a context, such as a bit map, corresponding to the virtual machine to provide guests of the virtual machine with access to perform I/O operations corresponding to the host device using the range of addresses.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: October 16, 2018
    Assignee: RED HAT ISRAEL, LTD.
    Inventor: Michael Tsirkin
  • Patent number: 10096167
    Abstract: A wearable computing device includes a head-mounted display (HMD) that generates a virtual reality environment. Through the generation and tracking of positional data, a the virtual environment may be interrupted or paused. Upon pausing the environment, a user may access a number of ancillary menus and controls not otherwise available during normal operation of the virtual environment.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: October 9, 2018
    Assignee: SONY INTERACTIVE ENTERTAINMENT AMERICA LLC
    Inventor: Justin Moravetz
  • Patent number: 10089706
    Abstract: An interface mitigates the need for inter-application locks in a storage system with a HPP. The interface includes a virtual device driver that can be accessed by both emulation threads and guest OS Container threads and separate memory pages that are pinned for use as buffer spaces. The pinned buffer memory pages are shared by CPU cores and by individual virtual HPP client drivers. The interface enables virtualization of GPUs and HPPs.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: October 2, 2018
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Jonathan Krasner, Steven R. Chalmer
  • Patent number: 10078882
    Abstract: A method of processing commands is provided. The method includes holding commands in queues and executing the commands in an order based on their respective priority. Commands having the same priority are held in the same queue.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: September 18, 2018
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Philip J. Rogers, David Gotwalt, Tom Frisinger, Rex McCrary
  • Patent number: 10051330
    Abstract: Embodiments relate to providing a recorded gameplay session of an interactive content controlled by a broadcasting user. While the broadcasting user is controlling the interactive content being recorded, the inputs provided by the broadcasting user for interacting with the interactive content are recorded. Properties of objects in the interactive content being controlled by the broadcasting user are modified in view of the inputs provided by the broadcasting user. Furthermore, the properties of the objects in the interactive content being controlled by the broadcasting user are periodically recorded. The recorded inputs provided by the broadcasting user and the recorded properties of the objects in the interactive content are used to provide a viewing user a recording of the gameplay session of the interactive content controlled by the broadcasting user.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: August 14, 2018
    Assignee: Facebook, Inc.
    Inventors: Brendan Si-jing Caporaletti, Christopher John Marra, Joshua R. Langowitz, William Dean Saulnier, Chu-Hao Fan, Thomas Nattestad
  • Patent number: 10039978
    Abstract: A computing system is configured to execute a computer program on a server and to provide a video stream of the program output to a geographically remote client over a communication network. An add-on manager is provided to facilitate the use of add-ons to extend the functionality of the computer program. The add-on manager is responsive to commands received from the client and is configured to associate individual add-ons and add-on data with specific user accounts. The add-ons can be located on the server or some other location remote from the client.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: August 7, 2018
    Assignee: Sony Interactive Entertainment America LLC
    Inventors: Andrew Buchanan Gault, Rui Filipe Andrade Pereira, David Perry
  • Patent number: 10031857
    Abstract: A method in a system that includes first and second devices that communicate with one another over a fabric that operates in accordance with a fabric address space, and in which the second device accesses a local memory via a local connection and not over the fabric, includes sending from the first device to a translation agent (TA) a translation request that specifies an untranslated address in an address space according to which the first device operates, for directly accessing the local memory of the second device. A translation response that specifies a respective translated address in the fabric address space, which the first device is to use instead of the untranslated address is received by the first device. The local memory of the second device is directly accessed by the first device over the fabric by converting the untranslated address to the translated address.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: July 24, 2018
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Adi Menachem, Shlomo Raikin, Idan Burstein, Michael Kagan
  • Patent number: 10031654
    Abstract: A method includes parsing information associated with an industrial process in an industrial process control system to identify equipment data associated with the industrial process. The method also includes receiving a selection of equipment. The method further includes identifying one or more shapes associated with the selected equipment. In addition, the method includes automatically generating at least one process graphic containing the one or more shapes and the equipment data.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: July 24, 2018
    Assignee: Honeywell International Inc.
    Inventors: Colin Hams, David Barry Granatelli, Thomas Street, Graeme Laycock, David James Cupitt, Matthew Willmott
  • Patent number: 10013790
    Abstract: In a graphics processing system, a driver for the graphics processing pipeline can include conditional graphics processing tasks in the graphics processing tasks that are to be executed by the graphics processing pipeline to generate a render output required by an application. Each such conditional task has associated with it a condition to be used by the graphics processing pipeline to determine whether to execute processing for the task or not and a region of the render output over which the processing for the task will be executed when the condition for the task is met. The graphics processing pipeline determines whether the condition associated with the task has been met, and only executes the processing for the task if the condition associated with the task has been met.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: July 3, 2018
    Assignee: Arm Limited
    Inventors: Sandeep Kakarlapudi, Andreas Due Engh-Halstvedt, Lars Oskar Flordal, Arne Bergene Fossaa
  • Patent number: 10013732
    Abstract: Mechanisms for externally directing graphics processing unit data are disclosed. A simulator module includes an external application interface that is configured to communicate with an external application that is independent of the simulator module. The simulator module is configured to receive from the external application via the external application interface first user data and provide the first user data to a graphics processing unit (GPU) for use by a first shader function for image rendering during a first period of time. The simulator module continuously generates simulation data associated with a simulation and provides the simulation data to the GPU for the image rendering during the first period of time.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: July 3, 2018
    Assignee: Lockheed Martin Corporation
    Inventors: Robert C. McCarthy, Zachary J. Heylmun, Hong Phuoc Nguyen, Howell B. Hollis
  • Patent number: 10015301
    Abstract: The lock screen wallpaper of a mobile device is temporarily changed so that when a user activates the display without unlocking the phone, he/she can review information that is rendered as the lock screen wallpaper.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: July 3, 2018
    Assignee: AVANT-GARDE IP LLC
    Inventor: Ramraj Soundararajan
  • Patent number: 10013734
    Abstract: In accordance with some embodiments, a command streamer may use a cache of programmable size to cache commands to improve memory bandwidth and reduce latency. The size of the command cache may be programmably set by the command streamer.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: July 3, 2018
    Assignee: Intel Corporation
    Inventors: Jeffery S. Boles, Hema C. Nalluri, Balaji Vembu, Michael Apodaca, Altug Koker, Lalit K. Saptarshi
  • Patent number: 10002021
    Abstract: This disclosure is directed to deferred preemption techniques for scheduling graphics processing unit (GPU) command streams for execution on a GPU. A host CPU is described that is configured to control a GPU to perform deferred-preemption scheduling. For example, a host CPU may select one or more locations in a GPU command stream as being one or more locations at which preemption is allowed to occur in response to receiving a preemption notification, and may place one or more tokens in the GPU command stream based on the selected one or more locations. The tokens may indicate to the GPU that preemption is allowed to occur at the selected one or more locations. This disclosure further describes a GPU configured to preempt execution of a GPU command stream based on one or more tokens placed in a GPU command stream.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: June 19, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Eduardus A Metz, Nigel Terence Poole, Colin Christopher Sharp, Andrew Gruber
  • Patent number: 9992528
    Abstract: A system is configured to display a video clip on a display of a user device. The system receives a request from the user device to display the video clip. The system then queries an advertiser server to identify the video clip. The system fetches the identified video clip. The system then extracts from the fetched video clip its video content. The video content is a plurality of frames. The system then determines a type of the user device. Then, the system determines a number of frames per second for the user device. The system generates a plurality of images from the plurality of frames. The system further generates a timing sequence for displaying each of the plurality of images of the imagized video clip on the display of the user device. The system then sends the imagized video clip and the timing sequence to the user device.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: June 5, 2018
    Assignee: Ani-View Ltd.
    Inventor: Tal Melenboim
  • Patent number: 9972064
    Abstract: Devices, systems and methods are disclosed for capturing a display by storing graphical commands and generating video data using the graphical commands at a later point in time. For example, a device may store graphical commands while generating display data associated with the graphical commands. The device may modify the graphical commands to replace data included in the graphical commands with pointers to the data. Optionally, the device may transmit the graphical commands to a server. The device and/or server may identify the data referenced by the pointers, execute the graphical commands to generate display data and encode the display data to generate a video of the original display.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: May 15, 2018
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Bruno Pereira Evangelista, Ozgur Cem Sen, Biju Balakrishna Pillai, Christopher Karl Lang
  • Patent number: 9965823
    Abstract: The claimed subject matter includes techniques for live migration of a graphics processing unit (GPU) state. An example method includes receiving recorded GPU commands from a relay at a destination GPU. The method also includes replaying the recorded GPU commands at the destination GPU. The method also includes detecting a downtime for the GPU commands. The method further includes establishing a connection between the destination GPU and the client during the detected downtime.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: May 8, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Kiryong Ha, Paramvir Bahl, David Chiyuan Chu, Eduardo Cuervo, Lenin Ravindranath Sivalingam, Alastair Wolman
  • Patent number: 9953621
    Abstract: A method for shortening image delay includes, but is not limited to refreshing a current frame image from a frame buffer area to the display screen from top to bottom, and notifying an application to draw next frame image when the current frame image is refreshed to a predetermined row. The method further includes updating content in predetermined rows from top of next frame image drawn by the application to the frame buffer area of the system, and replacing content in the predetermined rows of the current frame image that have already been displayed The method further includes updating the content in the remaining rows of next frame image drawn by the application to the frame buffer area, and replacing content in the remaining rows of the current frame image that have already been displayed.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: April 24, 2018
    Assignee: Beijing Pico Technology Co., Ltd.
    Inventor: Ligang Li
  • Patent number: 9947068
    Abstract: A computer-implemented method, apparatus and computer program product for scheduling tasks, the method comprising: receiving a request from a context for processing a frame by a Graphic Processing Unit (GPU); allocating frame processing time for the context in association with the frame; receiving a command buffer associated with the frame; subject to a pending command buffer collection being empty, submitting the command buffer for processing by the GPU; determining priorities for all command buffers in the pending command buffer collection, including a priority for the command buffer; if the highest priority command buffer is the command buffer, submitting the command buffer for processing; otherwise adding the command buffer to the pending command buffer collection, wherein the frame processing time allocated for the context is reduced by an amount of time related to a time a previous frame associated with the context exceeded its allocated processing time.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: April 17, 2018
    Assignee: Gamefly Israel Ltd.
    Inventor: Yuval Sarna
  • Patent number: 9947070
    Abstract: A GPU can be configured to selectively function as a PCIe switch so that a PCIe link can be formed between the GPU and a remote GPU. The GPU can include a DisplayPort interface that is coupled via a multiplexer to a USB type-C port. When it is desired to implement remote graphics, the GPU can cause the DisplayPort interface to instead function as a PCIe interface between the GPU and the multiplexer. With this PCIe connection, the GPU can forward its PCIe interface with the CPU to the remote GPU via the USB type-C port. In this way, remote graphics can be implemented without using Thunderbolt to tunnel the PCIe interface to the remote GPU.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: April 17, 2018
    Assignee: Dell Products L.P.
    Inventor: Arnold Thomas Schnell