Graphic Command Processing Patents (Class 345/522)
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Patent number: 12217072Abstract: A method, a computing device and a computer program is disclosed. The method comprises providing, at a computing device, at least one first executable image file comprising first executable software associated with a graphical user interface application; and executing the first executable image file as at least one first software container element that contains the first executable software and that is executable on one or more processors of the computing device; and responsive to executing the first executable image file, providing a first graphical user interface on a display of the computing device.Type: GrantFiled: December 23, 2022Date of Patent: February 4, 2025Assignee: NCR Voyix CorporationInventor: Simon Waterman
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Patent number: 12211466Abstract: Methods and apparatus for graphics processing, such as producing a smooth transition between images of different dynamic ranges (e.g., Standard Dynamic Range (SDR) images and High Dynamic Range (HDR) images). An example method generally includes using a high frame rate during a transition period to allow properties of images to incrementally vary. The properties may include brightness (i.e., luminance), color gamut, tone mapping, among others. For example, during the transition period, a subset of HDR images are displayed at a second frame rate (e.g., 120 Hz) higher than a frame rate based on the HDR images (e.g., 30 Hz). Simultaneously, a brightness level (as well as other aspects) of the display panel is adjusted incrementally from an SDR brightness level to an HDR brightness level during the transition time period over the subset of the HDR images.Type: GrantFiled: April 14, 2021Date of Patent: January 28, 2025Assignee: QUALCOMM IncorporatedInventors: Nan Zhang, Ike Ikizyan, Xinchao Yang, Zhizhou Chen
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Patent number: 12210058Abstract: A method of testing an integrated circuit device that includes components of first and second types, where the components of the second type consume power when clocked even when not active, includes gating off the clock signal to prevent clock signals from reaching the components of the second type, and applying test inputs to the components of the first type. Gating off the clock signals to the components of the second type may include preventing the clock signals from reaching individual components of the second type, or preventing the clock signals from reaching each clock tree branch that contains only components of the second type, or, when a clock tree serving the components of the second type supplies clock signals only to the components of the second type, preventing the clock signals from reaching the clock tree.Type: GrantFiled: July 26, 2023Date of Patent: January 28, 2025Assignee: Marvell Asia Pte LtdInventors: Sreekanth G. Pai, Harry I. Linzer, Harish Mundrathi, Santosh Kumar Surendra
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Patent number: 12204941Abstract: Systems and methods for preserving the quality of service for client applications having workloads for execution by a compute core or a hardware accelerator are described. A method for operating a hardware accelerator configured to process commands submitted by client applications to the hardware accelerator, where a workload can be executed either by a compute core or by the hardware accelerator, is described. The method includes queueing commands for execution of workloads in a first set of command queues and queueing commands for execution of workloads in a second set of command queues. The method includes workload processors executing workloads specified by commands in the first set of command queues and the second set of command queues in an order of execution that is determined based on output of a set of trackers configured to track one or more criteria for a selected set of command queues.Type: GrantFiled: May 26, 2023Date of Patent: January 21, 2025Assignee: Microsoft Technology Licensing, LLCInventor: John Allen Tardif
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Patent number: 12169731Abstract: A processing system selects a reset sequence based on a sideband connected configuration of a plurality of processing units. The processing system identifies whether the plurality of processing units is in the sideband connected configuration, so that the plurality of processing units works together on assigned operations. Based on the identification, the processing system selects and executes one of a plurality of available reset sequences. The processing system is thus able to tailor the executed reset sequence for the configuration of the plurality of processing units, thereby reducing the number of overall system resets and improving processing efficiency.Type: GrantFiled: December 28, 2021Date of Patent: December 17, 2024Assignee: ATI TECHNOLOGIES ULCInventors: Yinan Jiang, Shaoyun Liu, Aranyak Mishra, Maria Joo
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Patent number: 12165252Abstract: Techniques for executing computing work by a plurality of chiplets are provided. The techniques include assigning workgroups of a kernel dispatch packet to the chiplets; by each chiplet, executing the workgroups assigned to that chiplet; for each chiplet, upon completion of all workgroups assigned to that chiplet for the kernel dispatch packet, notifying the other chiplets of such completion; and upon completion of all workgroups of the kernel dispatch packet, notifying a client of such completion and proceeding to a subsequent kernel dispatch packet.Type: GrantFiled: October 3, 2023Date of Patent: December 10, 2024Assignee: Advanced Micro Devices, Inc.Inventors: Milind N. Nemlekar, Maxim V. Kazakov, Prerit Dak
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Patent number: 12159343Abstract: Systems and techniques are provided for accelerated shadow ray traversal for a hierarchical structure for ray tracing. For instance, a process can include obtaining a hierarchical acceleration data structure, the hierarchical acceleration data structure including one or more primitives of a scene object. Two or more nodes included in a same level of the hierarchical acceleration data structure can be sorted into a sort order, the sort order based on a sorting parameter value determined for each respective node of the two or more nodes. The sorting parameter value can be associated with a probability of determining a ray-opaque primitive intersection for each respective node of the two or more nodes. An intersection between a shadow ray and an opaque primitive included in a node of the two or more nodes can be determined based on traversing the hierarchical acceleration data structure using the sort order.Type: GrantFiled: June 21, 2022Date of Patent: December 3, 2024Assignee: QUALCOMM IncorporatedInventors: Piyush Gupta, David Kirk McAllister
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Patent number: 12136160Abstract: Methods and systems are disclosed for performing operations for estimating power usage of an AR experience. The operations include: accessing resource utilization data associated with execution of an augmented reality (AR) experience; applying a machine learning technique to the resource utilization data to estimate power consumption of the AR experience, the machine learning technique being trained to establish a relationship between a plurality of training resource utilization data associated with training AR experiences and corresponding ground-truth power consumption of the training AR experiences; and adjusting one or more operations of the AR experience to reduce power consumption based on the estimated power consumption of the AR experience.Type: GrantFiled: April 27, 2022Date of Patent: November 5, 2024Assignee: Snap Inc.Inventors: Tejas Bahulkar, Edward Lee Kim-Koon, Ashwani Arya
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Patent number: 12112420Abstract: A system and a method are disclosed for post-processing variable pixel rate shader output using gradients in a graphics processing unit. A block of pixels is selected that corresponds to a predetermined kernel size for variable rate shading in a draw call of an application. A pixel shader run is instantiated to generate pixel shading values for at least two pixels located within the block of pixels. A gradient output is generated based on an interpolation of the pixel shading values for the at least two pixels over the block of pixels. The predetermined kernel size may include at least one of a 4×2 block of pixels, a 2×4 block of pixels, a 4×4 block of pixels, an 8×4 block of pixels, a 4×8 block of pixels, and an 8×8 block of pixels or larger. The at least two pixels may be corner pixels of the block of pixels.Type: GrantFiled: June 7, 2022Date of Patent: October 8, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Gabriel T. Dagani, Raun Krisch
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Patent number: 12106417Abstract: Incompatible graphics frameworks present a barrier to emulating applications of one operating system (guest OS) upon a computer system employing a different operating system (host OS) such as occurs with virtual machines. Accordingly, in order to address limitations of emulating guest OS graphic pipelines upon the host OS the inventors have established methodologies for cross-platform graphics pipeline emulation, thus enabling efficient implementations of cross-platform virtualization solutions, through the establishment of emulation keys to support generic and specific graphics pipelines together with caching sets of graphical pipelines for subsequent retrieval and execution.Type: GrantFiled: March 21, 2023Date of Patent: October 1, 2024Assignee: Parallels International GmbHInventor: Evgeny Nikitenko
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Patent number: 12100336Abstract: Technology for a display controller is described. The display controller can detect a frame update when the display controller is in a dynamic sleep state. The display controller can wake up from the dynamic sleep state and enter a selective update state at a programmed vertical blanking interrupt (VBI) that precedes an actual VBI. The display controller can perform a scan-out with a display panel during the selective update state. The display controller can return to the dynamic sleep state in a same time frame after the scan-out is completed. The display controller can exclude timing logic to send a VBI at every time frame to the display panel to maintain time synchronization between the display controller and the display panel.Type: GrantFiled: May 4, 2020Date of Patent: September 24, 2024Assignee: Tahoe Research, Ltd.Inventors: Vishal Sinha, Paul Diefenbaugh, Todd Witter, Jason Tanner, Arthur Runyan, Nausheen Ansari, Kathy Bui, Yifan Li
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Patent number: 12093137Abstract: A data back-up system configured to back-up one or more data sets from one or more devices to a data back-up server by using a proxy pool is presented. The data back-up system includes a load-balancer configured to distribute the one or more data sets across the proxy pool. The load balancer includes a data receiver configured to receive types of files, number of files, and total size of each file in the one or more data sets; a load estimator configured to estimate a weighted average load of each data set based on the number of files, the total size of each file, a compressibility factor for each file type, and an encryption factor for each file type; and a load distributor configured to distribute the one or more data sets as a plurality of workloads across the proxy pool.Type: GrantFiled: April 16, 2021Date of Patent: September 17, 2024Assignee: Druva Inc.Inventors: Ajay Potnis, Milind Vithal Borate, Sudeep Jathar, Prahlad Nishal, Somesh Jain, Nishant Thorat
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Patent number: 12083423Abstract: A video server is configured to provide streaming video to players of computer games over a computing network. The video server can provided video of different games to different players simultaneously. This is accomplished by rendering several video streams in parallel using a single GPU (Graphics Processing Unit). The output of the GPU is provided to graphics processing pipelines that are each associated with a specific client/player and are dynamically allocated as needed. A client qualifier may be used to assure that only clients capable of presenting the streaming video to a player at a minimum level of quality receive the video stream. Video frames provided by the video server optionally include overlays added to the output of the GPU. These overlays can include voice data received from another game player.Type: GrantFiled: April 4, 2023Date of Patent: September 10, 2024Assignee: Sony Interactive Entertainment LLCInventors: Andrew Buchanan Gault, David Perry, Rui Filipe Andrade Pereira
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Patent number: 12086900Abstract: A method is described for processing commands for a client computing device using a remote graphics processing unit server. The method includes receiving, by a display driver of the client computing device, a command from an application operating on the client computing device and compressing, by the display driver, the command to generate a compressed command. Compressing the command includes determining whether a resource associated with the command is available in a cache of the remote graphics processing unit server and replacing the resource with a reference to the resource, when the resource is available. The display driver transmits the compressed command to the remote graphics processing unit server for processing by a remote graphics processing unit (GPU) and receives data generated by the remote GPU based on processing the compressed command.Type: GrantFiled: September 20, 2022Date of Patent: September 10, 2024Assignee: Juice Technologies, Inc.Inventors: Dean J. Beeler, David A. McCloskey
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Patent number: 12079899Abstract: Disclosed herein are system, method, and computer program product embodiments for modifying graphics rendering by transcoding a serialized command stream. An embodiment operates by receiving a command configured to instruct an API to render a graphics element. The embodiment further operates by generating, based on the command, a transcoded command configured to instruct the API to render a modified graphics element by applying a set of modification factors to a portion of the command. Subsequently, the embodiment operates by transmitting the transcoded command to the API.Type: GrantFiled: May 8, 2023Date of Patent: September 3, 2024Assignee: Roku, Inc.Inventor: Matthew James Sottek
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Patent number: 12067649Abstract: A disclosed technique includes determining a plurality of per-pixel variable rate shading rates for a plurality of fragments; determining a coarse variable shading rate for a coarse variable rate shading area based on the plurality of per-pixel variable rate shading rates; and shading one or more fragments based on the plurality of fragments and based on the coarse variable shading rate.Type: GrantFiled: June 29, 2021Date of Patent: August 20, 2024Assignee: Advanced Micro Devices, Inc.Inventor: Christopher J. Brennan
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Patent number: 12067666Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a set of draw call instructions corresponding to a graphics workload, where the set of draw call instructions is associated with at least one run-time parameter. The apparatus may also obtain a first shader program associated with storing data in a system memory and at least one second shader program associated with storing data in a constant memory. Further, the apparatus may execute the first shader program or the at least one second shader program based on whether the at least one run-time parameter is less than or equal to a size of the constant memory. The apparatus may also update or maintain a configuration of a shader processor or a streaming processor based on executing the first shader program or the at least one second shader program.Type: GrantFiled: May 18, 2022Date of Patent: August 20, 2024Assignee: QUALCOMM IncorporatedInventors: Yun Du, Eric Demers, Andrew Evan Gruber, Chun Yu, Chihong Zhang, Baoguang Yang, Yuehai Du, Gang Zhong, Avinash Seetharamaiah, Jonnala Gadda Nagendra Kumar
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Patent number: 12067428Abstract: An apparatus to facilitate thread synchronization is disclosed. The apparatus comprises one or more processors to execute a producer thread to generate a plurality of commands, execute a consumer thread to process the plurality of commands and synchronize the producer thread with the consumer thread, including updating a producer fence value upon generation of in-order commands, updating a consumer fence value upon processing of the in-order commands and performing a synchronization operation based on the consumer fence value, wherein the producer fence value and the consumer fence value each correspond to an order position of an in-order command.Type: GrantFiled: December 21, 2020Date of Patent: August 20, 2024Assignee: Intel CorporationInventors: Stav Gurtovoy, Mateusz Maria Przybylski, Michael Apodaca, Manjunath D S
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Patent number: 12062306Abstract: One form of a displaying unit combines a first screen, a second screen, and a third screen generated by a rendering unit so as to be arranged in a horizontal direction, and displays the combined screens on a display unit. A timer counter circuit causes the abnormality monitoring unit to set the black screen layer ON of the screen in which normality of each part related to the screen cannot be detected at a time interval shorter than a predetermined time, and the displaying unit displays the screen in a black screen by superimposing and displaying a black screen layer on the screen in which the black screen layer of being ON has been set.Type: GrantFiled: October 25, 2022Date of Patent: August 13, 2024Assignee: ALPS ALPINE CO., LTD.Inventor: Hiroki Okada
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Patent number: 12056799Abstract: A computer-implemented method includes receiving a digital representation of an image and generating CAD sketches from it. The number of surfaces in a CAD model depends upon the number entities at the sketch level. The method keeps the number of created sketch entities and constraints to a minimum. The method includes a scalable approach for a range of images. Each contour is represented by a sequence of points following a path corresponding to a boundary in the image. The method includes classifying each point in a particular one of the contours as a curve region or a corner region contour point, thereby segmenting the contour into plurality of curve regions separated by corner regions. The method includes optimally fitting a curve to each one of the curve regions to create the best possible representation of the curve region. Additionally, the refine algorithm automatically improves the fit wherever needed.Type: GrantFiled: April 28, 2022Date of Patent: August 6, 2024Assignee: Dassault Systemes SolidWorks CorporationInventors: Shrikant Savant, Harsh Sureshbhai Khoont, Zahra Karimi, Jody Stiles, Chin-Loo Lama, Makarand Apte
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Patent number: 12056787Abstract: Methods and systems are disclosed for inline suspension of an accelerated processing unit (APU). Techniques include receiving a packet, including a mode of operation and commands to be executed by the APU; suspending execution of commands received in previous packets when the mode of operation is a suspension initiation mode; and executing, by the APU, the commands in the received packet. The execution of the suspended commands is restored when the mode of operation in a subsequently received packet is a suspension conclusion mode.Type: GrantFiled: December 28, 2021Date of Patent: August 6, 2024Assignee: Advanced Micro Devices, Inc.Inventors: Alexander Fuad Ashkar, Mangesh P. Nijasure, Rakan Z. Khraisha, Manu Rastogi
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Patent number: 12051154Abstract: Systems and methods for distributed rendering using two-level binning include processing primitives of a frame to be rendered at a first graphics processing unit (GPU) chiplet in a set of GPU chiplets to generate visibility information of primitives for each coarse bin and providing the visibility information to the other GPU chiplets in the set of GPU chiplets. Each coarse bin is then assigned to one of the GPU chiplets of the set of GPU chiplets and rendered at the assigned GPU chiplet based on the corresponding visibility information.Type: GrantFiled: December 27, 2021Date of Patent: July 30, 2024Assignee: Advanced Micro Devices, Inc.Inventors: Anirudh R. Acharya, Ruijin Wu
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Patent number: 12046273Abstract: Apparatuses and methods for saving power at an input buffer are described. An example apparatus includes an input buffer comprising an amplifier coupled to a pair of serially coupled inverters, and a de-emphasis circuit coupled to the input buffer in parallel with one of the pair of serially-coupled inverters. The de-emphasis circuit comprising a plurality of transistors coupled in parallel to a resistance. The example apparatus further includes an input buffer control circuit configured to selectively enable one of the plurality of transistors to adjust a gain across the one of the pair of inverters based on a latency setting.Type: GrantFiled: September 28, 2022Date of Patent: July 23, 2024Assignee: MICRON TECHNOLOGY, INC.Inventors: Akira Yamashita, Kenji Asaki
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Patent number: 12039829Abstract: An electronic gaming device provides a rendering pipeline for an electronic game. The rendering pipeline includes a client component and a native component of the rendering pipeline, where the client component is configured to: initiate a rendering operations pipe between the client component and the native component; convert display commands from a source language of the electronic game into rendering operations of an intermediate rendering language; and transmit the rendering operations through the rendering operations pipe to the native component. The native component is configured to: receive the rendering operations via the rendering operations pipe; translate the rendering operations from the intermediate rendering language into rendering operations of the native component; and perform the rendering operations of the native component on the display device.Type: GrantFiled: May 11, 2023Date of Patent: July 16, 2024Assignee: Aristocrat Technologies, Inc.Inventors: Jody Brown, Joseph Bibbo
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Patent number: 12038854Abstract: Techniques for controlling input/output (I/O) power usage are disclosed. In the illustrative embodiment, a power policy engine of a compute device monitors power usage, I/O data transfer rates, and temperature and determines when there should be a change in an I/O power setting. The I/O data transfer requires that the data be handled properly, causing the compute device to expend power on the I/O data transfer. The power policy engine may instruct a device driver, such as a driver of an I/O device, to change a data transfer rate of the I/O device, reducing the power the compute device spends handling I/O.Type: GrantFiled: December 24, 2020Date of Patent: July 16, 2024Assignee: Intel CorporationInventors: Jaya L. Jeyaseelan, Barnes Cooper, Abdul R. Ismail
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Patent number: 12033236Abstract: A method of detecting an error at a graphics processing unit causes an instruction including a request for a response from a graphics processing unit to be provided to the graphics processing unit. A timer being configured to expire after a time period is initialised, and during the time period the graphics processing unit is monitored for the response from the graphics processing unit. An error is determined to have occurred in response to determining that no response was received from the graphics processing unit before the timer expired.Type: GrantFiled: January 23, 2023Date of Patent: July 9, 2024Assignee: Imagination Technologies LimitedInventors: Mario Sopena Novales, Philip Morris
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Patent number: 12020343Abstract: A vehicle device includes an application as a determiner configured to determine whether a frame buffer has been updated. The application is further configure to set a determination region, prepare a determination image to be drawn in the determination region, request a GPU to draw the prepared determination image, read the determination image that is actually drawn in the frame buffer by the GPU, and determine that the frame buffer has been updated when the prepared determination image matches the read determination image.Type: GrantFiled: October 19, 2021Date of Patent: June 25, 2024Assignee: DENSO CORPORATIONInventor: Nobuhiko Tanibata
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Patent number: 12022131Abstract: Interpolation between explicitly signaled CPB (or HRD) parameters at selected bit rates is used to achieve a good compromise between CPB parameter transmission capacity and CPB parametrization effectiveness and may be, particularly, made in an effective manner.Type: GrantFiled: May 19, 2023Date of Patent: June 25, 2024Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.Inventors: Yago Sánchez De La Fuente, Benjamin Bross, Robert Skupin, Cornelius Hellge, Thomas Schierl, Thomas Wiegand
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Patent number: 12014265Abstract: An apparatus to facilitate processing of a sparse matrix for arbitrary graph data is disclosed. The apparatus includes a graphics processing unit having a data management unit (DMU) that includes a scheduler for scheduling matrix operations, an active logic for tracking active input operands, and a skip logic for tracking unimportant input operands to be skipped by the scheduler. Processing circuitry is coupled to the DMU. The processing circuitry comprises a plurality of processing elements including logic to read operands and a multiplication unit to multiply two or more operands for the arbitrary graph data and customizable circuitry to provide custom functions.Type: GrantFiled: April 19, 2023Date of Patent: June 18, 2024Inventors: Eriko Nurvitadhi, Amit Bleiweiss, Deborah Marr, Eugene Wang, Saritha Dwarakapuram, Sabareesh Ganapathy
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Patent number: 12010307Abstract: The present disclosure provides a method and apparatus for subband-coding a frequency conversion unit and a video encoding/decoding method a video encoding/decoding apparatus using the same. The method and the apparatus for subband-coding the frequency conversion unit include generating an encoding stream by splitting the frequency conversion unit into one or more frequency domains, generating frequency domain encoding information according to whether there is a non-zero frequency coefficient in each frequency domain, scanning the frequency coefficient of each frequency domain to generate a frequency domain frequency coefficient stream, and binarizing and encoding the frequency domain encoding information and the scanned frequency domain frequency coefficient stream.Type: GrantFiled: October 24, 2022Date of Patent: June 11, 2024Assignee: SK TELECOM CO., LTD.Inventors: Jinhan Song, Jeongyeon Lim, Haekwang Kim, Joohee Moon, Yunglyul Lee, Jongki Han, Byeungwoo Jeon
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Patent number: 12008675Abstract: A system and a method are disclosed for separating 3D content from 2D UI content for selectively upscaling 3D draw calls. A controller, coupled to a graphics pipeline, determines whether an application supports upscaling and, if so, creates a full-resolution framebuffer for rendering 2D drawcalls bound to the graphics pipeline and a reduced-resolution framebuffer for rendering 3D drawcalls bound to the graphics pipeline. A drawcall is then determined to be a 2D or a 3D drawcall. The controller stores the drawcall in the full-resolution framebuffer if the draw call is a 2D drawcall and stores the drawcall in the reduced-resolution framebuffer if the draw call is a 3D drawcall. The draw stored in the reduced-resolution framebuffer is upscaled to be a full-resolution drawcall, and the 2D draw in the full-resolution framebuffer and the upscaled 3D draw are combined to form a final output.Type: GrantFiled: September 27, 2021Date of Patent: June 11, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Gabriel T. Dagani, Gregory Bergschneider
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Patent number: 12002143Abstract: A computing device performs a first operation before a first commit deadline, resulting in a first frame being rendered and displayed in a first cycle. A second operation is performed, before a second commit deadline, resulting in a second frame being rendered and displayed in a second cycle. A time remaining to a third commit deadline is determined, using the current time. A third operation is predicted, performable before a third commit deadline. An additional operation is predicted, performable for a future cycle. A total processing time for the third and additional operations is determined, being less than the remaining time. The third and additional operations are performed for use in a future cycle. The result of the third operation is used to render a third frame for the third cycle. The result of the additional operation is used to render an additional frame before a future render deadline.Type: GrantFiled: March 1, 2022Date of Patent: June 4, 2024Assignee: Apple Inc.Inventors: Tyler M. Fox, Andrey Pokrovskiy, Aditya Krishnadevan, James R. Montgomerie
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Patent number: 11995428Abstract: A system and method for enabling graphic-based interoperability between computer executed applications. A computer system operating as a client may display a graphical user interface (GUI) including control graphic items such as buttons, text boxes, etc. A process may examine the graphical image of the GUI to determine if there has been a change over time in the GUI as displayed which updates a control graphic item. If there has been a change over time in the GUI which updates a control graphic item, an action may be taken, for example updating properties of an object construct corresponding to the control graphic item, raising an event corresponding to an object construct corresponding to the control graphic item, or communicating an event to a process.Type: GrantFiled: June 18, 2021Date of Patent: May 28, 2024Assignee: NICE INC.Inventors: Alexander Vaindiner, Vitaly Shelest
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Patent number: 11985877Abstract: A display substrate having a display area is provided. The display substrate includes a base and a plurality of light-emitting devices disposed on the base and located in the display area. Each light-emitting device includes a light-emitting portion. In at least one light-emitting device, the light-emitting portion is manufactured using an ink-jet printing process. Distances from a plurality of selected points on an edge of an orthographic projection of the light-emitting portion manufactured using the ink-jet printing process on the base to a center of the orthographic projection are equal. Using the center of the orthographic projection as a center of a circle and a distance from a selected point in the plurality of selected points to the center of the orthographic projection as a radius, the plurality of selected points are distributed on the circle at equal intervals.Type: GrantFiled: September 23, 2020Date of Patent: May 14, 2024Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventor: Wenjun Hou
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Patent number: 11960695Abstract: The disclosed embodiments provide a system that facilitates use of an application on an electronic device. During operation, the system obtains a first metadata definition containing a mapping of view components in a user interface of the application to a set of attribute-specific types associated with an attribute of the electronic device, and a second metadata definition containing a set of rules for binding the attribute-specific types to a set of platform-specific user-interface elements for a platform of the electronic device. Next, the system generates a view for display in the user interface by applying, based on the attribute and the platform, the first and second metadata definitions to content describing the view to select one or more platform-specific user-interface elements for rendering one or more of the view components in the content. The system then instantiates the platform-specific user-interface element(s) to render the view component(s).Type: GrantFiled: September 14, 2020Date of Patent: April 16, 2024Assignee: INTUIT INC.Inventors: Eugene Krivopaltsev, Marc J. Attinasi, Shailesh K. Soliwal
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Patent number: 11954826Abstract: This disclosure provides methods, devices, and systems for neural network inferencing. The present implementations more specifically relate to performing inferencing operations on high dynamic range (HDR) image data in a lossless manner. In some aspects, a machine learning system may receive a number (K) of bits of pixel data associated with an input image and subdivide the K bits into a number (M) of partitions based on a number (N) of bits in each operand operated on by an artificial intelligence (AI) accelerator, where N<K. For example, the K bits may represent a pixel value associated with the input image. In some implementations, the AI accelerator may perform an inferencing operation based on a neural network by processing the M partitions, in parallel, as data associated with M channels, respectively, of the input image.Type: GrantFiled: July 21, 2021Date of Patent: April 9, 2024Assignee: Synaptics IncorporatedInventor: Karthikeyan Shanmuga Vadivel
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Patent number: 11936980Abstract: An imaging apparatus acquires an image capturing instruction, performs an image capturing processing in a case where a position of an eye of a user is a first condition upon acquiring the image capturing instruction, and requests a second imaging apparatus, which is different from the imaging apparatus, to perform the image capturing processing in a case where the position of the eye of the user is a second condition upon acquiring the image capturing instruction.Type: GrantFiled: September 7, 2022Date of Patent: March 19, 2024Assignee: CANON KABUSHIKI KAISHAInventor: Yuki Fukushima
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Patent number: 11922855Abstract: An information handling system includes a host processing system and a Liquid Crystal Display device. The host processing system includes a graphics processing unit (GPU) and the LCD device includes a memory device and a DisplayPort Configuration Data (DPCD) register. The host processing system 1) determines whether the first GPU supports a Dynamic Display Shifting (DDS) mode, 2) when the GPU does not support the DDS mode, provides a first indication to the LCD device that the GPU does not support the DDS mode, and 3) when the GPU supports the DDS mode, provides a second indication to the LCD device that the GPU supports the DDS mode. The LCD device retrieves a Panel Self Refresh (PSR) setting from the memory device and stores the PSR setting to the DPCD register in response to the first indication, and retrieves a DDS setting from the memory and stores the DDS setting to the DPCD register in response to the second indication.Type: GrantFiled: January 31, 2022Date of Patent: March 5, 2024Assignee: Dell Products L.P.Inventors: Chun-Yi Chang, Yi-Fan Wang, Meng-Feng Hung, No-Hua Chuang, Yu Sheng Chang
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Patent number: 11915046Abstract: A method for image processing is provided. The method may include: obtaining a plurality of frames, each of the plurality of frames comprising a plurality of pixels; determining, based on the plurality of frames, whether a current frame of the plurality of frames comprises a moving object; in response to determining that the current frame includes no moving object, obtaining a first count of frames, and generating a target image by superimposing the first count of frames; in response to determining that the current frame includes a moving object, obtaining a second count of frames, and generating the target image by superimposing the second count of frames.Type: GrantFiled: August 29, 2022Date of Patent: February 27, 2024Assignee: SHANGHAI UNITED IMAGING HEALTHCARE CO., LTD.Inventors: Wanli Teng, Shurui Zhao, Juan Feng, Yecheng Han, Chunhua Jiang, Yong E
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Patent number: 11907691Abstract: A method and system for a command processor for efficient processing of a program multi-processor core system with a CPU and GPU. The multi-core system includes a general purpose CPU executing commands in a CPU programming language and a graphic processing unit (GPU) executing commands in a GPU programming language. A command processor is coupled to the CPU and CPU. The command processor sequences jobs from a program for processing by the CPU or the GPU. The command processor creates commands from the jobs in a state free command format. The command processor generates a sequence of commands for execution by either the CPU or the GPU in the command format. A compiler running a meta language converts program data for the commands into a first format readable by the CPU programming language and a second format readable by the GPU programming language.Type: GrantFiled: March 16, 2021Date of Patent: February 20, 2024Assignee: OXIDE INTERACTIVE, INC.Inventor: Daniel K. Baker
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Patent number: 11900578Abstract: A multi-layer low-pass filter is used to filter a first frame of video data representing at least a portion of an environment of an individual. A first layer of the filter has a first filtering resolution setting for a first subset of the first frame, while a second layer of the filter has a second filtering resolution setting for a second subset. The first subset includes a data element positioned along a direction of a gaze of the individual, and the second subset of the frame surrounds the first subset. A result of the filtering is compressed and transmitted via a network to a video processing engine configured to generate a modified visual representation of the environment.Type: GrantFiled: February 10, 2023Date of Patent: February 13, 2024Assignee: Apple Inc.Inventors: Can Jin, Nicolas Peirre Marie Frederic Bonnier, Hao Pan
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Patent number: 11900503Abstract: A multicore graphics processing unit (GPU) and a method of operating a GPU are provided. The GPU comprises at least a first core and a second core. At least one of the cores in the multicore GPU comprises a master unit configured to distribute geometry processing tasks between at least the first core and the second core.Type: GrantFiled: March 24, 2023Date of Patent: February 13, 2024Assignee: Imagination Technologies LimitedInventor: Ian King
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Patent number: 11890540Abstract: Disclosed are a user interface processing method and device. The method is applied to a user terminal which is configured to execute a game client, the game client comprises a first thread and a second thread, and the second thread is pre-packaged in a browser kernel of the game client, and the method includes: obtaining, by the first thread, a user interface rendering event which is to be processed: obtaining by the second thread, a to-be-rendered object corresponding to the user interface rendering event; rendering, by the second thread, the to-be-rendered object, and sending a rendering result to the first thread through a first interface, wherein the first interface is an interface provided by the second thread for storing the rendering result; and presenting, by the first thread, the rendering result.Type: GrantFiled: June 5, 2019Date of Patent: February 6, 2024Assignee: NETEASE (HANGZHOU) NETWORK CO., LTD.Inventor: Liang Xu
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Patent number: 11887563Abstract: A system and method runs a query using a GPU and generates a visualization of the query using the same GPU.Type: GrantFiled: October 25, 2022Date of Patent: January 30, 2024Assignee: Heavy.ai, Inc.Inventors: Todd L. Mostak, Christopher Root
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Patent number: 11880907Abstract: A method of configuring a graphics processing unit includes generating configuration data that specifies a configuration to be adopted by the graphics processing unit. The configuration data is received at the graphics processing unit, which is configured in accordance with the configuration data by writing the configuration data into one or more registers of the graphics processing unit. It is determined whether the graphics processing unit is correctly configured in accordance with the configuration data by determining whether the configuration data has been correctly written into the one or more registers of the graphics processing unit. An error is determined to have occurred in response to determining that the graphics processing unit is not correctly configured in accordance with the configuration data.Type: GrantFiled: January 23, 2023Date of Patent: January 23, 2024Assignee: Imagination Technologies LimitedInventors: Mario Sopena Novales, Philip Morris
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Patent number: 11871041Abstract: Interpolation between explicitly signaled CPB (or HRD) parameters at selected bit rates is used to achieve a good compromise between CPB parameter transmission capacity and CPB parametrization effectiveness and may be, particularly, made in an effective manner.Type: GrantFiled: May 19, 2023Date of Patent: January 9, 2024Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e. V.Inventors: Yago Sánchez De La Fuente, Benjamin Bross, Robert Skupin, Cornelius Hellge, Thomas Schierl, Thomas Wiegand
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Patent number: 11847720Abstract: A method for graphics processing including rendering graphics for an application using a plurality of graphics processing units (GPUs). The method including dividing responsibility for rendering geometry of the graphics between the GPUs based on screen regions, each GPU having a corresponding division of the responsibility which is known to the GPUs. The method including determining a Z-value for a piece of geometry during a pre-pass phase of rendering at a first GPU for an image, wherein the piece of geometry overlaps a first screen region for which the first GPU has a division of responsibility. The method including comparing the Z-value against a Z-buffer value for the piece of geometry. The method including generating information including a result of the comparing the Z-value against the Z-buffer value for use by the GPU when rendering the piece of geometry during a full render phase of rendering.Type: GrantFiled: November 29, 2022Date of Patent: December 19, 2023Assignee: Sony Interactive Entertainment Inc.Inventors: Mark E. Cerny, Florian Strauss, Tobias Berghoff
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Patent number: 11822960Abstract: Methods, systems, and apparatuses for graph stream processing are disclosed. One apparatus includes a cascade of graph streaming processors, wherein each of the graph streaming processor includes a processor array, and a graph streaming processor scheduler. The cascade of graph streaming processors further includes a plurality of shared command buffers, wherein each shared command buffer includes a buffer address, a write pointer, and a read pointer, wherein for each of the plurality of shared command buffers a first graph streaming processor writes commands to the shared command buffer as indicated by the write pointer of the shared command buffer and a second graph streaming processor reads commands from the shared command buffer as indicated by the read pointer, wherein at least one graph streaming processor scheduler operates to manage the write pointer and the read pointer to avoid overwriting unused commands of the shared command buffer.Type: GrantFiled: June 7, 2022Date of Patent: November 21, 2023Assignee: Blaize, Inc.Inventors: Venkata Ganapathi Puppala, Sarvendra Govindammagari, Lokesh Agarwal, Satyaki Koneru
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Patent number: 11816820Abstract: A multi-layer low-pass filter is used to filter a first frame of video data representing at least a portion of an environment of an individual. A first layer of the filter has a first filtering resolution setting for a first subset of the first frame, while a second layer of the filter has a second filtering resolution setting for a second subset. The first subset includes a data element positioned along a direction of a gaze of the individual, and the second subset of the frame surrounds the first subset. A result of the filtering is compressed and transmitted via a network to a video processing engine configured to generate a modified visual representation of the environment.Type: GrantFiled: April 1, 2022Date of Patent: November 14, 2023Assignee: Apple Inc.Inventors: Can Jin, Nicolas Peirre Marie Frederic Bonnier, Hao Pan
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Patent number: 11816790Abstract: A rule set or scene grammar can be used to generate a scene graph that represents the structure and visual parameters of objects in a scene. A renderer can take this scene graph as input and, with a library of content for assets identified in the scene graph, can generate a synthetic image of a scene that has the desired scene structure without the need for manual placement of any of the objects in the scene. Images or environments synthesized in this way can be used to, for example, generate training data for real world navigational applications, as well as to generate virtual worlds for games or virtual reality experiences.Type: GrantFiled: December 10, 2020Date of Patent: November 14, 2023Assignee: Nvidia CorporationInventors: Jeevan Devaranjan, Sanja Fidler, Amlan Kar