Abstract: A first processing unit such as a graphics processing unit (GPU) pipelines that execute commands and a scheduler to schedule one or more first commands for execution by one or more of the pipelines. The one or more first commands are received from a user mode driver in a second processing unit such as a central processing unit (CPU). The scheduler schedules one or more second commands for execution in response to completing execution of the one or more first commands and without notifying the second processing unit. In some cases, the first processing unit includes a direct memory access (DMA) engine that writes blocks of information from the first processing unit to a memory. The one or more second commands program the DMA engine to write a block of information including results generated by executing the one or more first commands.

Abstract: A method is described for processing commands for a client computing device using a remote graphics processing unit server. The method includes receiving, by a display driver of the client computing device, a command from an application operating on the client computing device and compressing, by the display driver, the command to generate a compressed command. Compressing the command includes determining whether a resource associated with the command is available in a cache of the remote graphics processing unit server and replacing the resource with a reference to the resource, when the resource is available. The display driver transmits the compressed command to the remote graphics processing unit server for processing by a remote graphics processing unit (GPU) and receives data generated by the remote GPU based on processing the compressed command.

Abstract: A method for generating a graphic display of frame images comprises collecting one or more graphic objects to be rendered into a frame image, the one or more graphic objects being represented as a mesh in object space; determining one or more shadels to be computed for the frame image based at least on the one or more input attributes for each of the one or more graphic objects, each shadel being a shaded portion of the mesh; allocating space in a shadel storage buffer for the one or more shadels; populating a work queue buffer, the work queue buffer containing a list of commands to be executed to compute each of the one or more shadels; computing the determined one or more shadels to generate a shaded mesh; and rasterizing the shaded mesh into the frame image. The method can be implemented using a graphics processing unit (GPU).

Abstract: A method includes determining that a new draw call is received; comparing a state identity (ID) of a graphics state stored in the ring storage with a state ID of a graphics state associated with the new draw call; determining if the ring storage has available space to store the graphics state associated with the new draw call; storing the graphics state associated with the new draw call in the ring storage, based on determining that the ring storage has available space; determining a location of a first valid and non-default entry and a last valid and non-default entry of the graphics state associated with the new draw call stored in the ring storage; and collecting data from one or more valid entries of the graphics state associated with the new draw call stored in the ring storage to complete a task associated with the new draw call.

Abstract: The present disclosure provides an image acquisition and processing method. The method includes acquiring an invoking event being configured to invoke an image acquisition device located under a display screen, an acquisition window of the image acquisition device corresponding to a first area of the display screen; activating the image acquisition device based on the invoking event; determining a display state of the first area; acquiring an image by using the image acquisition device based on the display state of the first area; and displaying the acquired image.

Abstract: An apparatus such as a graphics processing unit (GPU) includes shader engines and front end (FE) circuits. Subsets of the FE circuits are configured to schedule commands for execution on corresponding subsets of the shader engines. The apparatus also includes a set of physical paths configured to convey information from the FE circuits to a memory via the shader engines. Subsets of the physical paths are allocated to the subsets of the FE circuits and the corresponding subsets of the shader engines. The apparatus further includes a scheduler configured to receive a reconfiguration request and modify the set of physical paths based on the reconfiguration request. In some cases, the reconfiguration request is provided by a central processing unit (CPU) that requests the modification based on characteristics of applications generating the commands.

Abstract: An apparatus includes at least one processor; and at least one non-transitory memory including computer program code; wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to perform: receive a scene description comprising data associated with a scene; place the data associated with the scene into data buffers and create command buffers; adapt the data placed within the data buffers and synchronize the data within the data buffers with information provided from local media or network media; signal information about the adaptation to update the command buffers that command a renderer; and render the scene using the data within the data buffers and the command buffers.

Abstract: Methods, systems and apparatuses for graph stream processing are disclosed. One apparatus includes a cascade of graph streaming processors, wherein each of the graph streaming processor includes a processor array, and a graph streaming processor scheduler. The cascade of graph streaming processors further includes a plurality of shared command buffers, wherein each shared command buffer includes a buffer address, a write pointer, and a read pointer, wherein for each of the plurality of shared command buffers a first graph streaming processor writes commands to the shared command buffer as indicated by the write pointer of the shared command buffer and a second graph streaming processor reads commands from the shared command buffer as indicated by the read pointer, wherein at least one graph streaming processor scheduler operates to manage the write pointer and the read pointer to avoid overwriting unused commands of the shared command buffer.

Abstract: A computing system comprises graphics rendering logic and image processing logic. The graphics rendering logic processes graphics data to render an image using a rendering space which is sub-divided into a plurality of tiles. Cost indication logic obtains a cost indication for each of a plurality of sets of one or more tiles of the rendering space, wherein the cost indication for a set of one or more tiles is suggestive of a cost of processing rendered image values for a region of the rendered image corresponding to the set of one or more tiles. The image processing logic processes rendered image values for regions of the rendered image. The computing system causes the image processing logic to process rendered image values for regions of the rendered image in dependence on the cost indications for the corresponding sets of one or more tiles.

Abstract: Systems, computer program products, and methods are described herein for identifying, tagging, and monitoring data flow in a system environment. The present invention may be configured to receive data sets generated by applications for storage in data structures, generate unique identifiers for the data sets, and add the unique identifiers to the data sets. The present invention may be further configured to monitor, based on the unique identifiers, access to and movement of the data sets, generate, based on monitoring the access to and the movement of the data sets, flow data, and generate, based on the flow data, a data flow model. The present invention may be further configured to provide, to a user device, a graphical user interface for display by the user device, where the graphical user interface includes information based on the data flow model.

Abstract: Systems, methods, and devices can allow applications to provide complication data to be displayed in display of an electronic device. A client application can create a data object according to a template to efficiently select how the data object is to be displayed. For example, a complication controller on the electronic device can receive new data and determine which template to use. The data object can be sent to a display manager that can identify the selected template and display the data according to the template.

Abstract: A system and a method are disclosed that optimizes a graphics driver. The system may be embodied as a computing device that includes a storage that is internal to the computing device, a graphic processing unit that includes a driver and a controller. The controller may be configured to run a daemon process that optimizes a shader and/or a shader pipeline for an application that is resident on the computing device when the computing device is not running the application and stores at least one optimization for the shader in the storage. The at least one optimization may be based on the application. The daemon process may further receive a request from the driver of the GPU for an optimization for the shader/shader pipeline during a runtime compilation of the shader and provide the at least one optimization to the driver of the GPU from the storage.

Abstract: A semiconductor device includes a processor configured to perform a rendering operation of an image frame to acquire rendering data, and write the acquired rendering data on a memory device, and a display controller configured to perform a read operation of the memory device on which the rendering data is written, to acquire image data. The semiconductor device further includes a micro-sequencing circuit configured to transmit a start signal to the display controller, based on a degree of execution of the rendering operation. The display controller is further configured to, based on the transmitted start signal, start the read operation.

Abstract: A multi-layer low-pass filter is used to filter a first frame of video data representing at least a portion of an environment of an individual. A first layer of the filter has a first filtering resolution setting for a first subset of the first frame, while a second layer of the filter has a second filtering resolution setting for a second subset. The first subset includes a data element positioned along a direction of a gaze of the individual, and the second subset of the frame surrounds the first subset. A result of the filtering is compressed and transmitted via a network to a video processing engine configured to generate a modified visual representation of the environment.

Abstract: A server that includes a graphics processing unit (GPU) may receive, from a first application that is remote from the server, a first request to reserve a first number of cores of the GPU for a first amount of time. The server may also receive, from a second application that is also remote from the server, a second request to reserve a second number of cores of the GPU for a second amount of time that at least partly overlaps the first amount of time. The server may determine that the first request is associated with a higher priority than the second request and, in response, may reserve the first number of cores for the first amount of time for the first application. The server may send, to the first application, an indication that the first number of cores have been reserved as requested by the first application.

Abstract: A method and system for generating and shading a computer graphics image in a tile based computer graphics system is provided. Geometry data is supplied and a plurality of primitives are derived from the geometry data. One or more modified primitives are then derived from at least one of the plurality of primitives. For each of a plurality of tiles, an object list is derived including data identifying the primitive from which each modified primitive located at least partially within that tile is derived. Alternatively, the object list may include data identifying each modified primitive located at least partially within that tile. Each tile is then shaded for display using its respective object list.

Abstract: There is provided a graphics processor comprising a programmable execution unit operable to execute programs for respective execution thread groups. An eviction checking circuit is provided that is configured to check instructions as they are being fetched for execution from an instruction cache to determine whether the instruction includes any conditional eviction conditions that if not met indicate that the program to which the instruction relates should not continue to be executed for the group of execution threads. The eviction checking circuit is then configured to check whether any conditional eviction conditions are satisfied at this point and either allow the execution unit to continue program execution or cause the thread group to be evicted.

Abstract: A graphics processing unit having multiple groups of processor cores for rendering graphics data for allocated tiles and outputting the processed data to regions of a memory resource. Scheduling logic allocates sets of tiles to the groups of processor cores to perform a first render, and at a time when at least one of the groups has not completed processing its allocated sets of one or more tiles as part of the first render, allocates at least one set of tiles for a second render to one of the other groups of processor cores for processing. Progress indication logic indicates progress of the first render, indicating regions of the memory resource for which processing for the first render has been completed. Progress check logic checks the progress indication in response to a request for access to a region of the memory resource as part of the second render and enables access that region of the resource in response to an indication that processing for the first render has been completed for that region.

Abstract: Techniques are disclosed relating to using cost estimates for portions of a graphics frame to schedule graphics rendering tasks. In some embodiments, a processor generates a first set of cost estimates for respective different portions of a frame for a first render and a second set of cost estimates for respective different portions of a frame for a second render. In some embodiments, the processor compares the first set of cost estimates with the second set of cost estimates. In response to an output of the comparison meeting a first threshold level of similarity, the graphics processor may use one or more portions of the frame generated by the first render for the second render instead of performing the second render for the one or more portions.

Abstract: Techniques for improving performance of accelerated processing devices (“APDs”) when exceptions occur are provided. In APDs, the very large number of parallel processing execution units, and the complexity of the hardware used to execute a large number of work-items in parallel, means that APDs typically stall when an exception occurs (unlike in central processing units (“CPUs”), which are able to execute speculatively and out-of-order). However, the techniques provided herein allow at least some execution to occur past exceptions. Execution past an exception generating instruction occurs by executing instructions that would not lead to a corruption while skipping those that would lead to a corruption. After the exception has been satisfied, execution occurs in a replay mode in which the potentially exception-generating instruction is executed and in which instructions that did not execute in the exception-wait mode are executed. A mask and counter are used to control execution in replay mode.

Abstract: A device configured to execute a plurality of operating systems, including a display configured to display a screen corresponding to an active operating system among the plurality of operating systems; and a controller configured to control the display to display an operation screen of the active operating system on the display when the active operating system is activated and to display an operation screen of a secondary operating system on the display when the device receives a user input according to a predetermined interface for switching from the active operating system to the secondary operating system.

Abstract: A data conversion method, a display method, a data conversion device and a display device. The data conversion method includes: performing data reorganization on original pixel data corresponding to at least one row of pixels in a display panel to obtain reorganized pixel data. In any data channel, the performing data reorganization on original pixel data corresponding to at least one row of pixels in a display panel to obtain reorganized pixel data includes: a first reorganized part in the n-th reorganized pixel data set consists of a first original part in the (n-1)-th original pixel data set, and a second reorganized part in the n-th reorganized pixel data set consists of a second original part in the n-th original pixel data set, wherein n is an integer satisfying 1<n?N, and N is an integer greater than 1.

Abstract: The disclosure provides a method for controlling a camera module. The camera module is removable between a first position received in a body of the electronic device and a second position exposed from the body. The method includes: driving the camera module to slide to the second position based on a call request on the camera module sent by a camera application, in response to the camera application running in a system foreground; determining whether a current application is a preset application, in response to an application in the system foreground switching from the camera application to the current application; determining whether receiving a call request on the camera module sent by the current application in response to the current application being the preset application; and maintaining the camera module in the second position within a preset duration, in response to not receiving the call request.

Abstract: Apparatuses including general-purpose graphics processing units and graphics multiprocessors that exploit queues or transitional buffers for improved low-latency high-bandwidth on-die data retrieval are disclosed. In one embodiment, a graphics multiprocessor includes at least one compute engine to provide a request, a queue or transitional buffer, and logic coupled to the queue or transitional buffer. The logic is configured to cause a request to be transferred to a queue or transitional buffer for temporary storage without processing the request and to determine whether the queue or transitional buffer has a predetermined amount of storage capacity.

Abstract: When processing graphics primitives in a graphics processing system, the render output is divided into a plurality of regions for rendering, each region comprising a respective area of the render output. It is determined for which of the plurality of regions of the render output a primitive should be rendered for. Associated state data for rendering the primitive is stored in a “state data” data structure in memory. For each region of the render output it is determined the primitive should be rendered for, a reference to the associated state data for rendering the primitive is stored in a respective, different data structure for each different region of the render output it is determined the primitive should be rendered for.

Abstract: Generating context switching locations for compiler-assisted context switching. A set of possible locations is determined for preferred preemption points in a set of threads based on (i) an identification of a set of candidate markers for preferred preemption points and (ii) a type of characteristic that is associated with a possible location included in the set of possible locations. A modified set of possible locations is generated in a data structure based on the type of characteristic, wherein the modified set of possible locations indicate one or more preferred preemption points in the set of threads.

Abstract: A graphics processing unit (GPU) utilizes block general purpose registers (bGPRs) to load multiple waves of samples for an instruction group into a processing pipeline and receive processed samples from the pipeline. The GPU acquires a credit for the bGPR for execution of the instruction group for a first wave using a persistent GPR and the bGPR. The GPU refunds the credit upon loading the first wave into the pipeline. The GPU executes a subsequent wave for the instruction group to load samples to the pipeline when at least one credit is available and the pipeline is processing the first wave. The GPU stores an indication of each wave that has been loaded into the pipeline in a queue. The GPU returns samples for a next wave in the queue from the pipeline to the bGPR for further processing when the physical slot of the bGPR is available.

Abstract: Methods, systems, and apparatus, including computer-readable media, are described for performing vector reductions using a shared scratchpad memory of a hardware circuit having processor cores that communicate with the shared memory. For each of the processor cores, a respective vector of values is generated based on computations performed at the processor core. The shared memory receives the respective vectors of values from respective resources of the processor cores using a direct memory access (DMA) data path of the shared memory. The shared memory performs an accumulation operation on the respective vectors of values using an operator unit coupled to the shared memory. The operator unit is configured to accumulate values based on arithmetic operations encoded at the operator unit. A result vector is generated based on performing the accumulation operation using the respective vectors of values.

Abstract: Apparatus and methods related to software architectures in a multiprocessor-based access device used in a content delivery and/or service provider network. In one embodiment, a software architecture is provided for a cable modem using a first type of digital processor (e.g., RISC core or similar), and a second type of digital processor (e.g., multi-core CPU). In one variant, the RISC processor is used as a cable modem stack processor, and the CPU processor is used as an application processor. A Linux (e.g., OpenWrt)-based software architecture is used wherein software components placed on both processors can communicate to effectuate, e.g., configuration changes to the device (including the cable modem stack). A mechanism to establish communications between the two different processor domains and retrieve the requested information based on existing (e.g., RPC) protocols is also disclosed.

Abstract: Systems, apparatuses, and methods for enabling indirect chaining of command buffers are disclosed. A system includes at least first and second processors and a memory. The first processor generates a plurality of command buffers and stores the plurality of command buffers in the memory. The first processor also generates and stores, in the memory, a table with entries specifying addresses of the plurality of command buffers and an order in which to process the command buffers. The first processor conveys an indirect buffer packet to the second processor, where the indirect buffer packet specifies a location and a size of the table in the memory. The second processor retrieves an initial entry from the table, processes a first command buffer at the address specified in the initial entry, and then returns to the table for the next entry upon completing processing of the first command buffer.

Abstract: A graphics processing apparatus includes a tessellation circuit and a post-processing circuit. The tessellation circuit performs tessellation processing to subdivide a patch in an image frame into a plurality of triangles. The tessellation circuit further performs triangle striping processing to convert data of the plurality of triangles into data of a triangle strip. The post-processing circuit performs subsequent processing on the data of the triangle strip.

Abstract: A graphics processing system having a rendering space divided into a plurality of tiles. The system comprises geometry processing logic and rasterization logic. The geometry processing logic is configured to generate transformed position data for each of a plurality of untransformed primitives based on untransformed geometry data associated therewith; group the plurality of untransformed primitives into a plurality of primitive blocks; and generate an untransformed display list for each tile based on the transformed position data. Each untransformed display list comprises: (i) information identifying each untransformed primitive block that comprises at least one untransformed primitive that, when transformed, falls at least partially with the tile; and (ii) for each identified untransformed primitive bock, information identifying the untransformed primitives or transformed primitives related to that untransformed primitive block relevant for rendering the tile.

Abstract: Methods, systems, and computer-readable media for virtualizing graphics processing in a provider network are disclosed. A virtual compute instance is provisioned from a provider network. The provider network comprises a plurality of computing devices configured to implement a plurality of virtual compute instances with multi-tenancy. A virtual GPU is attached to the virtual compute instance. The virtual GPU is implemented using a physical GPU, and the physical GPU is accessible to the virtual compute instance over a network. An application is executed using the virtual GPU on the virtual compute instance. Executing the application generates virtual GPU output that is provided to a client device.

Abstract: Methods, systems, and devices for processing are described. A device may parse a set of layers of a deep neural network. The set of layers may be associated with a set of machine learning operations of the deep neural network. The device may determine one or more layer parameters based on the determined set of layers. In some aspects, the device may determine an execution time associated with executing a shader dispatch based on the one or more layer parameters. The device may batch the shader dispatch to a command buffer based on the execution time and process the command buffer based on the batching. The device may determine a target execution time based on an assembly time associated with the command buffer, a processing time associated with the command buffer, a frequency level associated with processing the command buffer, the one or more layer parameters, or some combination thereof.

Abstract: Disclosed herein are system, method, and computer program product embodiments for providing a dashboard user interface design and integration system. An embodiment operates by receiving a request to generate an interface associated with a data source and establishing a connection with the data source to receive data from the data source. An indication of a component to be displayed on the interface is received and the interface is generated. The interface includes the component and is coupled to the data source.

Abstract: Various examples are disclosed for dynamic kernel slicing for virtual graphics processing unit (vGPU) sharing in serverless computing systems. A computing device is configured to provide a serverless computing service, receive a request for execution of program code in the serverless computing service in which a plurality of virtual graphics processing units (vGPUs) are used in the execution of the program code, determine a slice size to partition a compute kernel of the program code into a plurality of sub-kernels for concurrent execution by the vGPUs, the slice size being determined for individual ones of the sub-kernels based on an optimization function that considers a load on a GPU, determine an execution schedule for executing the individual ones of the sub-kernels on the vGPUs in accordance with a scheduling policy, and execute the sub-kernels on the vGPUs as partitioned in accordance with the execution schedule.

Abstract: A video server is configured to provide streaming video to players of computer games over a computing network. The video server can provided video of different games to different players simultaneously. This is accomplished by rendering several video streams in parallel using a single GPU (Graphics Processing Unit). The output of the GPU is provided to graphics processing pipelines that are each associated with a specific client/player and are dynamically allocated as needed. A client qualifier may be used to assure that only clients capable of presenting the streaming video to a player at a minimum level of quality receive the video stream. Video frames provided by the video server optionally include overlays added to the output of the GPU. These overlays can include voice data received from another game player.

Abstract: A terminal, comprising at least two front cameras located behind a display panel, wherein an area corresponding to a position of the at least one camera on the display panel is a first area, and other than the first area on the display panel is a second area, wherein each pixel unit of the first area and the second area respectively comprises a transparent portion and a non-transparent portion and a proportion of the transparent portion in the first area is greater than that of the second area. The terminal further comprises a processor configured to obtain N pictures taken by the at least two cameras, and process the N pictures by complementing the occluded areas based on pictures taken by the at least two cameras to obtain a picture in which the occluded area is completely or partially recovered.

Abstract: The disclosure is directed to systems and methods for local rendering of 3D models which are then accessed by remote computers. The advantage of the system is that extensive hardware needed for rendering complex 3D models is centralized and can be accessed by smaller remote computers without and special hardware or software installation. The system also provides enhanced security as model data can be restricted to a limited number of servers instead of stored on individual computers.

Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.

Abstract: A method comprises obtaining a first plurality of render commands comprising at least a geometry stage and a fragment stage. An identification may be made as to which of the geometry stages of the first plurality of render commands are idempotent. Dependency information is determined for the first plurality of render commands, e.g., identifying and labeling both “true” and “artificial” dependencies between the stages of the commands. The first plurality of render commands may be encoded and executed by a graphics processing unit (GPU) according to a labeled execution graph generated based on the dependency information. During execution, the GPU may attempt to “opportunistically” launch at least one identified idempotent geometry stage command for which at least one artificial barrier still remains. If the opportunistically-launched geometry stage work fails, the work may be discarded, and the method may wait until all barriers have been met before attempting to relaunch it.

Abstract: Methods and systems for performing automated keyboard mapping for virtual desktops are described herein. A system may generate a keyboard mapping table containing a plurality of keyboard inputs. The system may simulate a keyboard input locally at the system and using a virtual desktop hosted by a remote desktop platform to generate keyboard simulation outputs in response to a first keyboard input. In response to determining a discrepancy between the keyboard simulation outputs, the system may modify a key value in the keyboard mapping table resulting in a corrected keyboard mapping table, where the key value corresponds to the first keyboard input. In response to receiving a second keyboard input, the system may apply the corrected keyboard mapping table to display a keyboard output at the virtual desktop hosted by the remote desktop platform, where the second keyboard input has the same key value as the first keyboard input.

Abstract: A method, an apparatus, a medium, a terminal, and a device for processing multi-angle free-perspective data are disclosed. The method includes: acquiring a data header file; determining a defined format of a data file according to a parsing result of the data header file; reading and obtaining a data combination from the data file based on the defined format, where the data combination includes pixel data and depth data of multiple synchronized images, and the multiple synchronized images have different perspectives with respect a to-be-viewed area, and pixel data and depth data of each image of the multiple synchronized images has an association relationship; and performing image or video reconstruction of a virtual viewpoint according to the read data combination, where the virtual viewpoint is selected from a multi-angle free-perspective range, and the multi-angle free-perspective range is a range supporting virtual viewpoint switching viewing of the to-be-viewed area.

Abstract: A method comprises: determining whether an event triggering processing of data at a storage device occurs, the data being predetermined to be processed at a computing device associated with the storage device; in response to determining that the event occurs, determining available resources of the storage device; and in response to an amount of the available resources exceeding a first predetermined threshold, causing the storage device to process the data and provide the processed data to the computing device. As such, operations to be performed to data may be adaptively allocated, deployed and adjusted on the storage device and the computing device, so that computing capabilities of both the storage device and the computing device may be fully leveraged, and further the computing efficiency of the entire data processing system may be improved.

Abstract: Aspects of the disclosure relate to voice-based time-sensitive task processing over a high generation cellular network. A computing platform may establish a communication channel with a computing device. The computing platform may authenticate a user of the computing device, where the user is authorized to access the enterprise server. Then, the computing platform may detect, via the communication interface, a voice-based interaction from the authenticated user. The computing platform may cause the voice-based interaction to be captured as audio data. Subsequently, the computing platform may transform the audio data to textual data. The computing platform may analyze the textual data to identify a time-sensitive task related to an entity. Then, the computing platform may generate, based on the identified time-sensitive task, one or more instructions to execute the time-sensitive task.

Abstract: A circuit device (100) includes a coordinate transform circuit (20) and a mapping processing circuit (30). The coordinate transform circuit (20) performs coordinate transformation from an input coordinate (IXY1) to an output coordinate (QXY1). The mapping processing circuit (30) generates a second image (IMG2) to be displayed in a display panel for displaying an image in a curved screen display by performing mapping processing on a first image (IMG1) that is input based on the output coordinate (QXY1). The coordinate transform circuit (20) performs the coordinate transformation from the input coordinate (IXY1) to the output coordinate (QXY1) by performing computation processing using a second or more order polynomial representing the coordinate transformation.

Abstract: Method, system, and computer readable medium for processing graphics using an OpenGL Embedded Systems Application Programming Interface (Open GLES API) include: decoding a source graphic to generate a graphic object, where the graphic object includes a set of index values and a color palette; providing the graphic object to a Graphical Processing Unit (GPU) through the Open GLES API, including providing the set of index values in a first acceptable graphic format of the Open GLES API to the GPU, and providing the color palette in a second acceptable graphic format of the Open GLES API to the GPU; and triggering the GPU to render the source graphic according to the set of index values received in the first acceptable graphic format of Open GLES API and the palette received in the second acceptable graphic format of Open GLES API.

Abstract: The present invention relates to a method for decoding a video signal, comprising the steps of: acquiring a transform size flag of the current macroblock from a video signal; checking the number of non-zero transform coefficients at each pixel position in a first transform block which corresponds to the transform size flag; changing a scan order of the first transform block by prioritizing the position of the pixel having the greatest number of the non-zero transform coefficients in the first transform block; determining the number of the non-zero transform coefficients at each pixel position in a second transform block, and setting the changed scan order of the first transform block as an initialized scan order of the second transform block; adding the number of the non-zero transform coefficients at each pixel position in the first transform block and the number of the non-zero transform coefficients at each pixel position in the second transform block, and changing the scan order of the second transform bl

Abstract: A video encoding apparatus includes a data buffer and a video encoding circuit. Encoding of a first frame includes: deriving reference pixels of a reference frame from reconstructed pixels of the first frame, respectively, and storing reference pixel data into the data buffer for inter prediction, wherein the reference pixel data include information of pixel values of the reference pixels. Encoding of a second frame includes performing prediction upon a coding unit in the second frame to determine a target predictor for the coding unit. The prediction performed upon the coding unit includes: checking if a search range on the reference frame for finding a predictor of the coding unit under an inter prediction mode includes at least one reference pixel of the reference frame that is not accessible to the video encoding circuit, and determining the target predictor for the coding unit according to a checking result.

Abstract: Embodiments are directed to managing display hardware for visualizing data a network computer. A modeling engine may provide a data model includes a plurality of data objects and a display model that includes a plurality of display objects that may be based on the plurality of data objects. Action objects may be associated with display objects in the display model. A display engine may display the display model on a hardware display based on context information that includes performance characteristics of the hardware display. In response to a trigger events, action objects may be displayed on the hardware display based on the context information. In response to detecting input signals associated with the action objects the display model may be modified based on the action objects. The modified display model may be displayed on the hardware display based on the context information.