Computer Graphic Processing System Patents (Class 345/501)
  • Patent number: 12033237
    Abstract: One embodiment provides for a graphics processing unit to perform computations associated with a neural network, the graphics processing unit comprising a hardware processing unit having a dynamic precision fixed-point unit that is configurable to convert elements of a floating-point tensor to convert the floating-point tensor into a fixed-point tensor.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: July 9, 2024
    Assignee: Intel Corporation
    Inventors: Naveen K. Mellempudi, Dheevatsa Mudigere, Dipankar Das, Srinivas Sridharan
  • Patent number: 12019498
    Abstract: An optimized power saving technique is described for a processor, such as, for example, a graphic processing unit (GPU), which includes one or more processing cores and at least one data link interface. According to the technique, the processor is operable in a low power mode in which power to the at least one processing core is off and power to the at least one data link interface is on. This technique provides reduced exit latencies compared to currently available approaches in which the core power is turned off.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: June 25, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Thomas E. Dewey, Narayan Kulshrestha, Ramachandiran V, Sachin Idgunji, Lordson Yue
  • Patent number: 12002132
    Abstract: Various implementations disclosed herein include devices, systems, and methods that use an analytic approach to determine signed distance field (SDF) representations that represent one or more curves (e.g., glyphs that represent text) and cache the SDF representations for reuse in rendering the curves in similar rendering conditions. For example, the SDF representation may be re-used, based on determining that text is going to occupy a similar-sized portion of the device's display in multiple views. An SDF representation is recalculated if different conditions (e.g., substantial zooming in on the text) occur in different views.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: June 4, 2024
    Assignee: Apple Inc.
    Inventors: Tobias Eble, William J. Dobbie
  • Patent number: 11989555
    Abstract: Disclosed embodiments relate to atomic memory operations. In one example, a method of executing an instruction atomically and with weak order includes: fetching, by fetch circuitry, the instruction from code storage, the instruction including an opcode, a source identifier, and a destination identifier, decoding, by decode circuitry, the fetched instruction, selecting, by a scheduling circuit, an execution circuit among multiple circuits in a system, scheduling, by the scheduling circuit, execution of the decoded instruction out of order with respect to other instructions, with an order selected to optimize at least one of latency, throughput, power, and performance, and executing the decoded instruction, by the execution circuit, to: atomically read a datum from a location identified by the destination identifier, perform an operation on the datum as specified by the opcode, the operation to use a source operand identified by the source identifier, and write a result back to the location.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: May 21, 2024
    Assignee: Intel Corporation
    Inventors: Doddaballapur N. Jayasimha, Jonas Svennebring, Samantika S. Sury, Christopher J. Hughes, Jong Soo Park, Lingxiang Xiang
  • Patent number: 11968471
    Abstract: Embodiments relate to extracting features from images, such as by identifying keypoints and generating keypoint descriptors of the keypoints. An apparatus includes a pyramid image generator circuit, a keypoint descriptor generator circuit, and a pyramid image buffer. The pyramid image generator circuit generates an image pyramid from an input image. The keypoint descriptor generator circuit processes the pyramid images for keypoint descriptor generation. The pyramid image buffer stores different portions of the pyramid images generated by the pyramid image generator circuit at different times and provides the stored portions of the pyramid images to the keypoint descriptor generator circuit for keypoint descriptor generation. When first portions of the pyramid images are no longer needed for the keypoint descriptor generation, the first portions are removed from the pyramid image buffer to provide space for second portions of the pyramid images that are needed for the keypoint descriptor generation.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: April 23, 2024
    Assignee: APPLE INC.
    Inventors: David R. Pope, Liran Fishel, Assaf Metuki, Muge Wang
  • Patent number: 11947977
    Abstract: Embodiments are generally directed to a system and method for adapting executable object to a processing unit. An embodiment of a method to adapt an executable object from a first processing unit to a second processing unit, comprises: adapting the executable object optimized for the first processing unit of a first architecture, to the second processing unit of a second architecture, wherein the second architecture is different from the first architecture, wherein the executable object is adapted to perform on the second processing unit based on a plurality of performance metrics collected while the executable object is performed on the first processing unit and the second processing unit.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: April 2, 2024
    Assignee: INTEL CORPORATION
    Inventors: Li Xu, Haihao Xiang, Feng Chen, Travis Schluessler, Yuheng Zhang, Sen Lin
  • Patent number: 11899897
    Abstract: An electronic device may include a display, a communication circuit, a processor operatively connected to the display and the communication circuit, and a memory operatively connected to the processor, wherein the memory may store instructions which, when executed, cause the processor to: receive information relating to at least one application installed in an external electronic device from the external electronic device through the communication circuit; configure, on the basis of the received information, the at least one application as a remote control application controlled by the electronic device; receive a notification message related to the remote control application from the external electronic device through the communication circuit; and display, on the display, a first object indicating reception of the notification message. Various other embodiments are also possible.
    Type: Grant
    Filed: September 6, 2022
    Date of Patent: February 13, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hojun Jaygarl, Kihoon Nam, Seungseok Kang
  • Patent number: 11900837
    Abstract: A method for operating an electronic device having a display panel is provided. The display panel has a first region and a second region, in which the first region is out of a case, and the second region is capable of being shielded by the case. First, a first image is displayed in the first region. Then, a second image is displayed in the second region at a first time point when the second region is shielded by the case. After that, the second region out of the case is moved at a second time point, in which the first time point is not later than the second time point.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: February 13, 2024
    Assignee: InnoLux Corporation
    Inventor: Yuan-Lin Wu
  • Patent number: 11900814
    Abstract: An autonomous vehicle is described herein. The autonomous vehicle comprises a first sensor and a second sensor having limited fields of view, an articulation system, and a computing system. The computing system determines a first region and a second region external to the autonomous vehicle based on a sensor prioritization scheme comprising a ranking of regions surrounding the autonomous vehicle. The computing system then causes the articulation system to orient the first sensor towards the first region and the second region towards the second region. Responsive to receiving a sensor signal from the first sensor indicating that an object has entered a field of view of the first sensor, the computing system determines a third region having a higher ranking than the second region within the sensor prioritization scheme. The computing system then causes the articulation system to orient the second sensor towards the third region.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: February 13, 2024
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Elliot Branson, Eric Lujan, Benjamin Earle Weinstein-Raun
  • Patent number: 11877214
    Abstract: A method, apparatus and system for social networking is provided. In an embodiment, the system comprises a plurality of mobile devices that can directly connect to each other via a peer-to-peer connection. The devices can additionally connect to a server. The server maintains a profile schema which can be used to generate profiles for users for each of the mobile devices. Electronic devices are paired based on a shared key maintained in an application loaded on the first electronic device and the second electronic device.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: January 16, 2024
    Assignee: Flybits Inc.
    Inventor: Hossein Rahnama
  • Patent number: 11874663
    Abstract: A system and method for an on-demand shuttle, bus, or taxi service able to operate on private and public roads provides situational awareness and confidence displays. The shuttle may include ISO 26262 Level 4 or Level 5 functionality and can vary the route dynamically on-demand, and/or follow a predefined route or virtual rail. The shuttle is able to stop at any predetermined station along the route. The system allows passengers to request rides and interact with the system via a variety of interfaces, including without limitation a mobile device, desktop computer, or kiosks. Each shuttle preferably includes an in-vehicle controller, which preferably is an AI Supercomputer designed and optimized for autonomous vehicle functionality, with computer vision, deep learning, and real time ray tracing accelerators. An AI Dispatcher performs AI simulations to optimize system performance according to operator-specified system parameters.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: January 16, 2024
    Assignee: NVIDIA Corporation
    Inventors: Gary Hicok, Michael Cox, Miguel Sainz, Martin Hempel, Ratin Kumar, Timo Roman, Gordon Grigor, David Nister, Justin Ebert, Chin-Hsien Shih, Tony Tam, Ruchi Bhargava
  • Patent number: 11862125
    Abstract: On an electronic device which includes a display device comprising a display driving circuit, a processor, and a memory a method for changing a refresh rate of the display device includes: changing at least one of a first parameter, a second parameter, or a third parameter in response to identifying the occurrence of at least one of a scan rate change request or a change in scan rate change restriction, and applying the changed parameter among the first parameter, the second parameter, and the third parameter. The first parameter is the frequency of a first synchronization signal generated in the display driving circuit, the second parameter is the increase or decrease in a blank area to substitute for a portion of active video area in frame information, and the third parameter is the frequency of a second synchronization signal for rendering.
    Type: Grant
    Filed: February 2, 2023
    Date of Patent: January 2, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gwanghui Lee, Minwoo Lee, Minwoo Kim, Seungjin Kim, Woojun Jung
  • Patent number: 11847719
    Abstract: An apparatus and method are described for managing data which is biased towards a processor or a GPU. For example, an apparatus comprises a processor comprising one or more cores, one or more cache levels, and cache coherence controllers to maintain coherent data in the one or more cache levels; a graphics processing unit (GPU) to execute graphics instructions and process graphics data, wherein the GPU and processor cores are to share a virtual address space for accessing a system memory; a GPU memory addressable through the virtual address space shared by the processor cores and GPU; and bias management circuitry to store an indication for whether the data has a processor bias or a GPU bias, wherein if the data has a GPU bias, the data is to be accessed by the GPU without necessarily accessing the processor's cache coherence controllers.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: December 19, 2023
    Assignee: Intel Corporation
    Inventors: Joydeep Ray, Abhishek R. Appu, Altug Koker, Balaji Vembu
  • Patent number: 11836906
    Abstract: An object of the present invention is to achieve both suppression of data amount of an image processing system that learns a collation image to be used for image identification using a discriminator and improvement of identification performance of the discriminator. In order to achieve the above object, there is proposed an image processing system including a discriminator that identifies an image using a collation image, the image processing system further including a machine learning engine that performs machine learning of collation image data required for image identification. The machine learning engine searches for a successfully identified image using an image for which identification has been failed, and adds information, obtained based on a partial image of the image for which identification has been failed and which has been selected by an input device to the successfully identified image obtained by the search to generate corrected collation image data.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: December 5, 2023
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Shinichi Shinoda, Yasutaka Toyoda, Shigetoshi Sakimura, Masayoshi Ishikawa, Hiroyuki Shindo, Hitoshi Sugahara
  • Patent number: 11830399
    Abstract: A multi-channel voltage sensing circuit for pixel compensation includes a plurality of channel circuits arranged for multiple channels; and a first dummy channel circuit and a second dummy channel circuit disposed among the plurality of channel circuits with some channel circuits interposed therebetween, wherein the first dummy channel circuit and the second dummy channel circuit receive a first reference voltage of a fixed level, and provide electrical coupling to adjacent channel circuits.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: November 28, 2023
    Assignee: LX SEMICON CO., LTD.
    Inventors: Taiming Piao, Won Kim, Seong Geon Kim, Young Ho Shin, Byeon Cheol Lee
  • Patent number: 11831945
    Abstract: In a digital contents receiver for receiving transmitted digital contents, the digital contents include at least component information indicating an element which constitutes a program of the contents. When the component information indicates that the received digital contents are a 3D component, it is determined whether a display part corresponds to display of the 3D component. If the display part corresponds to display of the 3D component, the received digital contents are displayed in 3D.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: November 28, 2023
    Assignee: Maxell, Ltd.
    Inventors: Sadao Tsuruga, Satoshi Otsuka
  • Patent number: 11804195
    Abstract: The disclosure provides a display equipment, a brightness compensation device, and a brightness compensation method. The brightness compensation device includes a variable refresh rate (VRR) detection circuit and a control circuit. The VRR detection circuit and the control circuit receive a video stream from a video source device, and the video stream includes a VRR video frame. The VRR detection circuit detects a blanking period of the VRR video frame and generates a detection result. The control circuit outputs the frame data of the VRR video frame to the display device during the valid data period of the VRR video frame. The control circuit repeatedly outputs the frame data of the VRR video frame to the display device during the blanking period of the VRR video frame according to the detection result until the blanking period ends.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: October 31, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventors: Po-Hsiang Huang, Chia-Hsing Hou, Yu-Lin Cheng, Chung-Wen Wu
  • Patent number: 11798536
    Abstract: A computer-implemented method, a computer system and a computer program product annotate media files with convenient pause points. The method includes acquiring a text file version of an audio narration file. The text file version includes a pause point history of a plurality of prior users. The method also includes generating a list of pause points based on the pause point history. In addition, the method includes determining a tone of voice being used by a speaker at each pause point using natural language processing algorithms. The method further includes determining a set of convenient pause points based on the list of pause points and the determined tone of voice. Lastly, the method includes inserting the determined set of convenient pause points into the audio narration file.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: October 24, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan Asghar, Belinda Marie Vennam
  • Patent number: 11792473
    Abstract: Techniques are described for expanding and/or improving the Advanced Television Systems Committee (ATSC) 3.0 television protocol in robustly delivering the next generation broadcast television services. Multiple memory buffers are used to manage broadcast packet repair and presentation or storage.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: October 17, 2023
    Assignee: Sony Group Corporation
    Inventors: Brant Candelore, Adam Goldberg, Fred Ansfield, Graham Clift, Loren F. Pineda
  • Patent number: 11778462
    Abstract: Systems, methods, and apparatuses disclose an electronic greeting card application for creating, editing, distributing, and viewing electronic greeting cards on a portable computing device, wherein the electronic greeting card displays animations and permits users to customize the card by way of adding a message, signature, photo, and sound recording.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: October 3, 2023
    Assignee: American Greetings Corporation
    Inventors: Brian Stanek, Zachary Paladino, Phil Peron, David Noyes, Kathy D′Amato, David Chiang, Robert A. Matousek
  • Patent number: 11776085
    Abstract: A processing system includes a graphics pipeline that executes a first shader of a first type and a second shader of a second type. In some cases, the first shader is a geometry shader and the second shader is a pixel shader. The processing system also includes buffers that hold primitives generated by the first shader and provide the primitives to the second shader. The processing system also includes a primitive hub that monitors fullness of the buffers. Launching of waves from the first shader is throttled based on the fullness of the buffers. A shader processor input (SPI) selectively throttles the waves launched by the geometry shader based on a signal from the primitive hub indicating the fullness, an indication of relative resource usage of geometry waves and pixel waves in the graphics pipeline, or an indication of lifetimes of the geometry waves.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: October 3, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Nishank Pathak, Randy Wayne Ramsey, Tad Litwiller, Rex Eldon McCrary
  • Patent number: 11740463
    Abstract: Example methods, apparatuses and systems are disclosed for providing a device for capturing a barcode image within an augmented reality environment. An example method includes detecting a target object within a field of view of an augmented reality viewing device. The method further includes rendering an image of a scanning device within the field of view of the augmented reality viewing device, and rendering a scanning area within the field of view of the augmented reality viewing device. Further, a camera associated with the augmented reality viewing device captures an image of a barcode located on the target object. Corresponding apparatuses, systems, and computer program products are also provided.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: August 29, 2023
    Assignee: HAND HELD PRODUCTS, INC.
    Inventor: Erik Todeschini
  • Patent number: 11704546
    Abstract: An apparatus for, by inputting data to a hierarchical neural network and performing operation processing in each layer of the network, calculating a feature plane in the layer, comprises an operation unit, a feature plane holding unit including at least one memory that holds a feature plane to be processed, a unit configured to control to arrange the feature plane in the memory based on network information as information about each layer undergoing the operation processing and to manage reading/writing from/in the memory, and a processor configured to access, via a bus, the feature plane holding unit which is address-mapped in a memory space. The processor calculates, based on the network information, an address address-mapped in the memory space, reads out the feature plane, and processes the feature plane.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: July 18, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Shiori Wakino
  • Patent number: 11693667
    Abstract: Systems and methods are provided for efficiently performing processing intensive operations, such as those involving large volumes of data, that enable accelerated processing time of these operations. In at least one embodiment, a system includes a graphics processor unit (GPU) including a memory and a plurality of cores. The plurality of cores perform a plurality of data analytics operations on a respectively allocated portion of a dataset, each of the plurality of cores using only the memory to store data input for each of the plurality of data analytics operations performed by the plurality of cores. The data storage for the plurality of data analytics operations performed by the plurality of cores is also provided solely by the memory.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: July 4, 2023
    Assignee: NVIDIA Corporation
    Inventors: Joshua Patterson, Leeann Chau Tuyet Dang, Keith Jason Kraus, Allan Rabbitt Enemark, Frank Joseph Eaton, Bradley Stuart Rees, Michael Evan Wendt, Mark Jason Harris
  • Patent number: 11682100
    Abstract: In various examples, a signal processing pipeline is dynamically generated or instantiated for a signal processing request. To generate the pipeline, a graph topology—including nodes and edges—may be created to represent features, functionality, and characteristics of a signal processing system. The nodes, representing processing tasks, may be connected via edges having associated costs for performing, by a node, a processing task on an output of a prior or edge-connected node. For a given signal processing request, the nodes or processing tasks to be included may be selected and, using a graph routing algorithm and the costs between and among the determined nodes, a path through the nodes may be determined—thereby defining, at least in part, the signal processing pipeline.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: June 20, 2023
    Assignee: NVIDIA Corporation
    Inventors: David Schalig, Karsten Patzwaldt
  • Patent number: 11669329
    Abstract: Embodiments described herein provide for an instruction and associated logic to enable a vector multiply add instructions with automatic zero skipping for sparse input. One embodiment provides for a general-purpose graphics processor comprising logic to perform operations comprising fetching a hardware macro instruction having a predicate mask, a repeat count, and a set of initial operands, where the initial operands include a destination operand and multiple source operands. The hardware macro instruction is configured to perform one or more multiply/add operations on input data associated with a set of matrices.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: June 6, 2023
    Assignee: Intel Corporation
    Inventors: Supratim Pal, Sasikanth Avancha, Ishwar Bhati, Wei-Yu Chen, Dipankar Das, Ashutosh Garg, Chandra S. Gurram, Junjie Gu, Guei-Yuan Lueh, Subramaniam Maiyuran, Jorge E. Parra, Sudarshan Srinivasan, Varghese George
  • Patent number: 11669933
    Abstract: One embodiment provides for a graphics processing unit to perform computations associated with a neural network, the graphics processing unit comprising a hardware processing unit having a dynamic precision fixed-point unit that is configurable to quantize elements of a floating-point tensor to convert the floating-point tensor into a dynamic fixed-point tensor.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: June 6, 2023
    Assignee: Intel Corporation
    Inventors: Naveen K. Mellempudi, Dheevatsa Mudigere, Dipankar Das, Srinivas Sridharan
  • Patent number: 11630629
    Abstract: A multi-screen display control device is shown, which is linked to a host through a universal serial bus (USB) port to receive image data from the host, and uses a plurality of high-definition multimedia interface (HDMI) ports to output a plurality of HDMI sub-images to a plurality of screens. The multi-screen display control device has a USB hub that couples the USB port to a plurality of graphics processing units (GPUs), so that the GPUs generate the HDMI sub-images based on the image data transferred from the host via USB communication technology.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: April 18, 2023
    Assignee: SILICON MOTION, INC.
    Inventors: Chengliang Qi, Guangjun Lyu, Cong Li
  • Patent number: 11609791
    Abstract: A first workload is executed in a first subset of pipelines of a processing unit. A second workload is executed in a second subset of the pipelines of the processing unit. The second workload is dependent upon the first workload. The first and second workloads are suspended and state information for the first and second workloads is stored in a first memory in response to suspending the first and second workloads. In some cases, a third workload executes in a third subset of the pipelines of the processing unit concurrently with executing the first and second workloads. In some cases, a fourth workload is executed in the first and second pipelines after suspending the first and second workloads. The first and second pipelines are resumed on the basis of the stored state information in response to completion or suspension of the fourth workload.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: March 21, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Anirudh R. Acharya, Michael Mantor
  • Patent number: 11600211
    Abstract: An image display apparatus includes: a housing; a display for displaying an image; a driving unit configured to change a size of a display area exposed to the outside of the housing among an entire area of the display; and a controller, wherein the controller determines whether an image displayed through at least a portion of the display area is a static image, when the size of the display area is smaller than the size of the entire area, determines whether the image is displayed for a certain time or longer, when the image is the static image, controls the driving unit to change the size of the display area, when the image is displayed for the certain time or longer, and controls the display so that the image is displayed in response to a degree of change in the size of the display area.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: March 7, 2023
    Assignee: LG ELECTRONICS INC.
    Inventor: Hyoyeong Kim
  • Patent number: 11593908
    Abstract: The disclosure discloses a method for preprocessing an image and a related electronic device. A current data frame captured through a camera is obtained by a pre-created drawing surface window called by a central processing unit (CPU) in response to a preview activating instruction of the camera. The current data frame is converted into a preview texture corresponding to the current data frame by the pre-created drawing surface window. The preview texture corresponding to the current data frame is sent to a graphics processing unit (GPU). The preview texture corresponding to the current data frame is processed by the GPU. The preview texture processed is sent by the CPU to an advanced driving assistance system (ADAS).
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: February 28, 2023
    Assignee: APOLLO INTELLIGENT CONNECTIVITY (BEIJING) TECHNOLOGY CO., LTD.
    Inventor: Cancan Peng
  • Patent number: 11594194
    Abstract: A display system supports variable refresh rates that include a plurality of refresh rates. A source such as a graphics processing unit (GPU) provides frames to the display system at a selected one of the refresh rates. The refresh rates are factored into a corresponding plurality of prime factors. A plurality of numbers of lines per frame in frames provided at the plurality of refresh rates is determined based on one or more ratios of the plurality of refresh rates, the plurality of prime factors, and a line rate for providing frames to the display system at the plurality of refresh rates. The source then selectively provides frames to the display system at one refresh rate of the plurality of refresh rates using the same line rate regardless of which refresh rate is chosen. Furthermore, the number of lines per frame is an integer for frames provided at the refresh rates.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: February 28, 2023
    Assignee: ATI TECHNOLOGIES ULC
    Inventor: David I.J. Glen
  • Patent number: 11593910
    Abstract: Embodiments provide mechanisms to facilitate compute operations for deep neural networks. One embodiment comprises a graphics processing unit comprising one or more multiprocessors, at least one of the one or more multiprocessors including a register file to store a plurality of different types of operands and a plurality of processing cores. The plurality of processing cores includes a first set of processing cores of a first type and a second set of processing cores of a second type. The first set of processing cores are associated with a first memory channel and the second set of processing cores are associated with a second memory channel.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: February 28, 2023
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Narayan Srinivasa, Feng Chen, Joydeep Ray, Ben J. Ashbaugh, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajkishore Barik, Sara S. Baghsorkhi, Justin E. Gottschlich, Altug Koker, Nadathur Rajagopalan Satish, Farshad Akhbari, Dukhwan Kim, Wenyin Fu, Travis T. Schluessler, Josh B. Mastronarde, Linda L. Hurd, John H. Feit, Jeffery S. Boles, Adam T. Lake, Karthik Vaidyanathan, Devan Burke, Subramaniam Maiyuran, Abhishek R. Appu
  • Patent number: 11587198
    Abstract: A method of initialising rendering at a graphics processing unit configured to perform safety-critical rendering, the method comprising: causing an instruction for initialising rendering of safety critical graphical data at the graphics processing unit to be provided to the graphics processing unit, said instruction comprising a request for response from the graphics processing unit; initialising a timer, said timer being configured to expire after a time period; and monitoring, during said time period, for a response from the graphics processing unit; determining, by a safety controller external to the graphics processing unit, that an initialisation error has occurred if no response is received from the graphics processing unit before the timer expires.
    Type: Grant
    Filed: February 28, 2021
    Date of Patent: February 21, 2023
    Assignee: Imagination Technologies Limited
    Inventors: Mario Sopena Novales, Philip Morris
  • Patent number: 11587197
    Abstract: A method of initialising rendering at a graphics processing unit configured to perform safety-critical rendering within a graphics processing system, the method comprising: generating configuration data for initialising rendering of safety critical graphical data at the graphics processing unit; receiving the configuration data for initialising rendering at the graphics processing unit; configuring the graphics processing unit in accordance with the configuration data for initialising rendering; determining whether the graphics processing unit is correctly configured in accordance with the configuration data; and determining, by a safety controller external to the graphics processing unit, that an initialisation error has occurred in response to determining that the graphics processing unit is not correctly configured in accordance with the configuration data.
    Type: Grant
    Filed: February 28, 2021
    Date of Patent: February 21, 2023
    Assignee: Imagination Technologies Limited
    Inventors: Mario Sopena Novales, Philip Morris
  • Patent number: 11568640
    Abstract: In one aspect, a headset may include a housing, at least one processor in the housing, a transparent display accessible to the processor and coupled to the housing, and at least first and second vibrators accessible to the processor and coupled to the housing. The first and second vibrators may be located at different positions with respect to the housing. The headset may also include storage accessible to the processor and coupled to the housing. The storage may include instructions executable by the processor to track a person as the person moves through an environment. The instructions may also be executable to, based on tracking the person, actuate one of the first and second vibrators to indicate a direction in which the person is to travel and/or to alert the person of an object that is within a threshold distance to the person.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: January 31, 2023
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Jonathan Co Lee, Nathan Hatfield
  • Patent number: 11526960
    Abstract: Disclosed are various embodiments for performing a join operation using a graphics processing unit (GPU). The GPU can receive input data including sequences or tuples. The GPU can initialize a histogram in a memory location shared by threads. The GPU can build the histogram of hash values for the sequences. The GPU can reorder the sequences based on the histogram. The GPU can probe partitions and store the results in a buffer pool. The GPU can output the results of the join.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: December 13, 2022
    Assignee: UNIVERSITY OF SOUTH FLORIDA
    Inventors: Yicheng Tu, Ran Rui
  • Patent number: 11507815
    Abstract: A graphics processor is described that includes a single instruction, multiple thread (SIMT) architecture including hardware multithreading. The multiprocessor can execute parallel threads of instructions associated with a command stream, where the multiprocessor includes a set of functional units to execute at least one of the parallel threads of the instructions. The set of functional units can include a mixed precision tensor processor to perform tensor computations. The functional units can also include circuitry to analyze statistics for output values of the tensor computations, determine a target format to convert the output values, the target format determined based on the statistics for the output values and a precision associated with a second layer of the neural network, and convert the output values to the target format.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: November 22, 2022
    Assignee: Intel Corporation
    Inventors: Naveen Mellempudi, Dipankar Das
  • Patent number: 11500680
    Abstract: The present disclosure relates to an accelerator for systolic array-friendly data placement. The accelerator may include: a systolic array comprising a plurality of operation units, wherein the systolic array is configured to receive staged input data and perform operations using the staged input to generate staged output data, the staged output data comprising a number of segments; a controller configured to execute one or more instructions to generate a pattern generation signal; a data mask generator; and a memory configured to store the staged output data using the generated masks. The data mask generator may include circuitry configured to: receive the pattern generation signal from the controller, and, based on the received signal, generate a mask corresponding to each segment of the staged output data.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: November 15, 2022
    Assignee: Alibaba Group Holding Limited
    Inventors: Yuhao Wang, Xiaoxin Fan, Dimin Niu, Chunsheng Liu, Wei Han
  • Patent number: 11501139
    Abstract: One embodiment provides for a machine-learning accelerator device a multiprocessor to execute parallel threads of an instruction stream, the multiprocessor including a compute unit, the compute unit including a set of functional units, each functional unit to execute at least one of the parallel threads of the instruction stream. The compute unit includes compute logic configured to execute a single instruction to scale an input tensor associated with a layer of a neural network according to a scale factor, the input tensor stored in a floating-point data type, the compute logic to scale the input tensor to enable a data distribution of data of the input tensor to be represented by a 16-bit floating point data type.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: November 15, 2022
    Assignee: Intel Corporation
    Inventors: Naveen Mellempudi, Dipankar Das
  • Patent number: 11494626
    Abstract: In general, the disclosure describes techniques for creating runtime-throttleable neural networks (TNNs) that can adaptively balance performance and resource use in response to a control signal. For example, runtime-TNNs may be trained to be throttled via a gating scheme in which a set of disjoint components of the neural network can be individually “turned off” at runtime without significantly affecting the accuracy of NN inferences. A separate gating neural network may be trained to determine which trained components of the NN to turn off to obtain operable performance for a given level of resource use of computational, power, or other resources by the neural network. This level can then be specified by the control signal at runtime to adapt the NN to operate at the specified level and in this way balance performance and resource use for different operating conditions.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: November 8, 2022
    Assignee: SRI INTERNATIONAL
    Inventors: Jesse Hostetler, Sek Meng Chai
  • Patent number: 11483391
    Abstract: A method and a server device for providing an IoT platform service are provided. According to at least one aspect of the present disclosure, a method of providing an IoT platform service, which is performed by an IoT platform server apparatus, generates a shadow device corresponding to an IoT device, manages state information of the IoT device through the corresponding shadow device, and registers and administers a specification (i.e., a device descriptor) regarding common features of a plurality of devices.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: October 25, 2022
    Assignee: SK TELECOM CO., LTD.
    Inventor: Karam Ko
  • Patent number: 11467621
    Abstract: Computer processing unit intra-frame clock and voltage scaling based on graphics application awareness is disclosed. The computer processing unit includes a processor configured to execute a graphics application to generate a graphics image for output to a display. The computer processing unit includes a power management circuit configured to perform clock and voltage scaling (CVS) (i.e., frequency and/or voltage scaling) for the processor. The power management circuit is configured to identify a graphics application dispatched to be executed or being executed by the processor and to set the operating point for the processor based on the identified graphics application. This may allow the processor to operate at a more optimal operating point for performance of graphics and non-graphics applications as opposed to operating each application at a lower operating point due to a graphics application that is more current intensive.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: October 11, 2022
    Assignee: Qualcomm Incorporated
    Inventors: Edwin Jose, Ravi Jenkal, Donghyun Kim
  • Patent number: 11470162
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media provide for the intelligent configuration of personal endpoint devices for video communication. The system identifies, within a room, a personal endpoint device to be used in a video communication session, then authenticates the personal endpoint device. The system then performs one or more diagnostic operations to receive diagnostic output from the personal endpoint device. The system processes the diagnostic output to determine a unique broadcasting signature of the room, and determines whether an existing optimal settings configuration of the personal endpoint device can be detected for the room. If an optimal settings configuration is detected, the setup dynamically configures one or more parameters of the personal endpoint device to match the optimal settings configuration. If not, then the system determines a new optimal settings configuration and stores it for future video communication in the room.
    Type: Grant
    Filed: January 30, 2021
    Date of Patent: October 11, 2022
    Assignee: ZOOM VIDEO COMMUNICATIONS, INC.
    Inventor: Shane Paul Springer
  • Patent number: 11455139
    Abstract: An electronic device and method are disclosed herein. The electronic device includes a display, a wireless communication circuit, and electrical connector and a processor. The processor implements the method, including: detecting whether the electronic device is communicatively connected to an external display device through a wireless communication circuit or an electrical connector, when the electronic device is communicatively disconnected from the external display device, displaying, on the display, a first user interface for configuring a first screen timeout time associated with the display, when the electronic device is communicatively connected to the external display device, displaying a first screen on the display, and displaying a second screen on the external display device, the second screen different from the first screen, and displaying, on the external display device, a second user interface for configuring a second screen timeout time related to the external display device.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: September 27, 2022
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Byoungho Jung, Chihyun Cho, Hyewon Koo, Yongjin Kwon, Byungseok Jung
  • Patent number: 11457193
    Abstract: Methods, systems and apparatuses may provide for technology that identifies a seam area between a pair of images corresponding to a first eye and determines a disparity between the seam area and a reference area at a center line of a reference image corresponding to a second eye. The technology may also automatically adjust one or more pre-stitch parameters of camera sensors associated with the pair of images and the reference image based on the disparity.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: September 27, 2022
    Assignee: Intel Corporation
    Inventor: Fai Yeung
  • Patent number: 11450053
    Abstract: Efficient 5G transmission of volumetric data using 3D character rigging techniques is able to be achieved by capturing volumetric data using RGB, depth or other special purpose cameras or sensors, reconstructing in 3D and then performing character rigging. The ability to render future or novel frames using rigging is able to be used in order to predict future and past models. By sending the rigging vectors and the compressed errors of difference between actual and predicted models, higher compression rates of volumetric sequences are able to be achieved compared to traditional methods. The decoder on the other side of the 5G channel reverses the process to synthesize original frames.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: September 20, 2022
    Assignee: Sony Group Corporation
    Inventors: Nikolaos Georgis, Marc Birnkrant
  • Patent number: 11443402
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for generating, by an image sensor of a computing device, frame data comprising sub-frames of image pixel data. A first resource of the system-on-chip provides the frame data to a second resource of the system-on-chip. The frame data is provided to the second resource using a first data path included in the system-on-chip. The first resource provides a token to the second resource using a second data path included in the system-on-chip. A processor of the system-on-chip, uses the token to synchronize production of sub-frames of image pixel data provided by the first resource to the second resource and to synchronize consumption of the sub-frames of image pixel data received by the second resource from the elastic memory buffer.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: September 13, 2022
    Assignee: Google LLC
    Inventors: Benjamin Dodge, Jason Rupert Redgrave, Xiaoyu Ma
  • Patent number: 11405472
    Abstract: Implementations include receiving, by a migration delta analyzer of a software system, an object list including objects accessed by the on-premise application, determining, by the migration delta analyzer, at least one migration option for each object in the object list using a mapping table, receiving, through a user interface, input from a user representing a selection of migration option for each object in the object list, and providing a cloud application based on the selected migration option for each object in the object list.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: August 2, 2022
    Assignee: SAP SE
    Inventors: Peter Eberlein, Volker Driesen
  • Patent number: 11404022
    Abstract: Systems and methods are configured to adjust the timing of source frame compression in response to fluctuations in a variable frame rate at which source frames are rendered.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: August 2, 2022
    Assignee: SONY INTERACTIVE ENTERTAINMENT LLC
    Inventor: Roelof Roderick Colenbrander