Computer Graphic Processing System Patents (Class 345/501)
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Patent number: 11682100Abstract: In various examples, a signal processing pipeline is dynamically generated or instantiated for a signal processing request. To generate the pipeline, a graph topology—including nodes and edges—may be created to represent features, functionality, and characteristics of a signal processing system. The nodes, representing processing tasks, may be connected via edges having associated costs for performing, by a node, a processing task on an output of a prior or edge-connected node. For a given signal processing request, the nodes or processing tasks to be included may be selected and, using a graph routing algorithm and the costs between and among the determined nodes, a path through the nodes may be determined—thereby defining, at least in part, the signal processing pipeline.Type: GrantFiled: March 29, 2022Date of Patent: June 20, 2023Assignee: NVIDIA CorporationInventors: David Schalig, Karsten Patzwaldt
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Patent number: 11669329Abstract: Embodiments described herein provide for an instruction and associated logic to enable a vector multiply add instructions with automatic zero skipping for sparse input. One embodiment provides for a general-purpose graphics processor comprising logic to perform operations comprising fetching a hardware macro instruction having a predicate mask, a repeat count, and a set of initial operands, where the initial operands include a destination operand and multiple source operands. The hardware macro instruction is configured to perform one or more multiply/add operations on input data associated with a set of matrices.Type: GrantFiled: April 18, 2022Date of Patent: June 6, 2023Assignee: Intel CorporationInventors: Supratim Pal, Sasikanth Avancha, Ishwar Bhati, Wei-Yu Chen, Dipankar Das, Ashutosh Garg, Chandra S. Gurram, Junjie Gu, Guei-Yuan Lueh, Subramaniam Maiyuran, Jorge E. Parra, Sudarshan Srinivasan, Varghese George
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Patent number: 11669933Abstract: One embodiment provides for a graphics processing unit to perform computations associated with a neural network, the graphics processing unit comprising a hardware processing unit having a dynamic precision fixed-point unit that is configurable to quantize elements of a floating-point tensor to convert the floating-point tensor into a dynamic fixed-point tensor.Type: GrantFiled: April 27, 2022Date of Patent: June 6, 2023Assignee: Intel CorporationInventors: Naveen K. Mellempudi, Dheevatsa Mudigere, Dipankar Das, Srinivas Sridharan
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Patent number: 11630629Abstract: A multi-screen display control device is shown, which is linked to a host through a universal serial bus (USB) port to receive image data from the host, and uses a plurality of high-definition multimedia interface (HDMI) ports to output a plurality of HDMI sub-images to a plurality of screens. The multi-screen display control device has a USB hub that couples the USB port to a plurality of graphics processing units (GPUs), so that the GPUs generate the HDMI sub-images based on the image data transferred from the host via USB communication technology.Type: GrantFiled: March 19, 2021Date of Patent: April 18, 2023Assignee: SILICON MOTION, INC.Inventors: Chengliang Qi, Guangjun Lyu, Cong Li
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Patent number: 11609791Abstract: A first workload is executed in a first subset of pipelines of a processing unit. A second workload is executed in a second subset of the pipelines of the processing unit. The second workload is dependent upon the first workload. The first and second workloads are suspended and state information for the first and second workloads is stored in a first memory in response to suspending the first and second workloads. In some cases, a third workload executes in a third subset of the pipelines of the processing unit concurrently with executing the first and second workloads. In some cases, a fourth workload is executed in the first and second pipelines after suspending the first and second workloads. The first and second pipelines are resumed on the basis of the stored state information in response to completion or suspension of the fourth workload.Type: GrantFiled: November 30, 2017Date of Patent: March 21, 2023Assignee: Advanced Micro Devices, Inc.Inventors: Anirudh R. Acharya, Michael Mantor
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Patent number: 11600211Abstract: An image display apparatus includes: a housing; a display for displaying an image; a driving unit configured to change a size of a display area exposed to the outside of the housing among an entire area of the display; and a controller, wherein the controller determines whether an image displayed through at least a portion of the display area is a static image, when the size of the display area is smaller than the size of the entire area, determines whether the image is displayed for a certain time or longer, when the image is the static image, controls the driving unit to change the size of the display area, when the image is displayed for the certain time or longer, and controls the display so that the image is displayed in response to a degree of change in the size of the display area.Type: GrantFiled: December 30, 2020Date of Patent: March 7, 2023Assignee: LG ELECTRONICS INC.Inventor: Hyoyeong Kim
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Patent number: 11594194Abstract: A display system supports variable refresh rates that include a plurality of refresh rates. A source such as a graphics processing unit (GPU) provides frames to the display system at a selected one of the refresh rates. The refresh rates are factored into a corresponding plurality of prime factors. A plurality of numbers of lines per frame in frames provided at the plurality of refresh rates is determined based on one or more ratios of the plurality of refresh rates, the plurality of prime factors, and a line rate for providing frames to the display system at the plurality of refresh rates. The source then selectively provides frames to the display system at one refresh rate of the plurality of refresh rates using the same line rate regardless of which refresh rate is chosen. Furthermore, the number of lines per frame is an integer for frames provided at the refresh rates.Type: GrantFiled: September 24, 2020Date of Patent: February 28, 2023Assignee: ATI TECHNOLOGIES ULCInventor: David I.J. Glen
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Patent number: 11593908Abstract: The disclosure discloses a method for preprocessing an image and a related electronic device. A current data frame captured through a camera is obtained by a pre-created drawing surface window called by a central processing unit (CPU) in response to a preview activating instruction of the camera. The current data frame is converted into a preview texture corresponding to the current data frame by the pre-created drawing surface window. The preview texture corresponding to the current data frame is sent to a graphics processing unit (GPU). The preview texture corresponding to the current data frame is processed by the GPU. The preview texture processed is sent by the CPU to an advanced driving assistance system (ADAS).Type: GrantFiled: March 18, 2021Date of Patent: February 28, 2023Assignee: APOLLO INTELLIGENT CONNECTIVITY (BEIJING) TECHNOLOGY CO., LTD.Inventor: Cancan Peng
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Patent number: 11593910Abstract: Embodiments provide mechanisms to facilitate compute operations for deep neural networks. One embodiment comprises a graphics processing unit comprising one or more multiprocessors, at least one of the one or more multiprocessors including a register file to store a plurality of different types of operands and a plurality of processing cores. The plurality of processing cores includes a first set of processing cores of a first type and a second set of processing cores of a second type. The first set of processing cores are associated with a first memory channel and the second set of processing cores are associated with a second memory channel.Type: GrantFiled: May 11, 2022Date of Patent: February 28, 2023Assignee: Intel CorporationInventors: Prasoonkumar Surti, Narayan Srinivasa, Feng Chen, Joydeep Ray, Ben J. Ashbaugh, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajkishore Barik, Sara S. Baghsorkhi, Justin E. Gottschlich, Altug Koker, Nadathur Rajagopalan Satish, Farshad Akhbari, Dukhwan Kim, Wenyin Fu, Travis T. Schluessler, Josh B. Mastronarde, Linda L. Hurd, John H. Feit, Jeffery S. Boles, Adam T. Lake, Karthik Vaidyanathan, Devan Burke, Subramaniam Maiyuran, Abhishek R. Appu
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Patent number: 11587198Abstract: A method of initialising rendering at a graphics processing unit configured to perform safety-critical rendering, the method comprising: causing an instruction for initialising rendering of safety critical graphical data at the graphics processing unit to be provided to the graphics processing unit, said instruction comprising a request for response from the graphics processing unit; initialising a timer, said timer being configured to expire after a time period; and monitoring, during said time period, for a response from the graphics processing unit; determining, by a safety controller external to the graphics processing unit, that an initialisation error has occurred if no response is received from the graphics processing unit before the timer expires.Type: GrantFiled: February 28, 2021Date of Patent: February 21, 2023Assignee: Imagination Technologies LimitedInventors: Mario Sopena Novales, Philip Morris
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Patent number: 11587197Abstract: A method of initialising rendering at a graphics processing unit configured to perform safety-critical rendering within a graphics processing system, the method comprising: generating configuration data for initialising rendering of safety critical graphical data at the graphics processing unit; receiving the configuration data for initialising rendering at the graphics processing unit; configuring the graphics processing unit in accordance with the configuration data for initialising rendering; determining whether the graphics processing unit is correctly configured in accordance with the configuration data; and determining, by a safety controller external to the graphics processing unit, that an initialisation error has occurred in response to determining that the graphics processing unit is not correctly configured in accordance with the configuration data.Type: GrantFiled: February 28, 2021Date of Patent: February 21, 2023Assignee: Imagination Technologies LimitedInventors: Mario Sopena Novales, Philip Morris
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Patent number: 11568640Abstract: In one aspect, a headset may include a housing, at least one processor in the housing, a transparent display accessible to the processor and coupled to the housing, and at least first and second vibrators accessible to the processor and coupled to the housing. The first and second vibrators may be located at different positions with respect to the housing. The headset may also include storage accessible to the processor and coupled to the housing. The storage may include instructions executable by the processor to track a person as the person moves through an environment. The instructions may also be executable to, based on tracking the person, actuate one of the first and second vibrators to indicate a direction in which the person is to travel and/or to alert the person of an object that is within a threshold distance to the person.Type: GrantFiled: September 30, 2019Date of Patent: January 31, 2023Assignee: Lenovo (Singapore) Pte. Ltd.Inventors: Jonathan Co Lee, Nathan Hatfield
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Patent number: 11526960Abstract: Disclosed are various embodiments for performing a join operation using a graphics processing unit (GPU). The GPU can receive input data including sequences or tuples. The GPU can initialize a histogram in a memory location shared by threads. The GPU can build the histogram of hash values for the sequences. The GPU can reorder the sequences based on the histogram. The GPU can probe partitions and store the results in a buffer pool. The GPU can output the results of the join.Type: GrantFiled: April 29, 2022Date of Patent: December 13, 2022Assignee: UNIVERSITY OF SOUTH FLORIDAInventors: Yicheng Tu, Ran Rui
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Patent number: 11507815Abstract: A graphics processor is described that includes a single instruction, multiple thread (SIMT) architecture including hardware multithreading. The multiprocessor can execute parallel threads of instructions associated with a command stream, where the multiprocessor includes a set of functional units to execute at least one of the parallel threads of the instructions. The set of functional units can include a mixed precision tensor processor to perform tensor computations. The functional units can also include circuitry to analyze statistics for output values of the tensor computations, determine a target format to convert the output values, the target format determined based on the statistics for the output values and a precision associated with a second layer of the neural network, and convert the output values to the target format.Type: GrantFiled: May 11, 2022Date of Patent: November 22, 2022Assignee: Intel CorporationInventors: Naveen Mellempudi, Dipankar Das
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Patent number: 11500680Abstract: The present disclosure relates to an accelerator for systolic array-friendly data placement. The accelerator may include: a systolic array comprising a plurality of operation units, wherein the systolic array is configured to receive staged input data and perform operations using the staged input to generate staged output data, the staged output data comprising a number of segments; a controller configured to execute one or more instructions to generate a pattern generation signal; a data mask generator; and a memory configured to store the staged output data using the generated masks. The data mask generator may include circuitry configured to: receive the pattern generation signal from the controller, and, based on the received signal, generate a mask corresponding to each segment of the staged output data.Type: GrantFiled: April 24, 2020Date of Patent: November 15, 2022Assignee: Alibaba Group Holding LimitedInventors: Yuhao Wang, Xiaoxin Fan, Dimin Niu, Chunsheng Liu, Wei Han
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Patent number: 11501139Abstract: One embodiment provides for a machine-learning accelerator device a multiprocessor to execute parallel threads of an instruction stream, the multiprocessor including a compute unit, the compute unit including a set of functional units, each functional unit to execute at least one of the parallel threads of the instruction stream. The compute unit includes compute logic configured to execute a single instruction to scale an input tensor associated with a layer of a neural network according to a scale factor, the input tensor stored in a floating-point data type, the compute logic to scale the input tensor to enable a data distribution of data of the input tensor to be represented by a 16-bit floating point data type.Type: GrantFiled: January 12, 2018Date of Patent: November 15, 2022Assignee: Intel CorporationInventors: Naveen Mellempudi, Dipankar Das
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Patent number: 11494626Abstract: In general, the disclosure describes techniques for creating runtime-throttleable neural networks (TNNs) that can adaptively balance performance and resource use in response to a control signal. For example, runtime-TNNs may be trained to be throttled via a gating scheme in which a set of disjoint components of the neural network can be individually “turned off” at runtime without significantly affecting the accuracy of NN inferences. A separate gating neural network may be trained to determine which trained components of the NN to turn off to obtain operable performance for a given level of resource use of computational, power, or other resources by the neural network. This level can then be specified by the control signal at runtime to adapt the NN to operate at the specified level and in this way balance performance and resource use for different operating conditions.Type: GrantFiled: October 11, 2019Date of Patent: November 8, 2022Assignee: SRI INTERNATIONALInventors: Jesse Hostetler, Sek Meng Chai
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Patent number: 11483391Abstract: A method and a server device for providing an IoT platform service are provided. According to at least one aspect of the present disclosure, a method of providing an IoT platform service, which is performed by an IoT platform server apparatus, generates a shadow device corresponding to an IoT device, manages state information of the IoT device through the corresponding shadow device, and registers and administers a specification (i.e., a device descriptor) regarding common features of a plurality of devices.Type: GrantFiled: August 25, 2021Date of Patent: October 25, 2022Assignee: SK TELECOM CO., LTD.Inventor: Karam Ko
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Patent number: 11470162Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media provide for the intelligent configuration of personal endpoint devices for video communication. The system identifies, within a room, a personal endpoint device to be used in a video communication session, then authenticates the personal endpoint device. The system then performs one or more diagnostic operations to receive diagnostic output from the personal endpoint device. The system processes the diagnostic output to determine a unique broadcasting signature of the room, and determines whether an existing optimal settings configuration of the personal endpoint device can be detected for the room. If an optimal settings configuration is detected, the setup dynamically configures one or more parameters of the personal endpoint device to match the optimal settings configuration. If not, then the system determines a new optimal settings configuration and stores it for future video communication in the room.Type: GrantFiled: January 30, 2021Date of Patent: October 11, 2022Assignee: ZOOM VIDEO COMMUNICATIONS, INC.Inventor: Shane Paul Springer
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Patent number: 11467621Abstract: Computer processing unit intra-frame clock and voltage scaling based on graphics application awareness is disclosed. The computer processing unit includes a processor configured to execute a graphics application to generate a graphics image for output to a display. The computer processing unit includes a power management circuit configured to perform clock and voltage scaling (CVS) (i.e., frequency and/or voltage scaling) for the processor. The power management circuit is configured to identify a graphics application dispatched to be executed or being executed by the processor and to set the operating point for the processor based on the identified graphics application. This may allow the processor to operate at a more optimal operating point for performance of graphics and non-graphics applications as opposed to operating each application at a lower operating point due to a graphics application that is more current intensive.Type: GrantFiled: February 28, 2020Date of Patent: October 11, 2022Assignee: Qualcomm IncorporatedInventors: Edwin Jose, Ravi Jenkal, Donghyun Kim
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Patent number: 11455139Abstract: An electronic device and method are disclosed herein. The electronic device includes a display, a wireless communication circuit, and electrical connector and a processor. The processor implements the method, including: detecting whether the electronic device is communicatively connected to an external display device through a wireless communication circuit or an electrical connector, when the electronic device is communicatively disconnected from the external display device, displaying, on the display, a first user interface for configuring a first screen timeout time associated with the display, when the electronic device is communicatively connected to the external display device, displaying a first screen on the display, and displaying a second screen on the external display device, the second screen different from the first screen, and displaying, on the external display device, a second user interface for configuring a second screen timeout time related to the external display device.Type: GrantFiled: July 13, 2021Date of Patent: September 27, 2022Assignee: Samsung Electronics Co., LtdInventors: Byoungho Jung, Chihyun Cho, Hyewon Koo, Yongjin Kwon, Byungseok Jung
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Patent number: 11457193Abstract: Methods, systems and apparatuses may provide for technology that identifies a seam area between a pair of images corresponding to a first eye and determines a disparity between the seam area and a reference area at a center line of a reference image corresponding to a second eye. The technology may also automatically adjust one or more pre-stitch parameters of camera sensors associated with the pair of images and the reference image based on the disparity.Type: GrantFiled: April 12, 2019Date of Patent: September 27, 2022Assignee: Intel CorporationInventor: Fai Yeung
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Patent number: 11450053Abstract: Efficient 5G transmission of volumetric data using 3D character rigging techniques is able to be achieved by capturing volumetric data using RGB, depth or other special purpose cameras or sensors, reconstructing in 3D and then performing character rigging. The ability to render future or novel frames using rigging is able to be used in order to predict future and past models. By sending the rigging vectors and the compressed errors of difference between actual and predicted models, higher compression rates of volumetric sequences are able to be achieved compared to traditional methods. The decoder on the other side of the 5G channel reverses the process to synthesize original frames.Type: GrantFiled: April 13, 2021Date of Patent: September 20, 2022Assignee: Sony Group CorporationInventors: Nikolaos Georgis, Marc Birnkrant
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Patent number: 11443402Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for generating, by an image sensor of a computing device, frame data comprising sub-frames of image pixel data. A first resource of the system-on-chip provides the frame data to a second resource of the system-on-chip. The frame data is provided to the second resource using a first data path included in the system-on-chip. The first resource provides a token to the second resource using a second data path included in the system-on-chip. A processor of the system-on-chip, uses the token to synchronize production of sub-frames of image pixel data provided by the first resource to the second resource and to synchronize consumption of the sub-frames of image pixel data received by the second resource from the elastic memory buffer.Type: GrantFiled: December 4, 2018Date of Patent: September 13, 2022Assignee: Google LLCInventors: Benjamin Dodge, Jason Rupert Redgrave, Xiaoyu Ma
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Patent number: 11405472Abstract: Implementations include receiving, by a migration delta analyzer of a software system, an object list including objects accessed by the on-premise application, determining, by the migration delta analyzer, at least one migration option for each object in the object list using a mapping table, receiving, through a user interface, input from a user representing a selection of migration option for each object in the object list, and providing a cloud application based on the selected migration option for each object in the object list.Type: GrantFiled: September 10, 2021Date of Patent: August 2, 2022Assignee: SAP SEInventors: Peter Eberlein, Volker Driesen
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Patent number: 11404022Abstract: Systems and methods are configured to adjust the timing of source frame compression in response to fluctuations in a variable frame rate at which source frames are rendered.Type: GrantFiled: January 28, 2021Date of Patent: August 2, 2022Assignee: SONY INTERACTIVE ENTERTAINMENT LLCInventor: Roelof Roderick Colenbrander
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Patent number: 11392502Abstract: An embodiment of an electronic processing system may include an application processor, system memory communicatively coupled to the application processor, a graphics processor communicatively coupled to the application processor, graphics memory communicatively coupled to the graphics processor, and persistent storage media communicatively coupled to the application processor and the graphics processor to store one or more graphics assets, wherein the graphics processor is to access the one or more graphics asset mapped from the persistent storage media. The persistent storage media may include a low latency, high capacity, and byte-addressable nonvolatile memory. The one or more graphics assets may include one or more of a mega-texture and terrain data. Other embodiments are disclosed and claimed.Type: GrantFiled: July 27, 2020Date of Patent: July 19, 2022Assignee: Intel CorporationInventors: Jianfang Zhu, Cristiano J. Ferreira, Bo Qiu, Ajit Krisshna Nandyal Lakshman, Nikhil Talpallikar, Deepak Gandiga Shivakumar, Brandt M. Guttridge, Kim Pallister, Frank J. Soqui, Anand Srivatsa, Travis T. Schluessler, Abhishek R. Appu, Ankur N. Shah, Joydeep Ray, Altug Koker, Jonathan Kennedy
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Patent number: 11387155Abstract: An integrated circuit (IC) includes a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer. A metal wall that is ring-shaped is positioned above the top metal layer that is not electrically coupled to the circuitry. The stress sensitive circuit portion is with at least a majority of its area within an inner area of the substrate that is framed by the metal wall to provide a cavity.Type: GrantFiled: April 27, 2020Date of Patent: July 12, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Amit Sureshkumar Nangia, Sreenivasan Kalyani Koduri, Siva Prakash Gurrum, Christopher Daniel Manack
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Patent number: 11380204Abstract: An autonomous vehicle is described herein. The autonomous vehicle comprises a first sensor and a second sensor having limited fields of view, an articulation system, and a computing system. The computing system determines a first region and a second region external to the autonomous vehicle based on a sensor prioritization scheme comprising a ranking of regions surrounding the autonomous vehicle. The computing system then causes the articulation system to orient the first sensor towards the first region and the second region towards the second region. Responsive to receiving a sensor signal from the first sensor indicating that an object has entered a field of view of the first sensor, the computing system determines a third region having a higher ranking than the second region within the sensor prioritization scheme. The computing system then causes the articulation system to orient the second sensor towards the third region.Type: GrantFiled: June 28, 2020Date of Patent: July 5, 2022Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLCInventors: Elliot Branson, Eric Lujan, Benjamin Earle Weinstein-Raun
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Patent number: 11372091Abstract: In one embodiment, a system for correcting parallax error is provided. An image is received from a camera and a plurality of points is received from a LiDAR sensor. The points are placed on the image based on coordinates associated with each point. The image is divided into a plurality of cells by placing a grid over the image. For each cell, a minimum distance between the points in the cell and the camera is determined. For each cell, a margin is calculated based on the determined minimum distance. For each cell, points that have a distance from the camera that is greater than the minimum distance plus the margin are removed or deleted. The image and/or the remaining points are then used to provide one or more vehicle functions.Type: GrantFiled: June 28, 2019Date of Patent: June 28, 2022Assignee: Toyota Research Institute, Inc.Inventors: Yusuke Kanzawa, Junya Ueno, Mark Edward Tjersland
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Patent number: 11361400Abstract: A primitive that triggers performance of a graphics operation for the entirety of a tile is included in the sequence of primitives for a sequence of rendering tiles being provided to subsequent stages of the graphics processing pipeline for processing at least one tile in advance of the tile to which the primitive that is to trigger a graphics processing operation for the entirety of the tile relates. If, subsequent to the starting of the processing of the primitive that performs a processing operation for the entirety of the tile, it is determined that no other primitives will be processed for the tile, at least one of the subsequent processing stages of the graphics processing pipeline is caused to stop performing processing in respect of the primitive that performs a processing operation for the entirety of the tile.Type: GrantFiled: May 6, 2021Date of Patent: June 14, 2022Assignee: Arm LimitedInventors: Per Kristian Kjoll, Ole Magnus Ruud
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Patent number: 11363326Abstract: In a digital contents receiver for receiving transmitted digital contents, the digital contents include at least component information indicating an element which constitutes a program of the contents. When the component information indicates that the received digital contents are a 3D component, it is determined whether a display part corresponds to display of the 3D component. If the display part corresponds to display of the 3D component, the received digital contents are displayed in 3D.Type: GrantFiled: March 1, 2021Date of Patent: June 14, 2022Assignee: Maxell, Ltd.Inventors: Sadao Tsuruga, Satoshi Otsuka
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Patent number: 11355043Abstract: Embodiments relate to a display device including pixels arranged in rows and columns, where duty cycles of the pixels are dynamically programmed according to eye tracking information. For a display frame, the display device may determine a gaze region and a non-gaze region based on the eye tracking information. A control circuit of the display device controls a first subset of pixels in the gaze region to operate with a first duty cycle and controls a second subset of pixels in the non-gaze region to operate with a second duty cycle greater than the first duty cycle. The first subset of pixels emits light with greater brightness than the second subset of pixels.Type: GrantFiled: February 18, 2021Date of Patent: June 7, 2022Assignee: Facebook Technologies, LLCInventors: Min Hyuk Choi, Wenhao Qiao, Donghee Nam, Wonjae Choi, Zhiming Zhuang
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Patent number: 11354771Abstract: Methods, systems, and computer-readable storage media for providing a simulated graph processing accelerator representative of a hardware-based graph processing accelerator, the simulated graph processing accelerator including a controller component, a set of producer components, and a final merge component; triggering execution of the simulated graph processing accelerator as a simulation of processing of a graph for one or more of breadth-first search (BFS), single source shortest path (SSSP), weakly connected components (WCC), sparse matrix-vector multiplication (SpMV), and PageRank (PR), execution including: generating request streams from each producer component, merging request streams to provide a merged request stream, inputting the merged request stream to a memory simulator, and processing, by the memory simulator, the merged request stream to simulate handling of requests in memory.Type: GrantFiled: June 3, 2021Date of Patent: June 7, 2022Assignee: SAP SEInventors: Jonas Dann, Daniel Ritter
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Patent number: 11348514Abstract: A display apparatus including: image renderer including light-emitting diodes that are to be employed as sub-pixels of image renderer; liquid-crystal device including liquid-crystal structure and control circuit, wherein liquid-crystal structure is arranged in front of light-emitting diodes of image renderer, wherein liquid-crystal structure is to be electrically controlled, via control circuit, to shift light emanating from light-emitting diode to target positions on image plane according to shifting sequence in repeated manner; and processor(s) configured to render output sequence of output image frames via image renderer, wherein shift in light emanating from light-emitting diode to target positions causes resolution of output image frames to appear higher than display resolution of image renderer.Type: GrantFiled: February 4, 2021Date of Patent: May 31, 2022Assignee: Varjo Technologies OyInventors: Klaus Melakari, Oiva Arvo Oskari Sahlsten
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Patent number: 11336878Abstract: An image projecting apparatus including an optical output unit for projecting and image, a camera, a plurality of sensors, and a processor is disclosed. The processor is configured to: identify, based on sensing data received through the plurality of sensors, a distance between each of the plurality of sensors and a projection surface, provide, based on a difference between the identified distances being greater than or equal to a pre-set threshold value, a user interface configured to guide a direction adjustment of the image projecting apparatus, and identify, based on a difference between the identified distances being less than the pre-set threshold value, a shape of a projected image by photographing, using the camera, an image projected to the projection surface, and control the optical output unit to project an image corrected based on the identified shape.Type: GrantFiled: February 24, 2021Date of Patent: May 17, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seungil Yoon, Joonhyun Yang, Eunseok Choi
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Patent number: 11315909Abstract: A display comprises a transparent polymer support, an array of light emitters embedded in the support, and a redistribution layer. Each light emitter comprises electrode contacts that are substantially coplanar with a back surface of the support and emits light through a front surface of the support opposite the back surface when provided with power through the electrode contacts. The redistribution layer comprises a dielectric layer that is disposed on and in contact with the support back surface and distribution contacts that extend through the dielectric layer. Each of the distribution contacts is electrically connected to an electrode contact and is at least partially exposed.Type: GrantFiled: December 20, 2019Date of Patent: April 26, 2022Assignee: X Display Company Technology LimitedInventors: Christopher Andrew Bower, Matthew Alexander Meitl, Glenn Arne Rinne, Justin Walker Brown, Ronald S. Cok
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Patent number: 11314674Abstract: DMA architectures capable of performing multi-level multi-striding and determining multiple memory addresses in parallel are described. In one aspect, a DMA system includes one or more hardware DMA threads. Each DMA thread includes a request generator configured to generate, during each parallel memory address computation cycle, m memory addresses for a multi-dimensional tensor in parallel and, for each memory address, a respective request for a memory system to perform a memory operation. The request generator includes m memory address units that each include a step tracker configured to generate, for each dimension of the tensor, a respective step index value for the dimension and, based on the respective step index value, a respective stride offset value for the dimension. Each memory address unit includes a memory address computation element configured to generate a memory address for a tensor element and transmit the request to perform the memory operation.Type: GrantFiled: April 2, 2020Date of Patent: April 26, 2022Assignee: Google LLCInventors: Mark William Gottscho, Matthew William Ashcraft, Thomas Norrie, Oliver Edward Bowen
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Patent number: 11315212Abstract: An image processing apparatus for executing partial processes on each of plural image-section data items, corresponding to plural image sections obtained by dividing an input image into partial regions, in each object of an object group in which plural objects for executing image processing is connected in a directed acyclic graph form, the image processing apparatus includes a processor configured to: assign dependency relationships to the partial processes between the objects; assign a priority to a partial process of an object arranged in a terminal stage of the object group; assign, as a priority of a partial process of an object arranged at a pre-stage side which has at least one partial process that is connected at a post-stage side and that has the dependency relationship assigned, a largest value of the priority; and execute a partial process having become executable according to the dependency relationship, according to the priority.Type: GrantFiled: September 3, 2020Date of Patent: April 26, 2022Assignees: FUJIFILM Business Innovation Corp., FUJIFILM CORPORATIONInventors: Takashi Nagao, Kazuyuki Itagaki
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Patent number: 11308900Abstract: In a display apparatus, a liquid-crystal structure, arranged in front of an image renderer, is controlled to shift light of a given sub-pixel to target positions according to a shifting sequence in a repeated manner, while output image frames are displayed. To generate a given output image frame, a given target position to which the light is to be shifted is determined based on the shifting sequence. An input colour value of the given sub-pixel provided in a given input image frame is then adjusted to generate an output colour value of the given sub-pixel for the given output image frame, based on an output colour value of at least one other sub-pixel whose light overlaps with the given target position during display of a previous output image frame, and a retention coefficient between a colour of the at least one other sub-pixel and a colour of the given sub-pixel.Type: GrantFiled: February 4, 2021Date of Patent: April 19, 2022Assignee: Varjo Technologies OyInventors: Mikko Strandborg, Klaus Melakari, Ville Miettinen
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Patent number: 11308687Abstract: A device can receive an identification of an environmental model associated with a user navigating a website and receive an identification of an item model associated with an item requested by the user to be shown in connection with the environmental model on a client device. The environmental model could be a body model of the user or of another force like wind. The item model models how the item would move in connection with the environmental model. The device identifies movement associated with the environmental model and generates, based on the environmental model and the item model, frames each having respective data of the item as it would move on the environmental model according to the movement to yield movement key attributes. The device transmits the movement key attributes to the client device for rendering using a client device rendering engine.Type: GrantFiled: March 29, 2019Date of Patent: April 19, 2022Assignee: Amazon Technologies, Inc.Inventors: Nancy Yi Liang, Matthew Keith Miller, Gabriel J. Zimmerman, Jennifer M. Lin
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Patent number: 11307439Abstract: Display panel and display device are provided. The display panel includes a first substrate, a second substrate, and a plurality of pixel units. Each pixel unit includes a heating element, a reflective layer, a resonant cavity, and a phase-change material layer sequentially disposed on the first substrate, and a liquid crystal cell. The display panel also includes first signal lines extending along a row direction, second signal lines extending along the column direction, and a driving circuit in correspondence to each pixel unit. The driving circuit includes a first driving module and a second driving module that are connected to a same first signal line and a same second signal line. The first driving module drives the heating element to control the state of the phase-change material layer, and the second driving module controls the deflection of liquid crystal molecules in the liquid crystal cell.Type: GrantFiled: October 31, 2019Date of Patent: April 19, 2022Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.Inventors: Feng Lu, Qijun Yao, Yang Zeng
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Patent number: 11307410Abstract: A display apparatus including pose-tracking means; image renderer per eye; liquid-crystal device including liquid-crystal structure and control circuit; and processor. Processor is configured to: process pose-tracking data to determine user's head pose; detect if rate at which head pose is changing is below predefined threshold rate; if yes, switch on lock mode, select head pose for session of lock mode, and generate output image frames according to head pose during session; if no, generate output image frames according to corresponding head poses of user using pose-tracking data; and display output image frames, whilst shifting light emanating to from pixels of image renderer to multiple positions (P1-P9) in sequential and repeated manner, said shifting causes resolution of output image frames to appear higher than display resolution of image renderer.Type: GrantFiled: January 22, 2021Date of Patent: April 19, 2022Assignee: Varjo Technologies OyInventors: Mikko Strandborg, Ville Miettinen, Klaus Melakari
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Patent number: 11303687Abstract: In a streaming application environment, input generated in a remote device may be synchronized with rendered content generated by a virtual streaming application in the streaming application environment in part by using frame refresh events passed between the remote device and the streaming application environment to enable the streaming application environment to effectively track a frame refresh rate of the remote device such that input events received from the remote device may be injected into the virtual streaming application at appropriate frame intervals.Type: GrantFiled: March 6, 2020Date of Patent: April 12, 2022Assignee: GOOGLE LLCInventors: Chuo-Ling Chang, Ping-Hao Wu
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Patent number: 11301952Abstract: Systems and methods for determining a foreground application and at least one background application from multiple graphics applications executing within an execution environment are disclosed. Pixel data rendered by the foreground application may be displayed in the execution environment while a rendering thread of the background application may be paused.Type: GrantFiled: August 17, 2020Date of Patent: April 12, 2022Assignee: Intel CorporationInventors: Tao Zhao, John C. Weast, Brett P. Wang
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Patent number: 11282785Abstract: A package includes a device die, and an encapsulating material encapsulating the device die therein. The encapsulating material has a top surface coplanar with a top surface of the device die. A coil extends from the top surface to a bottom surface of the encapsulating material, and the device die is in the region encircled by the coil. At least one dielectric layer is formed over the encapsulating material and the coil. A plurality of redistribution lines is in the at least one dielectric layer. The coil is electrically coupled to the device die through the plurality of redistribution lines.Type: GrantFiled: July 13, 2020Date of Patent: March 22, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Chiang-Jui Chu, Chung-Shi Liu, Hao-Yi Tsai, Ming Hung Tseng, Hung-Yi Kuo
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Patent number: 11272116Abstract: A photographing method of an electronic device is provided. The electronic device includes a display screen. In some embodiments, display screen displays an icon of a first application. In those embodiments, display screen displays a user interface of the first application in response to an operation on the icon, where the user interface includes a photographing button. The display screen also displays a photographing preview interface of a second application in response to an operation on the photographing button, where the second application is a camera application, and the photographing preview interface is used to display an image collected by the camera. When ambient light meets a photographing condition, the electronic device automatically photographs the image collected by the camera.Type: GrantFiled: September 18, 2018Date of Patent: March 8, 2022Assignee: HONOR DEVICE CO., LTD.Inventors: Xin Ding, Chen Dong, Hongwei Hu, Yongtao Jiang, Wenmei Gao
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Patent number: 11262839Abstract: A method for updating information for a graphics pipeline including executing in the first frame period an application on a CPU to generate primitives of a scene for a first video frame. Gaze tracking information is received in a second frame period for an eye of a user. In the second frame period a landing point on an HMD display is predicted at the CPU based at least on the gaze tracking information. A late update of the predicted landing point to a buffer accessible by the GPU is performed in the second frame period. Shader operations are performed in the GPU in the second frame period to generate pixel data based on the primitives and based on the predicted landing point, wherein the pixel data is stored into a frame buffer. The pixel data is scanned out in the third frame period from the frame buffer to the HMD.Type: GrantFiled: May 17, 2018Date of Patent: March 1, 2022Assignee: Sony Interactive Entertainment Inc.Inventors: Andrew Young, Javier Fernandez Rico
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Patent number: 11263725Abstract: An apparatus and method are described for a non-uniform rasterizer. For example, one embodiment of an apparatus comprises: a graphics processor to process graphics data and render images using the graphics data; and a non-uniform rasterizer within the graphics processor to determine different resolutions to be used for different regions of an image, the non-uniform rasterizer to receive a plurality of polygons to be rasterized and to responsively rasterize the polygons in accordance with the different resolutions.Type: GrantFiled: July 29, 2019Date of Patent: March 1, 2022Assignee: INTEL CORPORATIONInventors: Tomas G. Akenine-Moller, Robert M. Toth, Bjorn Johnsson, Jon N. Hasselgren
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Patent number: 11244492Abstract: In one embodiment, a computing system may receive a number of texels organized into a texel array including a number of sub-arrays. The system may determine a number of texel subsets with the texels in each subset having a same position within their respective sub-arrays. The system may store the texel subsets into a number of buffer blocks, respectively, with each buffer block storing one texel subset. The system may retrieve a sampling texel array from the buffer blocks for parallelly determining pixel values of a number of sampling points. Each texel of the sampling texel array may be retrieved from a different buffer block.Type: GrantFiled: October 2, 2019Date of Patent: February 8, 2022Assignee: Facebook Technologies, LLC.Inventor: Larry Seiler